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173 lines
7.6 KiB
C++
173 lines
7.6 KiB
C++
//
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// Perform.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 28/04/2022.
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// Copyright © 2022 Thomas Harte. All rights reserved.
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//
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#ifndef InstructionSets_M68k_Perform_h
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#define InstructionSets_M68k_Perform_h
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#include "Model.hpp"
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#include "Instruction.hpp"
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#include "Status.hpp"
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#include "../../Numeric/RegisterSizes.hpp"
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namespace InstructionSet {
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namespace M68k {
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struct NullFlowController {
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//
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// Various operation-specific did-perform notfications; these all relate to operations
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// with variable timing on a 68000, providing the fields that contribute to that timing.
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//
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/// Indicates that a @c MULU was performed, providing the @c source operand.
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template <typename IntT> void did_mulu(IntT) {}
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/// Indicates that a @c MULS was performed, providing the @c source operand.
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template <typename IntT> void did_muls(IntT) {}
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/// Indicates that a @c CHK was performed, along with whether the result @c was_under zero or @c was_over the source operand.
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void did_chk([[maybe_unused]] bool was_under, [[maybe_unused]] bool was_over) {}
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/// Indicates an in-register shift or roll occurred, providing the number of bits shifted by.
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void did_shift([[maybe_unused]] int bit_count) {}
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/// Indicates that a @c DIVU was performed, providing the @c dividend and @c divisor.
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/// If @c did_overflow is @c true then the divide ended in overflow.
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template <bool did_overflow> void did_divu([[maybe_unused]] uint32_t dividend, [[maybe_unused]] uint32_t divisor) {}
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/// Indicates that a @c DIVS was performed, providing the @c dividend and @c divisor.
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/// If @c did_overflow is @c true then the divide ended in overflow.
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template <bool did_overflow> void did_divs([[maybe_unused]] int32_t dividend, [[maybe_unused]] int32_t divisor) {}
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/// Indicates that a bit-manipulation operation (i.e. BTST, BCHG or BSET) was performed, affecting the bit at posiition @c bit_position.
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void did_bit_op([[maybe_unused]] int bit_position) {}
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/// Indicates that an @c Scc was performed; if @c did_set_ff is true then the condition was true and FF
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/// written to the operand; otherwise 00 was written.
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void did_scc([[maybe_unused]] bool did_set_ff) {}
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/// Provides a notification that the upper byte of the status register has been affected by the current instruction;
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/// this gives an opportunity to track the supervisor flag.
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void did_update_status() {}
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//
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// Operations that don't fit the reductive load-modify-store pattern; these are requests from perform
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// that the flow controller do something (and, correspondingly, do not have empty implementations).
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//
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// All offsets are the native values as encoded in the corresponding operations.
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//
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/// If @c matched_condition is @c true, apply the @c offset to the PC.
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template <typename IntT> void complete_bcc(bool matched_condition, IntT offset);
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/// If both @c matched_condition and @c overflowed are @c false, apply @c offset to the PC.
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void complete_dbcc(bool matched_condition, bool overflowed, int16_t offset);
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/// Push the program counter of the next instruction to the stack, and add @c offset to the PC.
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void bsr(uint32_t offset);
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/// Push the program counter of the next instruction to the stack, and load @c offset to the PC.
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void jsr(uint32_t address);
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/// Set the program counter to @c address.
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void jmp(uint32_t address);
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/// Pop a word from the stack and use that to set the status condition codes. Then pop a new value for the PC.
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void rtr();
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/// Pop a word from the stack and use that to set the entire status register. Then pop a new value for the PC.
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void rte();
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/// Pop a new value for the PC from the stack.
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void rts();
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/// Put the processor into the stopped state, waiting for interrupts.
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void stop();
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/// Assert the reset output.
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void reset();
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/// Perform LINK using the address register identified by @c instruction and the specified @c offset.
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void link(Preinstruction instruction, uint32_t offset);
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/// Perform unlink, with @c address being the target address register.
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void unlink(uint32_t &address);
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/// Push @c address to the stack.
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void pea(uint32_t address);
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/// Replace the current user stack pointer with @c address.
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/// The processor is guranteed to be in supervisor mode.
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void move_to_usp(uint32_t address);
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/// Put the value of the user stack pointer into @c address.
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/// The processor is guranteed to be in supervisor mode.
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void move_from_usp(uint32_t &address);
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/// Perform an atomic TAS cycle; if @c instruction indicates that this is a TAS Dn then
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/// perform the TAS directly upon that register; otherwise perform it on the memory at
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/// @c address. If this is a TAS Dn then @c address will contain the initial value of
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/// the register.
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void tas(Preinstruction instruction, uint32_t address);
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/// Use @c instruction to determine the direction of this MOVEP and perform it;
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/// @c source is the first operand provided to the MOVEP — either an address or register
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/// contents — and @c dest is the second.
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///
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/// @c IntT may be either uint16_t or uint32_t.
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template <typename IntT> void movep(Preinstruction instruction, uint32_t source, uint32_t dest);
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/// Perform a MOVEM to memory, from registers. @c instruction will indicate the mask as the first operand,
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/// and the target address and addressing mode as the second; the mask and address are also supplied
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/// as @c mask and @c address. If the addressing mode is -(An) then the address register will have
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/// been decremented already.
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///
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/// The receiver is responsible for updating the address register if applicable.
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///
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/// @c IntT may be either uint16_t or uint32_t.
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template <typename IntT> void movem_toM(Preinstruction instruction, uint32_t mask, uint32_t address);
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/// Perform a MOVEM to registers, from memory. @c instruction will indicate the mask as the first operand,
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/// and the target address and addressing mode as the second; the mask and address are also supplied
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/// as @c mask and @c address. If the addressing mode is (An)+ then the address register will have been
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/// incremented, but @c address will be its value before that occurred.
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///
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/// The receiver is responsible for updating the address register if applicable.
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///
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/// @c IntT may be either uint16_t or uint32_t.
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template <typename IntT> void movem_toR(Preinstruction instruction, uint32_t mask, uint32_t address);
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/// Raises a short-form exception using @c vector. If @c use_current_instruction_pc is @c true,
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/// the program counter for the current instruction is included in the resulting stack frame. Otherwise the program
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/// counter for the next instruction is used.
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template <bool use_current_instruction_pc = true>
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void raise_exception([[maybe_unused]] int vector);
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};
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/// Performs @c instruction using @c source and @c dest (one or both of which may be ignored as per
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/// the semantics of the operation).
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///
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/// Any change in processor status will be applied to @c status. If this operation does not fit the reductive model
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/// of being a read and possibly a modify and possibly a write of up to two operands then the @c flow_controller
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/// will be asked to fill in the gaps.
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///
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/// If the template parameter @c operation is not @c Operation::Undefined then that operation will be performed, ignoring
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/// whatever is specifed in @c instruction. This allows selection either at compile time or at run time; per Godbolt all modern
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/// compilers seem to be smart enough fully to optimise the compile-time case.
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template <
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Model model,
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typename FlowController,
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Operation operation = Operation::Undefined
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> void perform(Preinstruction instruction, CPU::RegisterPair32 &source, CPU::RegisterPair32 &dest, Status &status, FlowController &flow_controller);
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}
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}
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#include "Implementation/PerformImplementation.hpp"
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#endif /* InstructionSets_M68k_Perform_h */
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