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mirror of https://github.com/TomHarte/CLK.git synced 2024-11-26 23:52:26 +00:00
CLK/OSBindings/Mac/Clock SignalTests/Bridges
Thomas Harte b22aa5d699 Starts transcribing the addressing examples I have into tests.
Correspondingly extends the exposed register set and test-machine addressing range.
2020-10-13 21:38:30 -04:00
..
C1540Bridge.h
C1540Bridge.mm Embraces std::make_[unique/shared] in place of .reset(new . 2019-12-23 21:31:46 -05:00
Clock SignalTests-Bridging-Header.h
DigitalPhaseLockedLoopBridge.h Promote DigitalPhaseLockedLoop to a template, simplify to O(1) add_pulse. 2020-01-12 17:25:21 -05:00
DigitalPhaseLockedLoopBridge.mm Fixes test units. 2020-01-27 20:35:58 -05:00
MOS6522Bridge.h Introduces an initial shift unit test, and makes it pass. 2019-07-07 22:13:36 -04:00
MOS6522Bridge.mm Standardises on read and write for bus accesses. 2020-01-05 13:40:02 -05:00
MOS6532Bridge.h
MOS6532Bridge.mm Standardises on read and write for bus accesses. 2020-01-05 13:40:02 -05:00
TestMachine6502.h Starts transcribing the addressing examples I have into tests. 2020-10-13 21:38:30 -04:00
TestMachine6502.mm Starts transcribing the addressing examples I have into tests. 2020-10-13 21:38:30 -04:00
TestMachine.h
TestMachine.mm
TestMachine+ForSubclassEyesOnly.h
TestMachineZ80.h Adds single-stepping. Of a kind. 2020-02-24 23:31:42 -05:00
TestMachineZ80.mm Edges towards offering the 65816 as another type of 6502 for testing. 2020-09-26 22:31:50 -04:00