This website requires JavaScript.
Explore
Mirrors
Help
Sign In
6502
/
CLK
Watch
1
Star
0
Fork
0
You've already forked CLK
mirror of
https://github.com/TomHarte/CLK.git
synced
2025-01-11 08:30:55 +00:00
Code
Issues
Projects
Releases
Wiki
Activity
CLK
/
Processors
History
Thomas Harte
45499050b6
Separates Z80Base.cpp into its component classes.
2017-09-04 11:04:01 -04:00
..
6502
Corrects possible confusion as documentation recommends Cycles(0) as default, but then gives Cycles(1).
2017-09-01 20:49:24 -04:00
Z80
Separates Z80Base.cpp into its component classes.
2017-09-04 11:04:01 -04:00
AllRAMProcessor.cpp
Attempted to nudge wait timing onto half-cycle boundaries, which expands the number of partial machine cycles the Z80 can post but pleasingly also regularises them. Switched the AllRAMProcessor to reporting half cycles by default and corrected all Z80 tests.
2017-07-27 20:17:13 -04:00
AllRAMProcessor.hpp
Attempted to nudge wait timing onto half-cycle boundaries, which expands the number of partial machine cycles the Z80 can post but pleasingly also regularises them. Switched the AllRAMProcessor to reporting half cycles by default and corrected all Z80 tests.
2017-07-27 20:17:13 -04:00
RegisterSizes.hpp
Noodled around with initial state.
2017-05-29 19:25:08 -04:00