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656 lines
21 KiB
C++
656 lines
21 KiB
C++
//
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// Video.hpp
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// Clock Signal
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//
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// Created by Thomas Harte on 20/03/2024.
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// Copyright © 2024 Thomas Harte. All rights reserved.
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//
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#pragma once
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#include "../../../Outputs/Log.hpp"
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#include "../../../Outputs/CRT/CRT.hpp"
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#include <array>
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#include <cassert>
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#include <cstdint>
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#include <cstring>
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#include <optional>
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namespace Archimedes {
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template <typename InterruptObserverT, typename ClockRateObserverT, typename SoundT>
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struct Video {
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Video(InterruptObserverT &interrupt_observer, ClockRateObserverT &clock_rate_observer, SoundT &sound, const uint8_t *ram) :
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interrupt_observer_(interrupt_observer),
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clock_rate_observer_(clock_rate_observer),
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sound_(sound),
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ram_(ram),
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crt_(Outputs::Display::InputDataType::Red4Green4Blue4) {
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set_clock_divider(3);
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crt_.set_visible_area(Outputs::Display::Rect(0.041f, 0.04f, 0.95f, 0.95f));
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crt_.set_display_type(Outputs::Display::DisplayType::RGB);
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}
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static constexpr uint16_t colour(uint32_t value) {
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uint8_t packed[2]{};
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packed[0] = value & 0xf;
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packed[1] = (value & 0xf0) | ((value & 0xf00) >> 8);
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#if TARGET_RT_BIG_ENDIAN
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return static_cast<uint16_t>(packed[1] | (packed[0] << 8));
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#else
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return static_cast<uint16_t>(packed[0] | (packed[1] << 8));
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#endif
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};
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static constexpr uint16_t high_spread[] = {
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colour(0b0000'0000'0000), colour(0b0000'0000'1000), colour(0b0000'0100'0000), colour(0b0000'0100'1000),
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colour(0b0000'1000'0000), colour(0b0000'1000'1000), colour(0b0000'1100'0000), colour(0b0000'1100'1000),
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colour(0b1000'0000'0000), colour(0b1000'0000'1000), colour(0b1000'0100'0000), colour(0b1000'0100'1000),
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colour(0b1000'1000'0000), colour(0b1000'1000'1000), colour(0b1000'1100'0000), colour(0b1000'1100'1000),
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};
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void write(uint32_t value) {
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const auto target = (value >> 24) & 0xfc;
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const auto timing_value = [](uint32_t value) -> uint32_t {
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return (value >> 14) & 0x3ff;
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};
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switch(target) {
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case 0x00: case 0x04: case 0x08: case 0x0c:
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case 0x10: case 0x14: case 0x18: case 0x1c:
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case 0x20: case 0x24: case 0x28: case 0x2c:
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case 0x30: case 0x34: case 0x38: case 0x3c:
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colours_[target >> 2] = colour(value);
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break;
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case 0x40: border_colour_ = colour(value); break;
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case 0x44: case 0x48: case 0x4c:
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cursor_colours_[(target - 0x40) >> 2] = colour(value);
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break;
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case 0x80: horizontal_timing_.period = timing_value(value); break;
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case 0x84: horizontal_timing_.sync_width = timing_value(value); break;
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case 0x88: horizontal_timing_.border_start = timing_value(value); break;
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case 0x8c: horizontal_timing_.display_start = timing_value(value); break;
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case 0x90: horizontal_timing_.display_end = timing_value(value); break;
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case 0x94: horizontal_timing_.border_end = timing_value(value); break;
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case 0x98:
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horizontal_timing_.cursor_start = (value >> 13) & 0x7ff;
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cursor_shift_ = (value >> 11) & 3;
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break;
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case 0x9c: horizontal_timing_.interlace_sync_position = timing_value(value); break;
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case 0xa0: vertical_timing_.period = timing_value(value); break;
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case 0xa4: vertical_timing_.sync_width = timing_value(value); break;
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case 0xa8: vertical_timing_.border_start = timing_value(value); break;
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case 0xac: vertical_timing_.display_start = timing_value(value); break;
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case 0xb0: vertical_timing_.display_end = timing_value(value); break;
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case 0xb4: vertical_timing_.border_end = timing_value(value); break;
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case 0xb8: vertical_timing_.cursor_start = timing_value(value); break;
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case 0xbc: vertical_timing_.cursor_end = timing_value(value); break;
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case 0xe0:
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// Set pixel rate. This is the value that a 24Mhz clock should be divided
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// by to get half the pixel rate.
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switch(value & 0b11) {
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case 0b00: set_clock_divider(6); break; // i.e. pixel clock = 8Mhz.
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case 0b01: set_clock_divider(4); break; // 12Mhz.
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case 0b10: set_clock_divider(3); break; // 16Mhz.
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case 0b11: set_clock_divider(2); break; // 24Mhz.
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}
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// Set colour depth.
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colour_depth_ = Depth((value >> 2) & 0b11);
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// Crib interlace-enable.
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vertical_timing_.is_interlaced = value & (1 << 6);
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break;
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//
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// Sound parameters.
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//
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case 0x60: case 0x64: case 0x68: case 0x6c:
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case 0x70: case 0x74: case 0x78: case 0x7c: {
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const uint8_t channel = ((value >> 26) + 7) & 7;
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sound_.set_stereo_image(channel, value & 7);
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} break;
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case 0xc0:
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sound_.set_frequency(value & 0xff);
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break;
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default:
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logger.error().append("TODO: unrecognised VIDC write of %08x", value);
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break;
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}
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}
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void tick() {
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// Pick new horizontal state, possibly rolling over into the vertical.
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horizontal_state_.increment_position(horizontal_timing_);
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if(horizontal_state_.did_restart()) {
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end_horizontal();
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const auto old_phase = vertical_state_.phase();
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vertical_state_.increment_position(vertical_timing_);
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const auto phase = vertical_state_.phase();
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if(phase != old_phase) {
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// Copy frame and cursor start addresses into counters at the
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// start of the first vertical display line.
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if(phase == Phase::Display) {
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address_ = frame_start_;
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cursor_address_ = cursor_start_;
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// Accumulate a count of how many times the processor has tried
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// to update the visible buffer more than once in a frame; this
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// will usually indicate that the software being run isn't properly
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// synchronised to actual machine speed.
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++frame_starts_;
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if(frame_start_sets_ > 10) {
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overages_ += frame_start_sets_ > frame_starts_;
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frame_start_sets_ = frame_starts_ = 0;
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}
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}
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if(old_phase == Phase::Display) {
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entered_flyback_ = true;
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interrupt_observer_.update_interrupts();
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}
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}
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// Determine which next 8 bytes will be the cursor image for this line.
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// Pragmatically, updating cursor_address_ once per line avoids probable
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// errors in getting it to appear appropriately over both pixels and border.
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if(vertical_state_.cursor_active) {
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uint8_t *cursor_pixel = cursor_image_.data();
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for(int byte = 0; byte < 8; byte ++) {
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cursor_pixel[0] = (ram_[cursor_address_] >> 0) & 3;
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cursor_pixel[1] = (ram_[cursor_address_] >> 2) & 3;
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cursor_pixel[2] = (ram_[cursor_address_] >> 4) & 3;
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cursor_pixel[3] = (ram_[cursor_address_] >> 6) & 3;
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cursor_pixel += 4;
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++cursor_address_;
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}
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}
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cursor_pixel_ = 32;
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}
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// Fetch if relevant display signals are active.
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if(vertical_state_.display_active() && horizontal_state_.display_active()) {
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const auto next_byte = [&]() {
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const auto next = ram_[address_];
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++address_;
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// `buffer_end_` is the final address that a 16-byte block will be fetched from;
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// the +16 here papers over the fact that I'm not accurately implementing DMA.
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if(address_ == buffer_end_ + 16) {
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address_ = buffer_start_;
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}
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bitmap_queue_[bitmap_queue_pointer_ & 7] = next;
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++bitmap_queue_pointer_;
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};
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switch(colour_depth_) {
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case Depth::EightBPP: next_byte(); next_byte(); break;
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case Depth::FourBPP: next_byte(); break;
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case Depth::TwoBPP: if(!(pixel_count_&3)) next_byte(); break;
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case Depth::OneBPP: if(!(pixel_count_&7)) next_byte(); break;
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}
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}
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// Move along line.
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switch(vertical_state_.phase()) {
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case Phase::Sync: tick_horizontal<Phase::Sync>(); break;
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case Phase::Blank: tick_horizontal<Phase::Blank>(); break;
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case Phase::Border: tick_horizontal<Phase::Border>(); break;
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case Phase::Display: tick_horizontal<Phase::Display>(); break;
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case Phase::StartInterlacedSync: tick_horizontal<Phase::StartInterlacedSync>(); break;
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case Phase::EndInterlacedSync: tick_horizontal<Phase::EndInterlacedSync>(); break;
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}
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++time_in_phase_;
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}
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/// @returns @c true if a vertical retrace interrupt has been signalled since the last call to @c interrupt(); @c false otherwise.
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bool interrupt() {
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// Guess: edge triggered?
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const bool interrupt = entered_flyback_;
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entered_flyback_ = false;
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return interrupt;
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}
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bool flyback_active() const {
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return vertical_state_.phase() != Phase::Display;
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}
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void set_frame_start(uint32_t address) {
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frame_start_ = address;
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++frame_start_sets_;
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}
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void set_buffer_start(uint32_t address) { buffer_start_ = address; }
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void set_buffer_end(uint32_t address) { buffer_end_ = address; }
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void set_cursor_start(uint32_t address) { cursor_start_ = address; }
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Outputs::CRT::CRT &crt() { return crt_; }
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const Outputs::CRT::CRT &crt() const { return crt_; }
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int clock_divider() const {
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return static_cast<int>(clock_divider_);
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}
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int frame_rate_overages() const {
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return overages_;
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}
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void set_dma_enabled(bool dma_enabled) {
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dma_enabled_ = dma_enabled;
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}
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//
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// The following is provided for input automation;
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// it does not correlate with real hardware functionality.
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//
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std::optional<std::pair<int, int>> cursor_location() {
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if(
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!dma_enabled_ ||
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vertical_timing_.cursor_end <= vertical_timing_.cursor_start ||
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horizontal_timing_.cursor_start >= (horizontal_timing_.period * 2)
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) {
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return std::nullopt;
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}
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const auto horizontal_start = horizontal_timing_.display_start + horizontal_state_.output_latency(colour_depth_);
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return std::make_pair(
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int(horizontal_timing_.cursor_start) + 6 - int(horizontal_start * 2),
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int(vertical_timing_.cursor_start) - int(vertical_timing_.display_start));
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}
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private:
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Log::Logger<Log::Source::ARMIOC> logger;
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InterruptObserverT &interrupt_observer_;
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ClockRateObserverT &clock_rate_observer_;
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SoundT &sound_;
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// In the current version of this code, video DMA occurrs costlessly,
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// being deferred to the component itself.
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const uint8_t *ram_ = nullptr;
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Outputs::CRT::CRT crt_;
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bool dma_enabled_ = false;
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// Horizontal and vertical timing.
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struct Timing {
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uint32_t period = 0;
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uint32_t sync_width = 0;
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uint32_t border_start = 0;
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uint32_t border_end = 0;
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uint32_t display_start = 0;
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uint32_t display_end = 0;
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uint32_t cursor_start = 0;
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uint32_t cursor_end = 0;
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uint32_t interlace_sync_position = 0;
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bool is_interlaced = false;
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};
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uint32_t cursor_shift_ = 0;
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Timing horizontal_timing_, vertical_timing_;
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enum class Depth {
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OneBPP = 0b00,
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TwoBPP = 0b01,
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FourBPP = 0b10,
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EightBPP = 0b11,
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};
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// Current video state.
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enum class Phase {
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Sync, Blank, Border, Display, StartInterlacedSync, EndInterlacedSync,
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};
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template <bool is_vertical>
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struct State {
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uint32_t position = 0;
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uint32_t display_start = 0;
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uint32_t display_end = 0;
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bool is_odd_iteration_ = false;
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void increment_position(const Timing &timing) {
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const auto previous_override = interlace_override_;
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if constexpr (is_vertical) {
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interlace_override_ = Phase::Sync; // i.e. no override.
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}
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if(position == timing.sync_width) {
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state |= SyncEnded;
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if(is_vertical && timing.is_interlaced && is_odd_iteration_ && previous_override == Phase::Sync) {
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--position;
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interlace_override_ = Phase::EndInterlacedSync;
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}
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}
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if(position == timing.display_start) { state |= DisplayStarted; display_start = position; }
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if(position == timing.display_end) { state |= DisplayEnded; display_end = position; }
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if(position == timing.border_start) state |= BorderStarted;
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if(position == timing.border_end) state |= BorderEnded;
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cursor_active |= position == timing.cursor_start;
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cursor_active &= position != timing.cursor_end;
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if(position == timing.period) {
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state = DidRestart;
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position = 0;
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is_odd_iteration_ ^= true;
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// Both display start and end need to be seeded as bigger than can be reached,
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// while having some overhead for addition.
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display_end = display_start = std::numeric_limits<uint32_t>::max() >> 1;
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// Possibly label the next as a start-of-interlaced-sync.
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if(is_vertical && timing.is_interlaced && is_odd_iteration_) {
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interlace_override_ = Phase::StartInterlacedSync;
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}
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} else {
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++position;
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if(position == 1024) position = 0;
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}
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}
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bool is_outputting(Depth depth) const {
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const auto latency = output_latency(depth);
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return position >= display_start + latency && position < display_end + latency;
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}
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uint32_t output_cycle(Depth depth) const {
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return position - display_start - output_latency(depth);
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}
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static constexpr uint32_t output_latencies[] = {
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19 >> 1, // 1 bpp.
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11 >> 1, // 2 bpp.
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7 >> 1, // 4 bpp.
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5 >> 1 // 8 bpp.
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};
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uint32_t output_latency(Depth depth) const {
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return output_latencies[static_cast<uint32_t>(depth)];
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}
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static constexpr uint8_t SyncEnded = 0x1;
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static constexpr uint8_t BorderStarted = 0x2;
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static constexpr uint8_t BorderEnded = 0x4;
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static constexpr uint8_t DisplayStarted = 0x8;
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static constexpr uint8_t DisplayEnded = 0x10;
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static constexpr uint8_t DidRestart = 0x20;
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uint8_t state = 0;
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Phase interlace_override_ = Phase::Sync;
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bool cursor_active = false;
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bool did_restart() {
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const bool result = state & DidRestart;
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state &= ~DidRestart;
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return result;
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}
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bool display_active() const {
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return (state & DisplayStarted) && !(state & DisplayEnded);
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}
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Phase phase(Phase horizontal_fallback = Phase::Border) const {
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if(is_vertical && interlace_override_ != Phase::Sync) {
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return interlace_override_;
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}
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// TODO: turn the following logic into a lookup table.
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if(!(state & SyncEnded)) {
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return Phase::Sync;
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}
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if(!(state & BorderStarted) || (state & BorderEnded)) {
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return Phase::Blank;
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}
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if constexpr (!is_vertical) {
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return horizontal_fallback;
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}
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if(!(state & DisplayStarted) || (state & DisplayEnded)) {
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return Phase::Border;
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}
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return Phase::Display;
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}
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};
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State<false> horizontal_state_;
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State<true> vertical_state_;
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int time_in_phase_ = 0;
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Phase phase_;
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uint16_t phased_border_colour_;
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int pixel_count_ = 0;
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int display_area_start_ = 0;
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uint16_t *pixels_ = nullptr;
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// It is elsewhere assumed that this size is a multiple of 8.
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static constexpr size_t PixelBufferSize = 256;
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// Programmer-set addresses.
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uint32_t buffer_start_ = 0;
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uint32_t buffer_end_ = 0;
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uint32_t frame_start_ = 0;
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uint32_t cursor_start_ = 0;
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int frame_start_sets_ = 0;
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int frame_starts_ = 0;
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int overages_ = 0;
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// Ephemeral address state.
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uint32_t address_ = 0;
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// Horizontal cursor output state.
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uint32_t cursor_address_ = 0;
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int cursor_pixel_ = 0;
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std::array<uint8_t, 32> cursor_image_;
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// Colour palette, converted to internal format.
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uint16_t border_colour_;
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std::array<uint16_t, 16> colours_{};
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std::array<uint16_t, 4> cursor_colours_{};
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// An interrupt flag; more closely related to the interface by which
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// my implementation of the IOC picks up an interrupt request than
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// to hardware.
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bool entered_flyback_ = false;
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// The divider that would need to be applied to a 24Mhz clock to
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// get half the current pixel clock; counting is in units of half
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// the pixel clock because that's the fidelity at which the programmer
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// places horizontal events — display start, end, sync period, etc.
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uint32_t clock_divider_ = 0;
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Depth colour_depth_;
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// A temporary buffer that holds video contents during the latency
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// period between their generation and their output.
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uint8_t bitmap_queue_[8];
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int bitmap_queue_pointer_ = 0;
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void set_clock_divider(uint32_t divider) {
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if(divider == clock_divider_) {
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return;
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}
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clock_divider_ = divider;
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const auto cycles_per_line = static_cast<int>(24'000'000 / (divider * 312 * 50));
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crt_.set_new_timing(
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cycles_per_line,
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312, /* Height of display. */
|
|
Outputs::CRT::PAL::ColourSpace,
|
|
Outputs::CRT::PAL::ColourCycleNumerator,
|
|
Outputs::CRT::PAL::ColourCycleDenominator,
|
|
Outputs::CRT::PAL::VerticalSyncLength,
|
|
Outputs::CRT::PAL::AlternatesPhase);
|
|
clock_rate_observer_.update_clock_rates();
|
|
}
|
|
|
|
void flush_pixels() {
|
|
crt_.output_data(time_in_phase_, static_cast<size_t>(pixel_count_));
|
|
time_in_phase_ = 0;
|
|
pixel_count_ = 0;
|
|
pixels_ = nullptr;
|
|
}
|
|
|
|
void set_phase(Phase phase) {
|
|
if(time_in_phase_) {
|
|
switch(phase_) {
|
|
default: crt_.output_sync(time_in_phase_); break;
|
|
case Phase::Blank: crt_.output_blank(time_in_phase_); break;
|
|
case Phase::Border: crt_.output_level<uint16_t>(time_in_phase_, phased_border_colour_); break;
|
|
case Phase::Display: flush_pixels(); break;
|
|
}
|
|
}
|
|
|
|
phase_ = phase;
|
|
time_in_phase_ = 0;
|
|
phased_border_colour_ = border_colour_;
|
|
pixel_count_ = 0;
|
|
}
|
|
|
|
void end_horizontal() {
|
|
set_phase(Phase::Sync);
|
|
display_area_start_ = -1;
|
|
bitmap_queue_pointer_ = 0;
|
|
}
|
|
|
|
template <Phase vertical_phase> void tick_horizontal() {
|
|
// Sync lines: obey nothing. All sync, all the time.
|
|
if constexpr (vertical_phase == Phase::Sync) {
|
|
return;
|
|
}
|
|
|
|
// Start interlaced sync lines: do blank from horizontal sync up to the programmed
|
|
// cutoff, then do sync.
|
|
if constexpr (vertical_phase == Phase::StartInterlacedSync) {
|
|
if(phase_ == Phase::Sync && horizontal_state_.phase() != Phase::Sync) {
|
|
set_phase(Phase::Blank);
|
|
}
|
|
if(phase_ == Phase::Blank && horizontal_state_.position == horizontal_timing_.interlace_sync_position) {
|
|
set_phase(Phase::Sync);
|
|
}
|
|
return;
|
|
}
|
|
|
|
// End interlaced sync lines: do sync up to the programmed cutoff, then do blank.
|
|
if constexpr (vertical_phase == Phase::EndInterlacedSync) {
|
|
if(phase_ == Phase::Sync && horizontal_state_.position == horizontal_timing_.interlace_sync_position) {
|
|
set_phase(Phase::Blank);
|
|
}
|
|
return;
|
|
}
|
|
|
|
// Blank lines: obey only the transition from sync to non-sync.
|
|
if constexpr (vertical_phase == Phase::Blank) {
|
|
if(phase_ == Phase::Sync && horizontal_state_.phase() != Phase::Sync) {
|
|
set_phase(Phase::Blank);
|
|
}
|
|
return;
|
|
}
|
|
|
|
// Border lines: ignore display phases; also reset the border phase if the colour changes.
|
|
if constexpr (vertical_phase == Phase::Border) {
|
|
const auto phase = horizontal_state_.phase(Phase::Border);
|
|
if(phase != phase_ || (phase_ == Phase::Border && border_colour_ != phased_border_colour_)) {
|
|
set_phase(phase);
|
|
}
|
|
return;
|
|
}
|
|
|
|
if constexpr (vertical_phase != Phase::Display) {
|
|
// Should be impossible.
|
|
assert(false);
|
|
}
|
|
|
|
// Some timing facts, to explain what would otherwise be magic constants.
|
|
static constexpr int CursorDelay = 5; // The cursor will appear six pixels after its programmed trigger point.
|
|
// ... BUT! Border and display are currently a pixel early. So move the
|
|
// cursor for alignment.
|
|
|
|
// Deal with sync and blank via set_phase(); collapse display and border into Phase::Display.
|
|
const auto phase = horizontal_state_.phase(Phase::Display);
|
|
if(phase != phase_) set_phase(phase);
|
|
|
|
// Update cursor pixel counter if applicable; this might mean triggering it
|
|
// and it might just mean advancing it if it has already been triggered.
|
|
cursor_pixel_ += 2;
|
|
if(vertical_state_.cursor_active) {
|
|
const auto pixel_position = horizontal_state_.position << 1;
|
|
if(pixel_position <= horizontal_timing_.cursor_start && (pixel_position + 2) > horizontal_timing_.cursor_start) {
|
|
cursor_pixel_ = int(horizontal_timing_.cursor_start) - int(pixel_position) - CursorDelay;
|
|
}
|
|
}
|
|
|
|
// If this is not [collapsed] Phase::Display, just stop here.
|
|
if(phase_ != Phase::Display) return;
|
|
|
|
// Display phase: maintain an output buffer (if available).
|
|
if(pixel_count_ == PixelBufferSize) flush_pixels();
|
|
if(!pixel_count_) pixels_ = reinterpret_cast<uint16_t *>(crt_.begin_data(PixelBufferSize));
|
|
|
|
// Output.
|
|
if(pixels_) {
|
|
// Paint the border colour for potential painting over.
|
|
|
|
if(horizontal_state_.is_outputting(colour_depth_)) {
|
|
const auto source = horizontal_state_.output_cycle(colour_depth_);
|
|
|
|
// TODO: all below should be delayed an extra pixel. As should the border, actually. Fix up externally?
|
|
switch(colour_depth_) {
|
|
case Depth::EightBPP: {
|
|
const uint8_t *bitmap = &bitmap_queue_[(source << 1) & 7];
|
|
pixels_[0] = (colours_[bitmap[0] & 0xf] & colour(0b0111'0011'0111)) | high_spread[bitmap[0] >> 4];
|
|
pixels_[1] = (colours_[bitmap[1] & 0xf] & colour(0b0111'0011'0111)) | high_spread[bitmap[1] >> 4];
|
|
} break;
|
|
|
|
case Depth::FourBPP:
|
|
pixels_[0] = colours_[bitmap_queue_[source & 7] & 0xf];
|
|
pixels_[1] = colours_[bitmap_queue_[source & 7] >> 4];
|
|
break;
|
|
|
|
case Depth::TwoBPP: {
|
|
uint8_t &bitmap = bitmap_queue_[(source >> 1) & 7];
|
|
pixels_[0] = colours_[bitmap & 3];
|
|
pixels_[1] = colours_[(bitmap >> 2) & 3];
|
|
bitmap >>= 4;
|
|
} break;
|
|
|
|
case Depth::OneBPP: {
|
|
uint8_t &bitmap = bitmap_queue_[(source >> 2) & 7];
|
|
pixels_[0] = colours_[bitmap & 1];
|
|
pixels_[1] = colours_[(bitmap >> 1) & 1];
|
|
bitmap >>= 2;
|
|
} break;
|
|
}
|
|
} else {
|
|
pixels_[0] = pixels_[1] = border_colour_;
|
|
}
|
|
|
|
// Overlay cursor if applicable.
|
|
if(cursor_pixel_ < 32) {
|
|
if(cursor_pixel_ >= 0) {
|
|
const auto pixel = cursor_image_[static_cast<size_t>(cursor_pixel_)];
|
|
if(pixel) {
|
|
pixels_[0] = cursor_colours_[pixel];
|
|
}
|
|
}
|
|
if(cursor_pixel_ >= -1 && cursor_pixel_ < 31) {
|
|
const auto pixel = cursor_image_[static_cast<size_t>(cursor_pixel_ + 1)];
|
|
if(pixel) {
|
|
pixels_[1] = cursor_colours_[pixel];
|
|
}
|
|
}
|
|
}
|
|
|
|
pixels_ += 2;
|
|
}
|
|
|
|
pixel_count_ += 2;
|
|
}
|
|
};
|
|
|
|
}
|