Thomas Harte a914eadc85 Ensured that register 6 is checked on every loop.		2017-08-22 22:17:45 -04:00
..
1770	Added an easy way for disk controllers to clamp termination of written data exactly to the index hole.	2017-08-15 16:05:10 -04:00
6522	Standardises on const [Half]Cycles as the thing called and returned, rather than const [Half]Cycles & as it's explicitly defined to be only one int in size, so using a reference is overly weighty.	2017-07-27 22:05:29 -04:00
6532	Standardises on const [Half]Cycles as the thing called and returned, rather than const [Half]Cycles & as it's explicitly defined to be only one int in size, so using a reference is overly weighty.	2017-07-27 22:05:29 -04:00
6560	Corrects the US colour palette, effectively undoing what was a mistaken adjustment for the time when Oric-centric phase alignment was built into the CRT based on a false calculation that it wouldn't affect the machines that generate chrominance functionally.	2017-08-16 09:58:34 -04:00
6845	Ensured that register 6 is checked on every loop.	2017-08-22 22:17:45 -04:00
8255	Improved comments.	2017-08-08 07:44:46 -04:00
8272	Worked logic all the way down to the CPC. If the 8272 announces that it is asleep, it is now no longer clocked. Also very slightly cut down on IRQ line chatter to the Z80.	2017-08-20 12:05:00 -04:00
AY38910	Inverted meaning of register_masks, as it's a bit weird that the mask is inverted immediately upon usage. It's a left-over from thinking the unused bits should be 1s; unit tests reveal they should be 0s. Comment updated appropriately.	2017-08-16 09:29:48 -04:00