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Merge pull request #48 from Russell-S-Harper/development
CODE and DATA type headers, and indices/offsets for LDI and SVI.
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Russell-S-Harper
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@ -25,9 +25,9 @@ Completed:
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In progress:
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* context switching for simple multitasking
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* a unit test suite to ensure each instruction is correct
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* a proof-of-concept application
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* “simple” multitasking?
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The meat of the project:
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@ -11,7 +11,7 @@ page6.obj: rom.h macros.h globals.h page6.src
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xa -C -M page6.asm -l page6.lbl -o page6.obj
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globals.h: common.obj
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grep -E -v '^(_|CMN_CD|CMN_DT|FN_FX)' common.lbl | sed -e 's/, 0, 0x0000//' -e 's/, / = /' -e 's/ 0x/ \x24/' > globals.h
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grep -E -v '^(_|CMN_CD|CMN_DT|FN_FX|CODE|DATA)' common.lbl | sed -e 's/, 0, 0x0000//' -e 's/, / = /' -e 's/ 0x/ \x24/' > globals.h
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clean:
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rm -f globals.h page6.asm common.obj page6.obj common.lbl page6.lbl system.obj
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@ -2,6 +2,7 @@
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#include "common.h"
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; ROM code header
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.BYTE CODE
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.WORD CMN_CD, _END_CMN_CD - CMN_CD
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; beginning of ROM code
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@ -976,14 +977,13 @@ _CPR .( ; CPR pq 0c pq Rp <- Rq - copy register
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_INILS .( ; common initialization for LDI and SVI
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JSR _CPYI1 ; copy q to I1
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CLC ; shift to get an address
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ROR _I1+3
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ROR _I1+2
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ROR _I1+1
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CLC
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ROR _I1+3
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ROR _I1+2
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ROR _I1+1
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CLC ; add the allocated memory offset
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LDA _ARL
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ADC _I1+1
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STA _I1+1
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LDA _ARH
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ADC _I1+2
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STA _I1+2
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RTS
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.)
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@ -1054,6 +1054,7 @@ _3 ORA _F
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_END_CMN_CD
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; ROM data header
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.BYTE DATA
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.WORD CMN_DT, _END_CMN_DT - CMN_DT
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; beginning of ROM data
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@ -1071,6 +1072,7 @@ MNS_1 .BYTE $00, $fc, $ff, $ff
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_END_CMN_DT
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; 6502 addresses
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.BYTE DATA
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.WORD ADDR, 6
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; 6502 NMI, Reset and IRQ
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@ -42,13 +42,10 @@
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; BRO xxyy 0a yy xx PC <- PC + xxyy - branch if overflow (after arithmetic operations)
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; BRU xxyy 0b yy xx PC <- PC + xxyy - branch if underflow (after arithmetic operations)
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; CPR pq 0c pq Rp <- Rq - copy register
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; LDI pq 0d pq Rp <- (int(Rq)) - load indirect via allocated memory offset
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; SVI pq 0e pq (int(Rp)) <- Rq - save indirect via allocated memory offset
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; LDI pq 0d pq Rp <- (int(Rq)) - load indirect via index to allocated memory (offset = index * 4)
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; SVI pq 0e pq (int(Rp)) <- Rq - save indirect via index to allocated memory (offset = index * 4)
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; CMR pq 0f pq F <- Rp <=> Rq - compare registers
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; 32 bytes in page zero for memory map allocation
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_MAP = _R0 - 256 / 8
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; 40 bytes in page zero for common registers
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_R0 = $100 - 4 * (10 + 10)
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_R1 = _R0 + 4
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@ -69,8 +66,8 @@ _I3 = _I2 + 4
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_I4 = _I3 + 4
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_I5 = _I4 + 4
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_I6 = _I5 + 4 ; register I6 maintains common status
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_I7 = _I6 + 4 ; register I7 maintains locations of process and allocated memory
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_I8 = _I7 + 4 ; register I8 maintains process information for context switching
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_I7 = _I6 + 4 ; register I7 maintains locations of code and allocated memory
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_I8 = _I7 + 4 ; register I8 is reserved for future use, e.g. context switching
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_I9 = _I8 + 4 ; register I9 saves/restores processor status
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; register I6 maintains common status
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@ -91,19 +88,15 @@ _F_N = 32 ; if Rr < 0.0 (after TST)
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_F_O = 64 ; if overflow (after arithmetic operations)
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_F_U = 128 ; if underflow (after arithmetic operations)
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; register I7 maintains locations of code and allocated real memory addresses
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; register I7 maintains locations of code and allocated memory
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_CRL = _I7 ; code low and high bytes
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_CRH = _CRL + 1
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_ARL = _CRH + 1 ; allocated low and high bytes
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_ARH = _ARL + 1
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_CR = _CRL ; code real memory address
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_AR = _ARL ; allocated real memory address
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_CR = _CRL ; code memory address
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_AR = _ARL ; allocated memory address
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; register I8 maintains process information for context switching
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_PSO = _I8 ; offset to running processes table
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_PSF = _PSO + 1 ; initial running process status PPPCCCLF
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_PST = _PSF + 1 ; current process status
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_PSI = _PST + 1 ; process stack index to save/restore
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; register I8 is reserved for future use, e.g. context switching
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; register I9 saves/restores processor status
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; (dd cc bb aa) aa: accumulator, bb: index X, cc: index Y, dd: processor status
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@ -116,31 +109,11 @@ _PS = _IDY + 1 ; saved processor status to restore
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; using some of page two for register stack
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_RS = $200 ; register stack
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_RSS = _R0 ; register stack size
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_RSS = FN_FX - _RS ; register stack size
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; for context switching, _R0 to _RS + _RSS - 1 needs to be saved and restored
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; this should comprise two pages or 512 bytes
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; system & user functions
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; the following are common process table and system & user functions
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; process information in the middle of page two
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_RP = _RS + _RSS ; running processes table
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_RPS = FN_FX - _RP ; running process table size
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; process information indices
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_RPV_I = 0 ; 4 bytes virtual memory address
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_RPR_I = _RPV_I + 4 ; 2 bytes real memory address
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_RPS_I = _RPR_I + 2 ; 1 byte size in pages: code + allocated memory + context switching
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_RPF_I = _RPS_I + 1 ; 1 byte status PPPCCCLF: P priority / C counter / L loaded / F finished
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; bits for status
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_S_L = 1 ; if program is loaded in memory
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_S_F = 2 ; if program is finished
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_RPE = _RPF_I + 1 ; size of running process entry
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_RPL = _RPS / _RPE ; number of running processes limit
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; last 32 bytes of page two
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; 32 bytes at the end of page two
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FN_FX = $300 - 2 * 16 ; list of system and user functions
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; function constants
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@ -183,4 +156,8 @@ _MSK_R = %00111100 ; mask for registers
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_MSK_T = (_F_Z + _F_P + _F_N) ^ $ff ; mask for TST
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_MSK_C = (_F_E + _F_G + _F_L) ^ $ff ; mask for CMP
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; section identifiers
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CODE = %10101010 ; to indicate CODE section
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DATA = %01010101 ; to indicate DATA section
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#endif /* __COMMON_H */
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@ -78,7 +78,7 @@
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#define EXT(f) .BYTE _EXT_C + (f)
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; header, begin and end of blocks
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#define HDR(a) .WORD a, _END_##a - a:* = * - 4:a .(
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#define HDR(t, a) .BYTE t:.WORD a, _END_##a - a:* = * - 5:a .(
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#define BGN(a) a .(
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#define END(a) .):_END_##a
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@ -4,12 +4,16 @@
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* = $600
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HDR(DEMO)
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HDR(CODE, DEMO)
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CMN
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SET(R0, 9.4662)
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SET(R1, 0)
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SVI(R1, R0)
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PSH(R0)
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BRS(FACTORIAL)
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POP(R4)
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SET(R5, 0)
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LDI(R6, R5)
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ESC
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BRK
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@ -29,4 +33,9 @@ END(FACTORIAL)
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END(DEMO)
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SVD_T .BYTE 0, 0, 0, 0
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HDR(DATA, WORKING)
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ONE .BYTE 0, 0, 0, 0
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TWO .BYTE 0, 0, 0, 0
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END(WORKING)
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@ -7,6 +7,7 @@
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#define _R8 0xd0
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#define _I0 0xd8
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#define _I6 0xf0
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#define _I7 0xf4
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#define _I8 0xf8
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/* (dd cc bb aa) aa: index for register stack RS / ccbb: program counter PC / dd: flags F UONPZLGE */
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@ -16,6 +17,17 @@
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#define _F _PCH + 1 /* flags */
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#define _PC _PCL /* program counter */
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/* register I7 maintains locations of code and allocated memory */
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#define _CRL _I7 /* code low and high bytes */
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#define _CRH _CRL + 1
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#define _ARL _CRH + 1 /* allocated low and high bytes */
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#define _ARH _ARL + 1
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#define _CR _CRL /* code memory address */
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#define _AR _ARL /* allocated memory address */
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#define CODE 0xaa /* to indicate CODE section */
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#define DATA 0x55 /* to indicate DATA section */
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uint8_t memory[65536];
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uint8_t read6502(uint16_t address) {
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@ -48,22 +60,34 @@ void hook() {
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int main() {
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uint8_t header[4];
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uint8_t header[5];
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while (fread(header, sizeof(header), 1, stdin))
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{
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uint16_t index = header[0] + (header[1] << 8);
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uint16_t length = header[2] + (header[3] << 8);
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uint8_t type = header[0];
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uint16_t index = header[1] + (header[2] << 8);
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uint16_t length = header[3] + (header[4] << 8);
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printf("\n%04x %u\n", index, length);
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printf("\n%x %04x %u\n", type, index, length);
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if (fread(memory + index, length, 1, stdin))
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{
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memory[_PCL] = header[0];
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memory[_PCH] = header[1];
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switch (type) {
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case CODE:
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memory[_CRL] = header[1];
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memory[_CRH] = header[2];
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break;
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case DATA:
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memory[_ARL] = header[1];
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memory[_ARH] = header[2];
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break;
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}
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}
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}
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memory[_PCL] = memory[_CRL];
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memory[_PCH] = memory[_CRH];
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hookexternal(hook);
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reset6502();
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