mirror of
https://github.com/MoleskiCoder/EightBit.git
synced 2026-10-22 07:02:37 +00:00
6502 implementation synced strongly to C# version. Single step tests complete again
This commit is contained in:
Adrian Conlon committed
1 parent
0ef9ac4a4b
commit
bcdb5e7fcf
6 files changed
+1182
-637
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@@ -6,7 +6,7 @@ void checker_t::addActualCycle(const uint16_t address, const uint8_t value, cons
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}
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void checker_t::addActualCycle(const EightBit::register16_t address, const uint8_t value, const std::string_view action) {
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addActualCycle(address.word, value, action);
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addActualCycle(address.joined, value, action);
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}
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void checker_t::addActualReadCycle(const EightBit::register16_t address, const uint8_t value) {
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@@ -95,7 +95,7 @@ void checker_t::initialiseState(const test_t test) {
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const auto initial = test.initial();
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cpu.PC().word = initial.pc();
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cpu.PC().joined = initial.pc();
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cpu.S() = initial.s();
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cpu.A() = initial.a();
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cpu.X() = initial.x();
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@@ -113,11 +113,11 @@ void checker_t::initialise() {
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auto& bus = runner();
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bus.ReadByte.connect([this](EightBit::EventArgs&) {
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bus.CPU().ReadMemory.connect([this](EightBit::EventArgs&) {
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addActualReadCycle(runner().ADDRESS(), runner().DATA());
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});
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bus.WrittenByte.connect([this](EightBit::EventArgs&) {
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bus.CPU().WrittenMemory.connect([this](EightBit::EventArgs&) {
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addActualWriteCycle(runner().ADDRESS(), runner().DATA());
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});
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@@ -166,7 +166,7 @@ bool checker_t::checkState(test_t test) {
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return false;
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const auto final = test.final();
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const auto pc_good = check("PC", final.pc(), cpu.PC().word);
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const auto pc_good = check("PC", final.pc(), cpu.PC().joined);
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const auto s_good = check("S", final.s(), cpu.S());
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const auto a_good = check("A", final.a(), cpu.A());
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const auto x_good = check("X", final.x(), cpu.X());
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@@ -218,7 +218,7 @@ void checker_t::check(test_t test) {
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runner().raisePOWER();
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initialiseState(test);
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const auto pc = cpu.PC().word;
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const auto pc = cpu.PC().joined;
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m_cycles = cpu.step();
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runner().lowerPOWER();
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@@ -235,7 +235,7 @@ void checker_t::check(test_t test) {
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add_disassembly(pc);
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const auto final = test.final();
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raise("PC", final.pc(), cpu.PC().word);
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raise("PC", final.pc(), cpu.PC().joined);
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raise("S", final.s(), cpu.S());
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raise("A", final.a(), cpu.A());
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raise("X", final.x(), cpu.X());
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+413
-179
@@ -3,7 +3,6 @@
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#include <cstdint>
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#include <utility>
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#include <EightBitCompilerDefinitions.h>
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#include <LittleEndianProcessor.h>
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#include <Register.h>
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#include <Signal.h>
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@@ -14,6 +13,23 @@ namespace EightBit {
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class Bus;
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class MOS6502 : public LittleEndianProcessor {
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private:
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using base = LittleEndianProcessor;
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private:
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uint8_t m_x = 0; // index register X
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uint8_t m_y = 0; // index register Y
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uint8_t m_a = 0; // accumulator
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uint8_t m_s = 0; // stack pointer
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uint8_t m_p = 0; // processor status
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register16_t m_intermediate;
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uint8_t m_fixedPage = 0;
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uint8_t m_unfixedPage = 0;
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bool m_immediateInstruction = false;
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public:
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DECLARE_PIN_INPUT(NMI)
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DECLARE_PIN_INPUT(SO)
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@@ -35,9 +51,6 @@ namespace EightBit {
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MOS6502(Bus& bus) noexcept;
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//Signal<MOS6502> ExecutingInstruction;
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//Signal<MOS6502> ExecutedInstruction;
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void execute() noexcept final;
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void poweredStep() noexcept final;
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@@ -53,151 +66,131 @@ namespace EightBit {
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void handleRESET() noexcept final;
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void handleINT() noexcept final;
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void busWrite() noexcept final;
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[[nodiscard]] uint8_t busRead() noexcept final;
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void memoryWrite() noexcept final;
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void memoryRead() noexcept final;
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// Instructions with BCD effects
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void sbc() noexcept;
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[[nodiscard]] virtual uint8_t sub(uint8_t operand, int borrow = 0) noexcept;
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[[nodiscard]] uint8_t sub_b(uint8_t operand, int borrow = 0) noexcept;
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[[nodiscard]] uint8_t sub_d(uint8_t operand, int borrow = 0) noexcept;
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virtual void adc() noexcept;
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void adc_b() noexcept;
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void adc_d() noexcept;
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// Undocumented compound instructions (with BCD effects)
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virtual void arr() noexcept;
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void arr_b(uint8_t value) noexcept;
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void arr_d(uint8_t value) noexcept;
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void getPagedInto(uint8_t page, uint8_t offset, register16_t& into) { Processor::getPagedInto(page, offset, into); }
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private:
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const uint8_t IRQvector = 0xfe; // IRQ vector
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const uint8_t RSTvector = 0xfc; // RST vector
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const uint8_t NMIvector = 0xfa; // NMI vector
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const uint8_t _vectorIRQ = 0xfe; // IRQ vector
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const uint8_t _vectorRST = 0xfc; // RST vector
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const uint8_t _vectorNMI = 0xfa; // NMI vector
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void handleNMI() noexcept;
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void handleSO() noexcept;
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enum interrupt_source_t { hardware, software };
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enum interrupt_type_t { reset, non_reset };
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void interrupt(uint8_t vector, interrupt_source_t source = hardware, interrupt_type_t type = non_reset) noexcept;
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void adjustInterruptFlags();
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void reset();
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void interruptMaskable();
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void interruptNonMaskable();
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void BRK() noexcept;
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constexpr void updateStack(uint8_t position) noexcept { BUS().ADDRESS() = { position, 1 }; }
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constexpr void lowerStack() noexcept { updateStack(S()--); }
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constexpr void raiseStack() noexcept { updateStack(++S()); }
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void push(uint8_t value) noexcept final;
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[[nodiscard]] uint8_t pop() noexcept final;
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void pop() noexcept final;
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// Dummy stack push, used during RESET
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void dummyPush() noexcept;
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uint8_t readFromBus() noexcept {
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raiseRW();
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return LittleEndianProcessor::busRead();
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}
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void readFromMemory() noexcept;
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void writeToMemory() noexcept;
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void writeToBus() noexcept {
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lowerRW();
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LittleEndianProcessor::busWrite();
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}
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void modifyWrite(uint8_t data) noexcept;
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// Read the opcode within the existing cycle
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uint8_t fetchInstruction() noexcept final {
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[[nodiscard]] uint8_t fetchInstruction() noexcept final;
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// Instruction fetch beginning
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lowerSYNC();
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#pragma region Addressing modes
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assert(cycles() == 1 && "An extra cycle has occurred");
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#pragma region Address page fixup
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// Can't use fetchByte, since that would add an extra tick.
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Address_Immediate();
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opcode() = readFromBus();
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[[nodiscard]] constexpr auto fixedPage() const noexcept { return m_fixedPage; }
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[[nodiscard]] constexpr auto unfixedPage() const noexcept { return m_unfixedPage; }
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[[nodiscard]] constexpr auto fixed() const noexcept { return fixedPage() != unfixedPage(); }
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assert(cycles() == 1 && "BUS read has introduced stray cycles");
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void maybeFixup() noexcept;
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void fixup() noexcept;
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void maybeFixupRead() noexcept;
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void fixupRead() noexcept;
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// Instruction fetch has now completed
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raiseSYNC();
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return opcode();
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constexpr void noteFixedAddress(int address) noexcept {
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noteFixedAddress((uint16_t)address);
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}
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// Addressing modes
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constexpr void noteFixedAddress(uint16_t address) noexcept {
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m_unfixedPage = BUS().ADDRESS().high;
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intermediate() = address;
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m_fixedPage = intermediate().high;
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BUS().ADDRESS().low = intermediate().low;
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}
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constexpr void noteFixedAddress(register16_t fixed) noexcept { m_fixed_page = fixed.high; BUS().ADDRESS().low = fixed.low; }
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#pragma endregion
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constexpr void Address_Immediate() noexcept { BUS().ADDRESS() = PC()++; }
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void Address_Absolute() noexcept { BUS().ADDRESS() = fetchWord(); }
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void Address_ZeroPage() noexcept { BUS().ADDRESS() = { fetchByte(), 0 }; }
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void Address_ZeroPageIndirect() noexcept { Address_ZeroPage(); BUS().ADDRESS() = getWordPaged(); }
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void Address_Indirect() noexcept { Address_Absolute(); BUS().ADDRESS() = getWordPaged(); }
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void Address_ZeroPageWithIndex(uint8_t index) noexcept { AM_ZeroPage(); BUS().ADDRESS().low += index; }
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void Address_ZeroPageX() noexcept { Address_ZeroPageWithIndex(X()); }
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void Address_ZeroPageY() noexcept { Address_ZeroPageWithIndex(Y()); }
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void Address_AbsoluteWithIndex(uint8_t index) noexcept { Address_Absolute(); noteFixedAddress(BUS().ADDRESS() + index); }
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void Address_AbsoluteX() noexcept { Address_AbsoluteWithIndex(X()); }
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void Address_AbsoluteY() noexcept { Address_AbsoluteWithIndex(Y()); }
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void Address_IndexedIndirectX() noexcept { Address_ZeroPageX(); BUS().ADDRESS() = getWordPaged(); }
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void Address_IndirectIndexedY() noexcept { Address_ZeroPageIndirect(); noteFixedAddress(BUS().ADDRESS() + Y()); }
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#pragma region Address resolution
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// Addressing modes, with read
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void getAddressPaged() noexcept;
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void absoluteAddress() noexcept;
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void zeroPageAddress() noexcept;
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void zeroPageIndirectAddress() noexcept;
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void indirectAddress() noexcept;
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void zeroPageWithIndexAddress(uint8_t index) noexcept;
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void zeroPageXAddress() noexcept;
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void zeroPageYAddress() noexcept;
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void absoluteWithIndexAddress(uint8_t index) noexcept;
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void absoluteXAddress() noexcept;
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void absoluteYAddress() noexcept;
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void indexedIndirectXAddress() noexcept;
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void indirectIndexedYAddress() noexcept;
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void AM_Immediate() noexcept { Address_Immediate(); memoryRead(); }
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void AM_Absolute() noexcept { Address_Absolute(); memoryRead(); }
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void AM_ZeroPage() noexcept { Address_ZeroPage(); memoryRead(); }
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void AM_ZeroPageX() noexcept { Address_ZeroPageX(); memoryRead(); }
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void AM_ZeroPageY() noexcept { Address_ZeroPageY(); memoryRead(); }
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void AM_IndexedIndirectX() noexcept { Address_IndexedIndirectX(); memoryRead(); }
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void AM_AbsoluteX() noexcept { Address_AbsoluteX(); maybe_fixupR(); }
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void AM_AbsoluteY() noexcept { Address_AbsoluteY(); maybe_fixupR(); }
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void AM_IndirectIndexedY() noexcept { Address_IndirectIndexedY(); maybe_fixupR(); }
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#pragma endregion
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#pragma region Address and read
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void immediate() noexcept;
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void absolute() noexcept;
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void zeroPage() noexcept;
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void zeroPageX() noexcept;
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void zeroPageY() noexcept;
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void indexedIndirectX() noexcept;
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void absoluteX() noexcept;
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void absoluteY() noexcept;
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void indirectIndexedY() noexcept;
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#pragma endregion
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#pragma endregion
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// Flag checking
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[[nodiscard]] constexpr auto interruptMasked() const noexcept { return P() & IF; }
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[[nodiscard]] constexpr auto decimal() const noexcept { return P() & DF; }
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[[nodiscard]] constexpr auto denary() const noexcept { return P() & DF; }
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[[nodiscard]] static constexpr auto negative(uint8_t data) noexcept { return data & NF; }
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[[nodiscard]] constexpr auto negative() const noexcept { return negative(P()); }
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[[nodiscard]] static constexpr auto negativeTest(uint8_t data) noexcept { return data & NF; }
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[[nodiscard]] static constexpr auto zeroTest(uint8_t data) noexcept { return data & ZF; }
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[[nodiscard]] static constexpr auto carryTest(uint8_t data) noexcept { return data & CF; }
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[[nodiscard]] static constexpr auto overflowTest(uint8_t data) noexcept { return data & VF; }
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[[nodiscard]] static constexpr auto zero(uint8_t data) noexcept { return data & ZF; }
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[[nodiscard]] constexpr auto zero() const noexcept { return zero(P()); }
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[[nodiscard]] static constexpr auto overflow(uint8_t data) noexcept { return data & VF; }
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[[nodiscard]] constexpr auto overflow() const noexcept { return overflow(P()); }
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[[nodiscard]] static constexpr auto carry(uint8_t data) noexcept { return data & CF; }
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[[nodiscard]] constexpr auto carry() const noexcept { return carry(P()); }
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[[nodiscard]] constexpr auto negative() const noexcept { return negativeTest(P()); }
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[[nodiscard]] constexpr auto zero() const noexcept { return zeroTest(P()); }
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[[nodiscard]] constexpr auto overflow() const noexcept { return overflowTest(P()); }
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[[nodiscard]] constexpr auto carry() const noexcept { return carryTest(P()); }
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// Flag adjustment
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constexpr void adjustZero(const uint8_t datum) noexcept { reset_flag(ZF, datum); }
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constexpr void adjustNegative(const uint8_t datum) noexcept { set_flag(NF, negative(datum)); }
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constexpr void adjustZero(const uint8_t datum) noexcept { resetFlag(ZF, datum); }
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constexpr void adjustNegative(const uint8_t datum) noexcept { setFlag(NF, negativeTest(datum)); }
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constexpr void adjustNZ(const uint8_t datum) noexcept {
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adjustZero(datum);
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adjustNegative(datum);
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}
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constexpr void adjustOverflow_add(uint8_t operand) noexcept {
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const auto data = BUS().DATA();
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const auto intermediate = m_intermediate.low;
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set_flag(VF, negative(~(operand ^ data) & (operand ^ intermediate)));
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}
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constexpr void adjustOverflow_subtract(uint8_t operand) noexcept {
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const auto data = BUS().DATA();
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const auto intermediate = m_intermediate.low;
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set_flag(VF, negative((operand ^ data) & (operand ^ intermediate)));
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}
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// Miscellaneous
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void branch(int condition) noexcept;
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[[nodiscard]] constexpr auto through(const uint8_t data) noexcept {
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adjustNZ(data);
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return data;
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@@ -207,107 +200,348 @@ namespace EightBit {
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return through(BUS().DATA());
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}
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#define MW(OPERATION) { \
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const auto result = OPERATION(BUS().DATA()); \
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memoryWrite(); \
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memoryWrite(result); \
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}
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void maybe_fixup() noexcept {
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if (BUS().ADDRESS().high != m_fixed_page)
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fixup();
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}
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void fixup() noexcept {
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memoryRead();
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BUS().ADDRESS().high = m_fixed_page;
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}
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void maybe_fixupR() noexcept { maybe_fixup(); memoryRead(); }
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void fixupR() noexcept { fixup(); memoryRead(); }
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// Status flag operations
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constexpr static void set_flag(uint8_t& f, int which, int condition) noexcept { f = setBit(f, which, condition); }
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constexpr void set_flag(int which, int condition) noexcept { set_flag(P(), which, condition); }
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constexpr void set_flag(int which) noexcept { P() = setBit(P(), which); }
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constexpr static void setFlag(uint8_t& f, int which, int condition) noexcept { f = setBit(f, which, condition); }
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constexpr void setFlag(int which, int condition) noexcept { setFlag(P(), which, condition); }
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constexpr void setFlag(int which) noexcept { P() = setBit(P(), which); }
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constexpr static void reset_flag(uint8_t& f, int which, int condition) noexcept { f = clearBit(f, which, condition); }
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constexpr void reset_flag(int which, int condition) noexcept { reset_flag(P(), which, condition); }
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constexpr void reset_flag(int which) noexcept { P() = clearBit(P(), which); }
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constexpr static void resetFlag(uint8_t& f, int which, int condition) noexcept { f = clearBit(f, which, condition); }
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constexpr void resetFlag(int which, int condition) noexcept { resetFlag(P(), which, condition); }
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constexpr void resetFlag(int which) noexcept { P() = clearBit(P(), which); }
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// Chew up a cycle
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void swallow() noexcept { memoryRead(PC()); }
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void swallow_stack() noexcept { memoryRead({ S(), 1 }); }
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void swallow_fetch() noexcept { fetchByte(); }
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void swallowRead() noexcept;
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void swallowPop() noexcept;
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void swallowFetch() noexcept;
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||||
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||||
// Instruction implementations
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||||
#pragma region Instruction implementations
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||||
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||||
void andr() noexcept;
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void bit() noexcept;
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||||
void cmp(uint8_t first) noexcept;
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||||
[[nodiscard]] uint8_t dec(uint8_t value) noexcept;
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void eorr() noexcept;
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[[nodiscard]] uint8_t inc(uint8_t value) noexcept;
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void jsr() noexcept;
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void orr() noexcept;
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void php() noexcept;
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void plp() noexcept;
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void rti() noexcept;
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void rts() noexcept;
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#pragma region Miscellaneous
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[[nodiscard]] constexpr uint8_t asl(uint8_t value) noexcept {
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set_flag(CF, value & NF);
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static constexpr void NOP() noexcept {
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// No operation!
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}
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||||
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void JMP() noexcept;
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||||
#pragma endregion
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#pragma region Register to register transfer
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||||
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constexpr void TAX() noexcept { X() = through(A()); }
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constexpr void TXA() noexcept { A() = through(X()); }
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constexpr void TAY() noexcept { Y() = through(A()); }
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constexpr void TYA() noexcept { A() = through(Y()); }
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constexpr void TXS() noexcept { S() = X(); }
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constexpr void TSX() noexcept { X() = through(S()); }
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||||
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#pragma endregion
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||||
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#pragma region Load and store
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||||
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||||
constexpr void LDA() noexcept { A() = through(); }
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void STA() noexcept;
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||||
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||||
constexpr void LDX() noexcept { X() = through(); }
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||||
void STX() noexcept;
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||||
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||||
void LDY() noexcept { Y() = through(); }
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void STY() noexcept;
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||||
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||||
#pragma endregion
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||||
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||||
#pragma region Branching
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||||
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||||
void fixupBranch(int8_t relative) noexcept;
|
||||
void branch(bool condition) noexcept;
|
||||
|
||||
void branchNot(int condition) noexcept;
|
||||
void branch(int condition) noexcept;
|
||||
|
||||
void BCS() noexcept;
|
||||
void BCC() noexcept;
|
||||
void BVC() noexcept;
|
||||
void BMI() noexcept;
|
||||
void BPL() noexcept;
|
||||
void BVS() noexcept;
|
||||
void BEQ() noexcept;
|
||||
void BNE() noexcept;
|
||||
|
||||
#pragma endregion
|
||||
|
||||
#pragma region Status flag operations
|
||||
|
||||
constexpr void SEI() noexcept { setFlag(IF); }
|
||||
constexpr void CLI() noexcept { resetFlag(IF); }
|
||||
constexpr void SEV() noexcept { setFlag(VF); }
|
||||
constexpr void CLV() noexcept { resetFlag(VF); }
|
||||
constexpr void SEC() noexcept { setFlag(CF); }
|
||||
constexpr void CLC() noexcept { resetFlag(CF); }
|
||||
constexpr void SED() noexcept { setFlag(DF); }
|
||||
constexpr void CLD() noexcept { resetFlag(DF); }
|
||||
|
||||
#pragma endregion
|
||||
|
||||
#pragma region Instructions with BCD effects
|
||||
|
||||
#pragma region Addition / subtraction
|
||||
|
||||
#pragma region Subtraction
|
||||
|
||||
constexpr void adjustOverflowSubtract(uint8_t operand) noexcept {
|
||||
const auto data = BUS().DATA();
|
||||
const auto result = intermediate().low;
|
||||
setFlag(VF, negativeTest((operand ^ data) & (operand ^ result)));
|
||||
}
|
||||
|
||||
constexpr void SBC() noexcept {
|
||||
const auto operand = A();
|
||||
A() = SUB(operand, carryTest(~P()));
|
||||
PostSUB(operand);
|
||||
}
|
||||
|
||||
constexpr uint8_t SUB(uint8_t operand, int borrow) noexcept {
|
||||
return denary() != 0 ? decimalSUB(operand, borrow) : binarySUB(operand, borrow);
|
||||
}
|
||||
|
||||
constexpr uint8_t binarySUB(uint8_t operand, int borrow = 0) noexcept {
|
||||
const auto data = BUS().DATA();
|
||||
intermediate() = operand - data - borrow;
|
||||
|
||||
const auto result = intermediate().low;
|
||||
adjustNZ(result);
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
constexpr uint8_t decimalSUB(uint8_t operand, int borrow) noexcept {
|
||||
|
||||
binarySUB(operand, borrow);
|
||||
|
||||
const auto data = BUS().DATA();
|
||||
auto low = lowNibble(operand) - lowNibble(data) - borrow;
|
||||
const auto lowNegative = negativeTest(low);
|
||||
if (lowNegative != 0)
|
||||
low -= 6;
|
||||
|
||||
auto high = highNibble(operand) - highNibble(data) - (lowNegative >> 7);
|
||||
const auto highNegative = negativeTest(high);
|
||||
if (highNegative != 0)
|
||||
high -= 6;
|
||||
|
||||
return promoteNibble(high) | lowNibble(low);
|
||||
}
|
||||
|
||||
constexpr void PostSUB(uint8_t operand) noexcept {
|
||||
adjustOverflowSubtract(operand);
|
||||
resetFlag(CF, intermediate().high);
|
||||
}
|
||||
|
||||
#pragma endregion
|
||||
|
||||
#pragma region Addition
|
||||
|
||||
constexpr void adjustOverflowAdd(uint8_t operand) noexcept {
|
||||
const auto data = BUS().DATA();
|
||||
const auto result = intermediate().low;
|
||||
setFlag(VF, negativeTest(~(operand ^ data) & (operand ^ result)));
|
||||
}
|
||||
|
||||
constexpr void ADC() noexcept { ADC(BUS().DATA()); }
|
||||
|
||||
constexpr void ADC(uint8_t data) noexcept { A() = denary() != 0 ? decimalADC(data) : binaryADC(data); }
|
||||
|
||||
[[nodiscard]] constexpr uint8_t binaryADC(uint8_t data) noexcept {
|
||||
const auto operand = A();
|
||||
intermediate() = operand + data + carry();
|
||||
adjustOverflowAdd(operand);
|
||||
setFlag(CF, carryTest(intermediate().high));
|
||||
|
||||
const auto result = intermediate().low;
|
||||
adjustNZ(result);
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
[[nodiscard]] constexpr uint8_t decimalADC(uint8_t data) noexcept {
|
||||
|
||||
const auto operand = A();
|
||||
|
||||
auto low = (uint16_t)(lowerNibble(operand) + lowerNibble(data) + carry());
|
||||
intermediate() = higherNibble(operand) + higherNibble(data);
|
||||
|
||||
adjustZero(lowByte((uint16_t)(low + intermediate().joined)));
|
||||
|
||||
if (low > 0x09)
|
||||
{
|
||||
intermediate() += 0x10;
|
||||
low += 0x06;
|
||||
}
|
||||
|
||||
adjustNegative(intermediate().low);
|
||||
adjustOverflowAdd(operand);
|
||||
|
||||
if (intermediate().joined > 0x90)
|
||||
intermediate() += 0x60;
|
||||
|
||||
setFlag(CF, intermediate().high);
|
||||
|
||||
return (uint8_t)(lowerNibble(lowByte((uint16_t)(low + intermediate().joined))) | higherNibble(intermediate().low));
|
||||
}
|
||||
|
||||
#pragma endregion
|
||||
|
||||
#pragma endregion
|
||||
|
||||
#pragma endregion
|
||||
|
||||
#pragma region Bitwise operations
|
||||
|
||||
constexpr void ORA() noexcept { ORA(BUS().DATA()); }
|
||||
constexpr void ORA(uint8_t data) noexcept { A() = through(A() | data); }
|
||||
|
||||
constexpr void AND() noexcept { AND(BUS().DATA()); }
|
||||
constexpr void AND(uint8_t data) noexcept { A() = through(A() & data); }
|
||||
|
||||
constexpr void EOR() noexcept { EOR(BUS().DATA()); }
|
||||
constexpr void EOR(uint8_t data) noexcept { A() = through(A() ^ data); }
|
||||
|
||||
constexpr void bitSet(uint8_t mask) noexcept { adjustZero(A() & mask); }
|
||||
|
||||
constexpr void BIT() noexcept {
|
||||
const auto data = BUS().DATA();
|
||||
setFlag(VF, overflowTest(data));
|
||||
bitSet(data);
|
||||
adjustNegative(data);
|
||||
}
|
||||
|
||||
#pragma endregion
|
||||
|
||||
#pragma region Comparison operations
|
||||
|
||||
constexpr void CMP(uint8_t first, uint8_t second) noexcept {
|
||||
intermediate() = first - second;
|
||||
adjustNZ(intermediate().low);
|
||||
resetFlag(CF, intermediate().high);
|
||||
}
|
||||
|
||||
constexpr void CMP() noexcept { CMP(A(), BUS().DATA()); }
|
||||
|
||||
constexpr void CPX() noexcept { CMP(X(), BUS().DATA()); }
|
||||
|
||||
constexpr void CPY() noexcept { CMP(Y(), BUS().DATA()); }
|
||||
|
||||
#pragma endregion
|
||||
|
||||
#pragma region Increment/decrement
|
||||
|
||||
[[nodiscard]] constexpr auto DEC(uint8_t value) noexcept { return through(value - 1); }
|
||||
constexpr void DEX() noexcept { X() = DEC(X()); }
|
||||
constexpr void DEY() noexcept { Y() = DEC(Y()); }
|
||||
void DEC();
|
||||
|
||||
[[nodiscard]] constexpr auto INC(uint8_t value) noexcept { return through(value + 1); }
|
||||
constexpr void INX() noexcept { X() = INC(X()); }
|
||||
constexpr void INY() noexcept { Y() = INC(Y()); }
|
||||
void INC();
|
||||
|
||||
#pragma endregion
|
||||
|
||||
#pragma region Stack operations
|
||||
|
||||
void JSR();
|
||||
|
||||
void PHA();
|
||||
void PLA();
|
||||
void PHP();
|
||||
void PLP();
|
||||
|
||||
void RTI();
|
||||
void RTS();
|
||||
|
||||
#pragma endregion
|
||||
|
||||
#pragma region Shift/rotate operations
|
||||
|
||||
#pragma region Shift
|
||||
|
||||
void ASL();
|
||||
constexpr void ASLA() noexcept { A() = ASL(A()); }
|
||||
constexpr uint8_t ASL(uint8_t value) noexcept {
|
||||
setFlag(CF, negativeTest(value));
|
||||
return through(value << 1);
|
||||
}
|
||||
|
||||
[[nodiscard]] constexpr uint8_t rol(uint8_t operand) noexcept {
|
||||
const auto carryIn = carry();
|
||||
return through(asl(operand) | carryIn);
|
||||
}
|
||||
|
||||
[[nodiscard]] constexpr uint8_t lsr(uint8_t value) noexcept {
|
||||
set_flag(CF, value & CF);
|
||||
void LSR();
|
||||
constexpr void LSRA() noexcept { A() = LSR(A()); }
|
||||
constexpr uint8_t LSR(uint8_t value) noexcept {
|
||||
setFlag(CF, carryTest(value));
|
||||
return through(value >> 1);
|
||||
}
|
||||
|
||||
[[nodiscard]] constexpr uint8_t ror(uint8_t operand) noexcept {
|
||||
#pragma endregion
|
||||
|
||||
#pragma region Rotate
|
||||
|
||||
void ROL();
|
||||
constexpr void ROLA() noexcept { A() = ROL(A()); }
|
||||
constexpr uint8_t ROL(uint8_t value) noexcept {
|
||||
const auto carryIn = carry();
|
||||
return through(lsr(operand) | (carryIn << 7));
|
||||
return through(ASL(value) | carryIn);
|
||||
}
|
||||
|
||||
// Undocumented compound instructions
|
||||
void ROR();
|
||||
constexpr void RORA() noexcept { A() = ROR(A()); }
|
||||
constexpr uint8_t ROR(uint8_t value) noexcept {
|
||||
const auto carryIn = carry();
|
||||
return through(LSR(value) | (carryIn << 7));
|
||||
}
|
||||
|
||||
void anc() noexcept;
|
||||
void axs() noexcept;
|
||||
void jam() noexcept;
|
||||
#pragma endregion
|
||||
|
||||
void storeFixupEffect(uint8_t data) noexcept { memoryWrite(data & (BUS().ADDRESS().high + 1)); }
|
||||
#pragma endregion
|
||||
|
||||
void sha() noexcept { storeFixupEffect(A() & X()); }
|
||||
void sya() noexcept { storeFixupEffect(Y()); }
|
||||
void sxa() noexcept { storeFixupEffect(X()); }
|
||||
void tas() noexcept { S() = A() & X(); sha(); }
|
||||
void las() noexcept { A() = X() = S() = through(memoryRead() & S()); }
|
||||
void ane() noexcept { A() = through((A() | 0xee) & X() & BUS().DATA()); }
|
||||
void atx() noexcept { A() = X() = through((A() | 0xee) & BUS().DATA()); }
|
||||
void asr() noexcept { andr(); A() = lsr(A()); }
|
||||
#pragma region Undocumented instructions
|
||||
|
||||
void isb() noexcept { MW(inc); sbc(); }
|
||||
void slo() noexcept { MW(asl); orr(); }
|
||||
void rla() noexcept { MW(rol); andr(); }
|
||||
void sre() noexcept { MW(lsr); eorr(); }
|
||||
void rra() noexcept { MW(ror); adc(); }
|
||||
void dcp() noexcept { MW(dec); cmp(A()); }
|
||||
#pragma region Undocumented instructions with BCD effects
|
||||
|
||||
uint8_t m_x = 0; // index register X
|
||||
uint8_t m_y = 0; // index register Y
|
||||
uint8_t m_a = 0; // accumulator
|
||||
uint8_t m_s = 0; // stack pointer
|
||||
uint8_t m_p = 0; // processor status
|
||||
void ARR();
|
||||
uint8_t coreARR();
|
||||
void decimalARR();
|
||||
void binaryARR();
|
||||
|
||||
register16_t m_intermediate;
|
||||
#pragma endregion
|
||||
|
||||
uint8_t m_fixed_page = 0;
|
||||
#pragma region Undocumented instructions with fixup effects
|
||||
|
||||
void storeFixupEffect(uint8_t data);
|
||||
|
||||
void SHA();
|
||||
void SYA();
|
||||
void SXA();
|
||||
|
||||
#pragma endregion
|
||||
|
||||
void SAX();
|
||||
void LAX();
|
||||
void ANC();
|
||||
void AXS();
|
||||
void JAM();
|
||||
void TAS();
|
||||
void LAS();
|
||||
void ANE();
|
||||
void ATX();
|
||||
void ASR();
|
||||
void ISB();
|
||||
void RLA();
|
||||
void RRA();
|
||||
void SLO();
|
||||
void SRE();
|
||||
void DCP();
|
||||
|
||||
#pragma endregion
|
||||
|
||||
#pragma endregion
|
||||
};
|
||||
}
|
||||
@@ -56,7 +56,7 @@ std::string EightBit::Disassembly::disassemble(uint16_t current) {
|
||||
output << dump_ByteValue(cell) << " ";
|
||||
|
||||
auto byte = BUS().peek(current + 1);
|
||||
uint16_t relative = processor.PC().word + 2 + (int8_t)byte;
|
||||
uint16_t relative = processor.PC().joined + 2 + (int8_t)byte;
|
||||
|
||||
auto aaa = (cell & 0b11100000) >> 5;
|
||||
auto bbb = (cell & 0b00011100) >> 2;
|
||||
@@ -475,7 +475,7 @@ uint8_t EightBit::Disassembly::getByte(uint16_t address) {
|
||||
}
|
||||
|
||||
uint16_t EightBit::Disassembly::getShort(uint16_t address) {
|
||||
return processor.peekShort(address).word;
|
||||
return processor.peekShort(address).joined;
|
||||
}
|
||||
|
||||
////
|
||||
|
||||
+753
-447
File diff suppressed because it is too large.
Load diff
@@ -30,7 +30,7 @@ void Board::initialise() noexcept {
|
||||
auto programFilename = m_configuration.getProgram();
|
||||
auto programPath = m_configuration.getRomDirectory() + "/" + m_configuration.getProgram();
|
||||
auto loadAddress = m_configuration.getLoadAddress();
|
||||
m_ram.load(programPath, loadAddress.word);
|
||||
m_ram.load(programPath, loadAddress.joined);
|
||||
|
||||
// Disassembly output
|
||||
if (m_configuration.isDebugMode())
|
||||
@@ -47,7 +47,7 @@ void Board::initialise() noexcept {
|
||||
std::cout << "Y=" << (int)CPU().Y() << ", ";
|
||||
std::cout << "S=" << (int)CPU().S() << "\t";
|
||||
|
||||
std::cout << m_disassembler.disassemble(address.word);
|
||||
std::cout << m_disassembler.disassemble(address.joined);
|
||||
|
||||
std::cout << "\n";
|
||||
});
|
||||
|
||||
@@ -66,6 +66,11 @@ namespace EightBit {
|
||||
virtual void memoryWrite() noexcept;
|
||||
void busWrite() noexcept;
|
||||
|
||||
void memoryRead(uint8_t low, uint8_t high) noexcept {
|
||||
BUS().ADDRESS() = { low, high };
|
||||
memoryRead();
|
||||
}
|
||||
|
||||
void memoryRead(register16_t address) noexcept;
|
||||
virtual void memoryRead() noexcept;
|
||||
void busRead() noexcept;
|
||||
|
||||
Reference in new issue
Block a user