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Sync to the .Net version of the Z80 code

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This commit is contained in:
Adrian Conlon 2025-01-28 21:44:22 +00:00
parent e1a2eba8f9
commit d838ad7946
5 changed files with 24 additions and 18 deletions
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4
Z80/fusetest_Z80/FuseTestRunner.cpp
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@ -7,9 +7,7 @@
Fuse::TestRunner::TestRunner(const Test& test, const ExpectedTestResult& result)
: m_test(test),
m_result(result),
m_cpu(*this),
m_totalCycles(0) {
m_result(result) {
for (const auto& event : m_result.events.events) {
if (!boost::algorithm::ends_with(event.specifier, "C"))

4
Z80/fusetest_Z80/FuseTestRunner.h
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@ -22,9 +22,9 @@ namespace Fuse {
EightBit::Ram m_ram = 0x10000;
EightBit::InputOutput m_ports;
EightBit::Z80 m_cpu;
EightBit::Z80 m_cpu{ *this, m_ports };
int m_totalCycles;
int m_totalCycles = 0;
void check();
void checkRegisters();

9
Z80/inc/Z80.h
View File

@ -5,6 +5,7 @@
#include <functional>
#include <IntelProcessor.h>
#include <InputOutput.h>
#include <EventArgs.h>
#include <Signal.h>
#include <Register.h>
@ -69,7 +70,7 @@ namespace EightBit {
CF = Bit0,
};
Z80(Bus& bus);
Z80(Bus& bus, InputOutput& ports);
Z80(const Z80& rhs);
bool operator==(const Z80& rhs) const;
@ -159,6 +160,8 @@ namespace EightBit {
int jrConditional(int condition) noexcept final;
private:
InputOutput& m_ports;
enum { BC_IDX, DE_IDX, HL_IDX };
std::array<std::array<register16_t, 3>, 2> m_registers;
@ -553,7 +556,7 @@ namespace EightBit {
void portWrite(uint8_t port) noexcept;
void portWrite() noexcept;
uint8_t portRead(uint8_t port) noexcept;
uint8_t portRead() noexcept;
void portRead(uint8_t port) noexcept;
void portRead() noexcept;
};
}

23
Z80/src/Z80.cpp
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@ -3,8 +3,9 @@
// based on http://www.z80.info/decoding.htm
EightBit::Z80::Z80(Bus& bus)
: IntelProcessor(bus) {
EightBit::Z80::Z80(Bus& bus, InputOutput& ports)
: IntelProcessor(bus),
m_ports(ports) {
RaisedPOWER.connect([this](EventArgs) {
raiseM1();
@ -35,7 +36,8 @@ EightBit::Z80::Z80(Bus& bus)
}
EightBit::Z80::Z80(const Z80& rhs)
: IntelProcessor(rhs) {
: IntelProcessor(rhs),
m_ports(rhs.m_ports) {
m_registers = rhs.m_registers;
m_registerSet = rhs.m_registerSet;
@ -524,16 +526,17 @@ void EightBit::Z80::portWrite() noexcept {
_Writer writer(*this);
_ActivateIORQ iorq(*this);
busWrite();
tick();
m_ports.writeOutputPort(BUS().ADDRESS().low, BUS().DATA());
}
uint8_t EightBit::Z80::portRead(const uint8_t port) noexcept {
void EightBit::Z80::portRead(const uint8_t port) noexcept {
MEMPTR() = BUS().ADDRESS() = { port, A() };
++MEMPTR().low;
return portRead();
portRead();
}
uint8_t EightBit::Z80::portRead() noexcept {
void EightBit::Z80::portRead() noexcept {
class _Reader final {
Z80& m_parent;
@ -551,7 +554,8 @@ uint8_t EightBit::Z80::portRead() noexcept {
_Reader reader(*this);
_ActivateIORQ iorq(*this);
return busRead();
tick();
BUS().DATA() = m_ports.readInputPort(BUS().ADDRESS().low);
}
//
@ -1391,7 +1395,8 @@ void EightBit::Z80::executeOther(const int x, const int y, const int z, const in
portWrite(fetchByte());
break;
case 3: // IN A,(n)
A() = portRead(fetchByte());
portRead(fetchByte());
A() = BUS().DATA();
break;
case 4: // EX (SP),HL
xhtl(HL2());

2
Z80/test/Board.h
View File

@ -32,7 +32,7 @@ private:
const Configuration& m_configuration;
EightBit::Ram m_ram = 0x10000;
EightBit::InputOutput m_ports;
EightBit::Z80 m_cpu = *this;
EightBit::Z80 m_cpu{ *this, m_ports };
EightBit::Disassembler m_disassembler = *this;
EightBit::Profiler m_profiler = { m_cpu, m_disassembler };
const EightBit::MemoryMapping m_mapping = { m_ram, 0x0000, 0xffff, EightBit::MemoryMapping::AccessLevel::ReadWrite };