Adrian.Conlon
f970c45005
Get the loop exit conditions worked out.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-06 21:32:52 +01:00
Adrian.Conlon
04fd979e56
6502: Better wrapping for the executing/executed events to avoid "fetchByte" issue.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-06 12:02:41 +01:00
Adrian.Conlon
4cd2dc68e1
Correct some (but not all!) project configuration anomalies.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-05 19:36:25 +01:00
Adrian.Conlon
d4b133e9ac
Show cycles per second as MHz
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-05 19:15:58 +01:00
Adrian.Conlon
7910ada7fa
First stab at a running M6502 test suite. Running Klaus Dormann tests
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-05 17:46:02 +01:00
Adrian.Conlon
6db32ae7c5
Small consistency change in the 8-bit memory model.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-05 17:44:47 +01:00
Adrian.Conlon
0e7ad4dd01
Correct a couple of inconsistencies in the test harness.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-05 17:40:16 +01:00
Adrian.Conlon
983639d530
Correct a couple of header issues in the test harness.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-04 13:00:23 +01:00
Adrian.Conlon
f52edaf8bc
Tidy up 16-bit add/subtract to properly use MEMPTR.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-03 21:42:18 +01:00
Adrian.Conlon
8f84d57fe1
A few small tidy ups.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-02 22:23:20 +01:00
Adrian.Conlon
88d3e4fd47
Initial stab at getting MOS6502 imported to the EightBit library.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-02 22:03:33 +01:00
Adrian.Conlon
6af1857cb0
A few minor consistency tweaks to the i8080 and z80 processors.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-07-02 17:38:19 +01:00
Adrian.Conlon
8f57fac3ee
Use the same optimisation techniques on the Z80 header. Up to 233Mhz now.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-29 21:35:52 +01:00
Adrian.Conlon
3439523865
Some more optimisations, up to 225Mhz now.
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Reordered if statements to give "then" case "expected"
Better use of "__assume" in switch statements
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-29 21:25:58 +01:00
Adrian.Conlon
10ed04bf90
Update README.md
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Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-06-29 18:44:30 +01:00
Adrian.Conlon
366c3fc601
Simplification of bitwise operators.
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Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-06-29 12:19:22 +01:00
Adrian.Conlon
ea4588992d
Whoops: missing switch/break was falling into an assume(0). Caused two fuse tests to fail...
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Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-06-29 10:18:07 +01:00
Adrian.Conlon
954887217f
Performance mods: probably about 30% speedup: the best yet.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-29 00:50:34 +01:00
Adrian.Conlon
7582d65ea3
Lots more method tidy ups in search of performance.
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Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-06-28 15:39:31 +01:00
Adrian.Conlon
35efc86195
Simplify the use of the REFRESH register
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Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-06-27 14:02:29 +01:00
Adrian.Conlon
c803387023
A few modifications:
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1) Simplify REFRESH register handling via bit fields.
2) Use static methods in the Z80 emulator, if at all possible
3) Use a decoded opcode lookup, rather than decoding per instruction
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-26 23:22:32 +01:00
Adrian.Conlon
d22b695682
Modify test harness to show host CPU cycle efficiency.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-25 23:48:15 +01:00
Adrian.Conlon
a7d9cb0116
Fix an optimisation instruction ordering issue: fetchByte on both rhs/lhs.
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This caused two failing tests in the debug build of the fuse test suite.
Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-24 21:38:42 +01:00
Adrian.Conlon
993fe5d2b4
Correct position of fuse test input.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-24 11:00:19 +01:00
Adrian.Conlon
67174d74af
Correct some memory access issues in LR35902
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-23 21:23:20 +01:00
Adrian.Conlon
af375ab10f
Some more shared code.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-22 19:00:53 +01:00
Adrian.Conlon
f776379e96
Share flag adjustments across implementations using templated methods.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-22 16:57:38 +01:00
Adrian.Conlon
529aa1bd21
Tidy profile output
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-22 10:27:19 +01:00
Adrian.Conlon
23b5a5d579
Tidy the test harness a little.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-22 10:16:02 +01:00
Adrian.Conlon
8927f412d4
Use a shared test harness.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-21 23:55:25 +01:00
Adrian.Conlon
5a3713fc8a
First stab at efficiency timing support for 8080 and z80 test runners.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-21 21:05:07 +01:00
Adrian.Conlon
052df61250
Remove get/getWord and set/setWord from memory class. Just use address and data lines on the memory.
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Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-06-20 14:09:44 +01:00
Adrian.Conlon
a4f8770eb0
Correct a couple of small compilation issues.
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Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-06-19 18:08:13 +01:00
Adrian.Conlon
67fa2a7afe
Incorporate disassembly into address profile output.
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Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-06-19 17:37:41 +01:00
Adrian.Conlon
c7e65f5447
Consistency changes to the projects.
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Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-06-19 13:53:37 +01:00
Adrian.Conlon
c9bf24d1fa
Tidy up register and static method access.
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Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-06-19 13:53:00 +01:00
Adrian.Conlon
23108a8536
Bring performance back to par by: inlining and static flag register access, where possible.
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Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-06-18 18:14:39 +01:00
Adrian.Conlon
5f288cf0e3
Some more small tidy ups.
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Signed-off-by: Adrian.Conlon <adrian.conlon@arup.com>
2017-06-16 20:31:32 +01:00
Adrian.Conlon
327d391ecb
Remove another chunk of shared code. This time by ensuring the basic layout of registers is consistent.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-16 13:52:10 +01:00
Adrian.Conlon
c52f0a36aa
Small performance change to 8080 reserved flags.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-16 13:35:08 +01:00
Adrian.Conlon
dc1f7ad1d5
Remove some commented header includes.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-16 01:59:11 +01:00
Adrian.Conlon
675b82b5af
Move to a more standard flag representation for the 8080
2017-06-16 01:58:12 +01:00
Adrian.Conlon
71e6902aeb
Simplify and remove a bunch of code. Getting there!
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-15 22:21:26 +01:00
Adrian.Conlon
705351d179
Small tidy up on the block instructions to separate PC changes.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-14 22:33:02 +01:00
Adrian.Conlon
1643844eaf
Whoops: Roll back a "simplification" to the IX/IY + displacement handlers. Caused to failing "fuse" tests.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-14 20:14:32 +01:00
Adrian.Conlon
e6eab35d0e
Correct a couple of warnings in the 8080 code
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-14 20:13:37 +01:00
Adrian.Conlon
66d3a5ae29
Couple of small simplifications.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-13 23:43:21 +01:00
Adrian.Conlon
828e081a6e
More tidying of shareable code
2017-06-12 14:33:00 +01:00
Adrian.Conlon
8f3aef1c3e
Make LR35902 a little more like the Z80
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-11 23:56:11 +01:00
Adrian.Conlon
eb8a93726d
Correct a few small LR35902 issues.
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Signed-off-by: Adrian.Conlon <adrian.conlon@gmail.com>
2017-06-11 22:07:48 +01:00