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Correct RRD/RLD timing and XHTL ordering (according to latest Z80 single step tests)

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This commit is contained in:
Adrian Conlon
2025-08-02 12:26:53 +01:00
parent 6143a9d285
commit bfc2355337
1 changed files with 9 additions and 9 deletions
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Z80/Z80.cs
+9 -9
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@@ -1473,7 +1473,7 @@ namespace Z80
var value = this.FetchByte();
if (displacing)
if (memoryY)
{
this.Tick(2);
}
@@ -2143,18 +2143,16 @@ namespace Z80
this.MEMPTR.Low = this.MemoryRead(this.SP);
this.Bus.Address.Increment();
this.MEMPTR.High = this.MemoryRead();
this.Tick(2);
this.Bus.Data = exchange.High;
exchange.High = this.MEMPTR.High;
this.MemoryUpdate(1);
this.Tick();
_ = this.Bus.Address.Decrement();
this.Tick();
this.Bus.Data = exchange.Low;
exchange.Low = this.MEMPTR.Low;
this.MemoryUpdate(1);
this.Tick();
_ = this.Bus.Address.Increment();
this.Tick();
this.Bus.Data = exchange.High;
exchange.High = this.MEMPTR.High;
this.MemoryUpdate(1);
this.Tick(3);
}
@@ -2511,8 +2509,9 @@ namespace Z80
var memory = ReadMemoryIndirect(this.HL);
this.Tick(2);
this.Bus.Data = (byte)(PromoteNibble(this.A) | HighNibble(memory));
this.Tick(3);
this.MemoryUpdate(1);
this.Tick(4);
this.Tick();
this.A = (byte)(HigherNibble(this.A) | LowerNibble(memory));
this.AdjustSZPXY(this.A);
this.ClearBit(StatusBits.NF | StatusBits.HC);
@@ -2523,8 +2522,9 @@ namespace Z80
var memory = ReadMemoryIndirect(this.HL);
this.Tick(2);
this.Bus.Data = (byte)(PromoteNibble(memory) | LowNibble(this.A));
this.Tick(3);
this.MemoryUpdate(1);
this.Tick(4);
this.Tick();
this.A = (byte)(HigherNibble(this.A) | HighNibble(memory));
this.AdjustSZPXY(this.A);
this.ClearBit(StatusBits.NF | StatusBits.HC);