Correction: the least significant bit is *not* zeroed by an IM 2 interrupt

This commit is contained in:
Adrian Conlon
2025-08-12 17:19:55 +01:00
parent e96a51342a
commit eb23fbe44c

View File

@@ -626,10 +626,8 @@ namespace Z80
case 2:
this.Tick();
this.PushWord(this.PC);
this.Bus.Address.Assign((byte)(data & ~1), this.IV);
Debug.Assert(this.Bus.Address.Low % 2 == 0);
this.PC.Assign(this.GetWord());
Debug.Assert(this.Bus.Address.Low % 2 == 1);
this.Bus.Address.Assign(data, this.IV);
this.PC.Assign(this.GetWordPaged());
Debug.Assert(this.Cycles == 19);
break;
default: