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Author SHA1 Message Date
Adrian Conlon
098c888dae Correct ROM load limit 2024-06-01 22:11:13 +01:00
Adrian Conlon
80ba7ef0da Switch to a version of 6502 tests with proper output 2024-06-01 11:29:40 +01:00
Adrian Conlon
4609536212 Add (old) profiler code 2024-05-31 12:01:28 +01:00
Adrian Conlon
0f9fdd95d5 Layout into regions 2024-05-31 12:01:00 +01:00
Adrian Conlon
301cd0c1e2 More tidyups 2024-05-31 12:00:31 +01:00
Adrian Conlon
75c96929bf Whoops: fix closing curly. 2024-05-30 22:26:27 +01:00
Adrian Conlon
a3a8c41ff1 More analysis suggestions 2024-05-30 22:20:26 +01:00
Adrian Conlon
59098d0305 Tidy a couple of bits in the 6502 implementation 2024-05-30 00:09:55 +01:00
Adrian Conlon
a64f370d7c Compilation fixes 2024-05-29 10:56:16 +01:00
Adrian Conlon
07ed273688 Improve performance of ADC_d (decimal) 2024-05-28 16:15:35 +01:00
Adrian Conlon
243cd9e969 Couple of small updtes 2024-05-28 14:00:15 +01:00
Adrian Conlon
9e9d86423d get the C# code up to date with the C++ code. Much better support for undocumented modes/instructions etc. 2024-05-28 13:59:37 +01:00
Adrian Conlon
6d7e936a60 Don't crash if disassembly can't be generated. 2024-05-27 23:15:51 +01:00
Adrian Conlon
339af72d3b Rewrite 6502 interrupt handling 2024-05-22 17:08:33 +01:00
Adrian Conlon
f4ea6a0b13 Use IDE suggested changes 2024-05-21 21:49:10 +01:00
Adrian Conlon
bd1f7c285b Sort out hex formatting in Harte test 2024-05-21 21:38:10 +01:00
Adrian Conlon
1e15b090f6 First stab at implementing M6502 Harte tests 2024-05-21 19:41:16 +01:00
Adrian Conlon
e0235f396e IDE suggestions 2024-05-19 09:07:20 +01:00
Adrian Conlon
6cbffa1051 Fix compilation issues 2024-05-18 22:14:51 +01:00
Adrian Conlon
291a212504 Ugrade to .NET 8.0: First pass 2024-05-18 21:57:33 +01:00
Adrian Conlon
a8926b63a4 Apply analysis recommendations to 6502 disassembler. 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2020-07-14 16:35:43 +01:00
Adrian Conlon
47ecdad3e8 Work towards accurate bus/memory/io timings. Especially Z80 m-cycle timing. 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2020-07-05 00:09:51 +01:00
Adrian Conlon
cd4af67177 Work my way through a bunch of the analysis suggestions. 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2020-06-22 00:00:15 +01:00
Adrian Conlon
db0e8c613f Update all analysis (and other!) nuget packages, ensure builds across all projects. 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2020-06-21 18:35:10 +01:00
Adrian Conlon
20c7dafc97 Use full PDB generation (good for performance analysis) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-12-07 12:48:11 +00:00
Adrian Conlon
2becf0e220 Apply any analysis suggestions. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-12-04 23:23:48 +00:00
Adrian Conlon
73d08fe7a7 Upgrade .net version and analysis packages en mass. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-12-04 01:03:17 +00:00
Adrian Conlon
3a40d0103a Update some framework and analysis versions. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-12-03 23:01:09 +00:00
Adrian Conlon
e98f841e9f Merge branch 'master' of https://github.com/MoleskiCoder/EightBitNet 2019-11-30 14:06:48 +00:00
Adrian Conlon
c15ec96862 Make the Z80 implementation M-Cycle accurate. I think! 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-11-30 14:06:38 +00:00
Adrian Conlon
15a8f312ff Merge branch 'master' of https://github.com/MoleskiCoder/EightBitNet 2019-11-18 00:17:11 +00:00
Adrian Conlon
08e0fcf273 Much more straightforward mechanism for calculating cycles allowed in LR35902. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-11-18 00:16:58 +00:00
Adrian Conlon
c7c9963db3 Actually, the refresh register is incremented halfway through M1, as the M1 pin is raised. i.e. just before the refresh phase of the M1 cycle. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-11-16 22:29:42 +00:00
Adrian Conlon
81b2b04ddd Add Z80 Fuse test to the EightBit .Net solution 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-11-16 21:01:47 +00:00
Adrian Conlon
3c87907471 Choose a different mechanism for ignoring (at the moment) bus test events. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-11-16 21:00:26 +00:00
Adrian Conlon
ac56257558 Whoops: Z80: missed raising the INT pin, after it been acknowledged. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-11-16 20:58:52 +00:00
Adrian Conlon
5575fec896 Add Z80 support for the RFRSH pin, triggered by M1 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-11-16 20:56:08 +00:00
Adrian Conlon
56e1e67850 Better profiling configuration 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-11-10 12:21:41 +00:00
Adrian Conlon
0398d20ba4 Merge branch 'master' of https://github.com/MoleskiCoder/EightBitNet 2019-11-10 11:18:15 +00:00
Adrian Conlon
a5598942a7 Sync with C++ z80 implementation 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-11-10 11:17:47 +00:00
Adrian Conlon
1c472fcb17 Make the Z80 disassembler a little more compatible with the C++ version. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-11-02 17:28:09 +00:00
Adrian Conlon
0f2a69509b Sync (as far as possible) with unmanaged C++ emulators. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-10-31 23:01:47 +00:00
Adrian Conlon
8ce71f8ab8 Sync with latest C++ version. Fixes a couple of Z80 issues. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-09-08 16:41:04 +01:00
Adrian Conlon
aca81384c3 Correct PC power on value issue. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-09-07 11:16:03 +01:00
Adrian Conlon
f01e3e0430 Tighten up the sequence associated with changing pin levels + fix persistent HALT/PC bug 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-09-06 22:50:21 +01:00
Adrian Conlon
bc491884b0 Synchronise HALT implementation for Intel style processors with the C++ version. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-08-29 09:05:31 +01:00
Adrian Conlon
08111f8590 Merge branch 'master' of https://github.com/MoleskiCoder/EightBitNet 2019-08-28 23:28:15 +01:00
Adrian Conlon
364d79fde9 Correct Z80 halt interrupt bug. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-08-28 23:28:01 +01:00
Adrian Conlon
0dd6f1025f Simplify 8080/Z80 XHTL implementation. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-08-28 23:18:08 +01:00
Adrian Conlon
dbe65aa6d7 Friendlier keyboard control for the LR35902 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-08-16 18:19:31 +01:00