 Adrian Conlon
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dfd4d1928f
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Make "Pop" more like "Read". i.e. don't return a result, just use the value placed on the "bus"
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2026-05-18 18:24:32 +01:00 |
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Adrian Conlon
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741feb4342
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Performance change: avoid dropping Bus.Data return values
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2026-05-18 17:28:41 +01:00 |
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Adrian Conlon
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9a011b3c57
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Start implementing HD6309. Introduction of 32-bit operations has forced me to rename some of "Word" methods to better indicate size
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2026-05-16 21:10:23 +01:00 |
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Adrian Conlon
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ab835297fd
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Couple of small tidy ups
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2026-05-16 13:50:14 +01:00 |
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Adrian Conlon
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b5f646c641
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Better arrangement of decimal SBC/ADC implementations
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2026-05-15 22:50:11 +01:00 |
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Adrian Conlon
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6d4d2f22e2
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Needs tidying a little by full cycle accuracy for 6502 / 65c02
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2026-05-15 22:02:03 +01:00 |
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Adrian Conlon
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ac200d7f76
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Simplify ignored return value handling
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2026-05-12 22:21:13 +01:00 |
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Adrian Conlon
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83ee80edcf
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Make addressing mode handling more consistent on 6502 implementation
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2026-05-12 11:44:42 +01:00 |
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Adrian Conlon
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69a0865ee9
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Start work towards WDC 65C02 implementation
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2026-05-02 17:02:36 +01:00 |
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Adrian Conlon
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10106657d3
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Some small cosmetic changes
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2026-05-02 14:13:01 +01:00 |
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Adrian Conlon
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cfc3169933
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So there we have it. 100% Harte single step coverage/success for MOS 6502
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2026-05-02 13:47:04 +01:00 |
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Adrian Conlon
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699791f7a4
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Simplify intermediate 16-bit register usage
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2026-04-16 13:47:24 +01:00 |
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Adrian Conlon
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33fce45cc8
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Some performance updates
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2025-10-13 17:36:32 +01:00 |
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Adrian Conlon
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ceacac4741
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Fix up some oddities in the EightBit library
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2025-10-06 13:44:31 +01:00 |
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Adrian Conlon
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9d208de9bb
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Explicitly state order of operations in code, rather than relying upon RAII etc. (for speed. Much faster)
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2025-08-04 15:47:26 +01:00 |
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Adrian Conlon
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2f338c6c46
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Tidy register increment/decrement a little.
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2025-07-25 16:32:30 +01:00 |
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Adrian Conlon
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c271b28495
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Simplify bus addressing
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2025-07-05 09:46:59 +01:00 |
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Adrian Conlon
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3bbf300e05
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Simplify switching processor pin handling
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2025-06-22 21:07:02 +01:00 |
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 Adrian Conlon
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93e09c192f
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Share instruction fetch and halt implementations
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2025-05-04 11:41:28 +01:00 |
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Adrian Conlon
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2336222c97
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Push more core processor handling into base classes.
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2025-05-04 10:53:23 +01:00 |
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Adrian Conlon
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cbe871d365
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Isolate program counter increment/decrement (to be used for HALT processing)
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2025-05-03 23:25:06 +01:00 |
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Adrian Conlon
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1b1b92ac2c
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More event handling simplification
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2025-03-29 13:18:54 +00:00 |
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Adrian Conlon
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3d6b549c76
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Turns out using lambdas to control pins is lovely and correct, but terribly slow. Back to a more traditional method.
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2025-03-24 20:18:04 +00:00 |
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Adrian Conlon
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515c679e68
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Apply .net 9 analysis
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2024-10-12 10:20:29 +01:00 |
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Adrian Conlon
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dc677e5358
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Namespace tidying
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2024-10-09 19:48:33 +01:00 |
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