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• 3eb3975e37 Add an initial stab at LR35902 (aka GameBoy) support. Untested and no disassembler though... Adrian Conlon 2019-07-14 17:46:57 +01:00
• d0c620e709 Use MEMPTR, rather than an i8080 specific intermediate register. Adrian Conlon 2019-07-14 17:36:03 +01:00
• 6f79136706 Tidy the Intel Hex file parser a little. Adrian Conlon 2019-07-14 17:35:19 +01:00
• b4c37ea006 Add a FindFirstSet implementation to the Chip class. Adrian Conlon 2019-07-14 17:34:23 +01:00
• 853b6e2b08 Correct some straightforward analysis issues. Adrian Conlon 2019-07-01 00:15:25 +01:00
• 21472154e0 Further refactoring of the hex loader class to be a little easier to read. Adrian Conlon 2019-06-29 11:50:27 +01:00
• 7b5af28f5d Refactor the Intel hex file parser. The new parser is isolated and memory efficient. Adrian Conlon 2019-06-29 11:35:08 +01:00
• 69122eb233 Start adding some LDx tests, mainly to mop up any missing indexed addressing modes. Adrian Conlon 2019-06-21 09:07:58 +01:00
• 78f2151ca7 Add ANDCC test to MC6809 core Adrian Conlon 2019-06-10 08:52:32 +01:00
• e0188e44cd Tidy a couple of small mistakes in MC6809 test code Adrian Conlon 2019-06-10 08:51:35 +01:00
• 6697974711 DAA tests added to MC6809 core Adrian Conlon 2019-06-10 08:50:24 +01:00
• 1eb5caed3c Add MUL tests to the MC6809 core. Adrian Conlon 2019-06-09 17:11:49 +01:00
• c11143f22d Add more indexed addressing mode tests to the MC6809 core. Adrian Conlon 2019-06-09 10:37:46 +01:00
• ef148528b1 Correct a couple of (probably benign) mistakes in the MC6809 core Adrian Conlon 2019-06-09 10:36:41 +01:00
• 75f5d17e72 Correct some disassembler addressing mode mistakes. Adrian Conlon 2019-06-08 23:32:45 +01:00
• 310415512f Add EOR and SEX unit tests Adrian Conlon 2019-06-08 23:31:55 +01:00
• 95b6657576 Remove extra step instruction in BleTests Adrian Conlon 2019-06-08 23:31:03 +01:00
• ddc1adc90e A bunch more MC6809 tests added. *Still* not found the issue with floating point numbers! Adrian Conlon 2019-06-03 00:55:01 +01:00
• 8b3c0801ce Add tests for EXG, TFR and NEG. Also added some undocumented behaviour to EXG and TFR. Adrian Conlon 2019-06-02 19:04:27 +01:00
• fa16dd1486 Merge branch 'master' of https://github.com/MoleskiCoder/EightBitNet Adrian Conlon 2019-05-27 10:53:55 +01:00
• 133fc83e89 Tidy the MC6850 a little, mainly to show that the step method is only called via the clock tick. Adrian Conlon 2019-05-27 10:53:44 +01:00
• ebe196d8ed Update README.md Adrian Conlon 2019-05-26 11:07:53 +01:00
• a78e6cb23c Poke methods shouldn't be returning values. Adrian Conlon 2019-05-15 22:48:34 +01:00
• c4d52512b2 Add MC6809 profiler (mainly so I can pin down problem printing numbers) Adrian Conlon 2019-05-07 00:46:30 +01:00
• d21afdc1c7 Correct a couple of issues in the disassembler: All disassembler pause, correct PshX PulX decode. Adrian Conlon 2019-05-06 22:26:38 +01:00
• 72932cf462 Correct a few more style/correctness issues. Adrian Conlon 2019-05-06 11:02:20 +01:00
• 3d0e4250a0 Update nuget packages. Adrian Conlon 2019-05-06 10:03:11 +01:00
• efbd576624 Resurrect the concept of pin level matching. Allows for easier device wiring. Adrian Conlon 2019-05-06 09:58:50 +01:00
• 0340142282 Correct a number of style issues across the EightBitNet solution. Adrian Conlon 2019-05-06 09:46:23 +01:00
• a8849ccf43 MC6809: Change the test board wiring a little to allow the MC6850 to work correctly! Adrian Conlon 2019-05-05 13:34:31 +01:00
• 0c69c5d8bb Whoops: missed additional MC6809 unit tests. Adrian Conlon 2019-05-05 10:14:29 +01:00
• 3914a75102 MC6809: Caught out by references versus values again. Fixes JSR/RTS stack operations. Adrian Conlon 2019-05-05 10:14:03 +01:00
• 34d10352b9 MC6809: Correct transfer and exchange instruction 8/16 bit specification error Adrian Conlon 2019-05-04 17:35:58 +01:00
• 430ecd8a7a MC6809: Correct a branching problem due to the use of reference PC object. Adrian Conlon 2019-05-04 17:17:54 +01:00
• f8757b3014 MC6809: Correct a couple of disassembler byte dumps. Adrian Conlon 2019-05-04 17:16:56 +01:00
• 93122aaf1d MC6850: Tie chip stepping to external clock. Adrian Conlon 2019-05-04 15:21:40 +01:00
• 662c457dd5 Make the MC6809 disassembler hex output lower case, for compatibility with unmanaged code. Adrian Conlon 2019-05-04 15:20:52 +01:00
• 99a4cfaa88 Correct small warning in the EightBit library. Adrian Conlon 2019-05-04 15:19:55 +01:00
• 48c2ffa99f Correct the MC6809 test code to properly initialise the MC6850 Adrian Conlon 2019-05-04 15:19:18 +01:00
• d2893e73ac MC6809: Fix flag updates during interrupt conditions Adrian Conlon 2019-05-04 12:45:53 +01:00
• fc9263fb3a M6502: Avoid allocating "Tuples" when processing crossed page boundary conditions. (~20% speedup) Adrian Conlon 2019-05-04 12:44:53 +01:00
• 87be068e5a Whoops: The configuration debug flag must be able to be modified. Adrian Conlon 2019-05-01 22:50:06 +01:00
• 956a4a1504 Whoops: Disassembler output condition was *exactly* reversed. Adrian Conlon 2019-05-01 22:49:28 +01:00
• a81b5173d8 Whoops: correct state output problem when Register16 objects are used. Adrian Conlon 2019-05-01 22:48:47 +01:00
• 81cfadfe32 Correct byte array load issue: Ensure maximum number of bytes to read is set correctly. Adrian Conlon 2019-05-01 22:47:40 +01:00
• 835703080d Correct Intel hex file loader issue: Incorrect use of "List<>" Adrian Conlon 2019-05-01 22:46:37 +01:00
• 23ba6d457e Add emulation of Grant Searle MC6809 SBC as a test container (untested!) Adrian Conlon 2019-04-28 21:00:30 +01:00
• 32731dc706 Add MC6809 disassembler (untested!) Adrian Conlon 2019-04-28 20:59:31 +01:00
• ea93418289 Correct small bug in 16-bit register exchange. Adrian Conlon 2019-04-24 16:17:19 +01:00
• bc06975796 Tidy up some enumeration names in MC6850 Adrian Conlon 2019-04-24 16:16:47 +01:00
• 15551adb68 Correct a bunch of MC6809/MC6850 style issues. Adrian Conlon 2019-04-24 00:57:53 +01:00
• 1d976e811d Introduce a little consistency with regards to pin naming and usage. Adrian Conlon 2019-04-23 00:58:33 +01:00
• 77a3171037 Add an MC6850 ACIA implementation (not tested, direct port of the C++ code) Adrian Conlon 2019-04-23 00:47:27 +01:00
• 6e781ced44 Some minor MC6809 tidying up Adrian Conlon 2019-04-21 19:54:26 +01:00
• 2a4a067fe4 Add an (untested) implementation of an Intel hex file parser to the EightBit project. Ported directly from the C++ implementation. Adrian Conlon 2019-04-21 16:53:55 +01:00
• 0d73b588c3 Whoops: Forgot to commit the addition of the MC6809 unit test project to the EightBitNet solution. Adrian Conlon 2019-04-21 16:52:48 +01:00
• 53a203b4a1 Correct a layout issue in the MC6809 implementation. Adrian Conlon 2019-04-21 16:51:53 +01:00
• 4977df7330 Correct a couple of missed "readonly" specifications in the MC6809 unit tests. Adrian Conlon 2019-04-21 16:51:08 +01:00
• 0ab5da10ef add unit tests (not complete) for 6809 processor. Fix matters arising. Adrian Conlon 2019-04-21 04:47:36 +01:00
• 294c71c228 Get the MC6809 processor compiling. Still untested. Adrian Conlon 2019-04-10 23:15:26 +01:00
• 6b33d2b5a5 Add a initial port of the MC6809 processor to the .Net collection Adrian Conlon 2019-04-10 19:51:39 +01:00
• 8b67a827dd Simplify the Intel 8080 disassembler a little. Adrian Conlon 2019-03-17 21:07:56 +00:00
• 4a0d466171 Merge branch 'master' of https://github.com/MoleskiCoder/EightBitNet Adrian Conlon 2019-03-10 11:34:40 +00:00
• 00fe5eb0b2 Overloaded MemoryMapping constructor, to make life a little easier... Adrian Conlon 2019-03-10 11:34:29 +00:00
• 5b9a92c76c Correct a couple of small style issues. Adrian Conlon 2019-03-07 01:21:23 +00:00
• e80963260d Try to avoid copying around Register16 references, if possible. Adrian Conlon 2019-03-07 01:21:00 +00:00
• 56f46a8236 Speed up Z80 block operations by using values rather than reference objects, if possible. Adrian Conlon 2019-03-07 00:28:39 +00:00
• 2652463106 Remove default debugging from the Intel8080 test. Adrian Conlon 2019-03-03 10:45:19 +00:00
• 3d2b861b56 Tidy the processor object a little. Adrian Conlon 2019-03-03 10:44:52 +00:00
• 22cb8b142b Tidy the path to nuget packages, such that they can be used as git submodules. Adrian Conlon 2019-03-03 10:35:18 +00:00
• 4799e097de Update stylecop (plus add stylecop packages to the Intel 8080 set). Adrian Conlon 2019-03-02 08:59:20 +00:00
• 9a1d5cc762 First commit of the Intel8080 processor core. Passes diagnostics. Runs at ~50% speed of unmanaged code. Adrian Conlon 2019-02-28 00:06:35 +00:00
• 12969dbef6 Use intermediate values for HL2, if possible. Adrian Conlon 2019-02-23 10:38:29 +00:00
• 03caba99dc Follow most of the guideline suggestions from VS2019 preview. Pretty good suggestions! Adrian Conlon 2019-02-22 22:33:51 +00:00
• 28b7a88f0f Use the correct virtual methods: BusRead and BusWrite to control bus access for Z80 a la M6502 implementation. Adrian Conlon 2019-02-22 19:59:42 +00:00
• 726c3fe4cc More work on minimising the effect of creating garbage collected objects. Adrian Conlon 2019-02-21 22:52:46 +00:00
• 968b1c6545 Correct Z80 disassembler format issue. Adrian Conlon 2019-02-21 22:51:42 +00:00
• 27e1c5c9f8 Make Register16 a class, rather than struct. Tricky, but a bit faster than before. Adrian Conlon 2019-02-21 19:58:49 +00:00
• b7fbb80018 Add an extra couple of blank lines to separate the information messages in the test harness. Adrian Conlon 2019-02-21 01:11:07 +00:00
• c0aa7c5ff5 Correct a few small mistakes in the Z80 emulation. Adrian Conlon 2019-02-21 01:10:17 +00:00
• c7feb58815 Correct a Z80 compare mistake: the result of the implied subtraction shouldn't be applied to the flags register! Adrian Conlon 2019-02-21 00:02:31 +00:00
• 900ac02869 Tidy up a stylecop suggestion. Adrian Conlon 2019-02-21 00:01:36 +00:00
• 42d7095dab Make the Z80 disassembly more compatible with the unmanaged disassembler. Adrian Conlon 2019-02-20 23:52:59 +00:00
• 53cdc614a2 Mask the Z80 refresh register correctly Adrian Conlon 2019-02-20 23:51:50 +00:00
• f0d5751949 Fix Z80 LDIR Adrian Conlon 2019-02-20 22:35:22 +00:00
• 46a12a2b7a Make the Z80 test harness mostly functional. Adrian Conlon 2019-02-20 22:23:58 +00:00
• 1292163837 Improve the Z80 disassembler: now does mostly good disassemblies. Adrian Conlon 2019-02-20 22:23:29 +00:00
• 28516bbc84 Rename the M6502 disassembler class to something a little better grammatically. Adrian Conlon 2019-02-20 22:21:14 +00:00
• 4ee184eaf4 Improve the readability of branch instructions in the M6502 processor implementation. Adrian Conlon 2019-02-20 22:19:38 +00:00
• c400f37201 Improve the debugging visibility of the Register16 class. Adrian Conlon 2019-02-20 22:17:54 +00:00
• 01ce926574 Start adding Z80 test harness and update package configurations. Adrian Conlon 2019-02-19 00:58:17 +00:00
• 5714798756 Lots of stylecop encouraged changes. Adrian Conlon 2019-02-19 00:56:16 +00:00
• 23489b7127 Interesting, makes pretty much no difference to just calculate 16 bit values, rather than relying on byte layout. Adrian Conlon 2019-02-18 22:28:20 +00:00
• 9ac2c53685 The m6502 intermediate variable should really be of type Register16 Adrian Conlon 2019-02-18 22:14:11 +00:00
• 999bdf71ff Add some basic runtime timings to the 6502 TestHarness class. Adrian Conlon 2019-02-18 00:54:02 +00:00
• a144cf19a1 Whoops: missed bus read/write clock ticks in the 6502 emulator. Adrian Conlon 2019-02-18 00:52:45 +00:00
• ea82c58777 Add Z80 processor (untested, but complete) Adrian Conlon 2019-02-16 21:32:34 +00:00
• 3108a373d7 Interesting: in profiling, creating the mapping object was one of the major bottlenecks, when running the M6502 test suite. Adrian Conlon 2019-02-15 09:10:27 +00:00
• 219d65a57a No need to use LowByte/HighByte methods in Register16 construction: that's what it's layout is for. Adrian Conlon 2019-02-15 09:08:44 +00:00
• c6a7003b8d Help out callers using Register16 arguments a little: Don't always require the ".Word" property to be passed. Adrian Conlon 2019-02-15 00:26:01 +00:00