Initial commit

.gitignore

@@ -0,0 +1,9 @@
+.idea/
+65816.cbp
+CMakeCache.txt
+CMakeFiles/
+Makefile
+cmake_install.cmake
+lib65816.a
+simple-logger/
+.DS_Store

CMakeLists.txt

@@ -0,0 +1,40 @@
+cmake_minimum_required (VERSION 2.6)
+project (65816)
+
+include(ExternalProject)
+
+ExternalProject_Add(
+        simple-logger
+        PREFIX "${PROJECT_SOURCE_DIR}/simple-logger"
+        GIT_REPOSITORY https://github.com/FrancescoRigoni/Simple-Logger.git
+        INSTALL_COMMAND "")
+
+# Retrieve simple-logger sources location
+ExternalProject_Get_Property(simple-logger source_dir)
+set(SIMPLE_LOGGER_SRC ${source_dir})
+
+# Retrieve simple-logger binaries location
+ExternalProject_Get_Property(simple-logger binary_dir)
+set(SIMPLE_LOGGER_BIN ${binary_dir})
+
+# Add all include directories
+include_directories(src/** ${SIMPLE_LOGGER_SRC})
+# Add paths for linker
+link_directories(${SIMPLE_LOGGER_BIN})
+
+if (CMAKE_VERSION VERSION_LESS "3.1")
+if (CMAKE_CXX_COMPILER_ID STREQUAL "GNU")
+  set (CMAKE_CXX_FLAGS "--std=gnu++14 ${CMAKE_CXX_FLAGS}")
+endif ()
+else ()
+    set (CMAKE_CXX_STANDARD 14)
+endif ()
+
+# All warnings on
+set (CMAKE_CXX_FLAGS "-Wall ${CMAKE_CXX_FLAGS}")
+file(GLOB sources_65816 src/*.cpp src/opcodes/*.cpp)
+
+add_library(65816 ${sources_65816})
+
+add_dependencies(65816 simple-logger)
+target_link_libraries(65816 simpleLogger)

README.md

@@ -0,0 +1,2 @@
+# Lib65816
+Emulator library for the 65816 CPU

license.txt

@@ -0,0 +1,674 @@
+                    GNU GENERAL PUBLIC LICENSE
+                       Version 3, 29 June 2007
+
+ Copyright (C) 2007 Free Software Foundation, Inc. <http://fsf.org/>
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+section 13, concerning interaction through a network will apply to the
+combination as such.
+
+  14. Revised Versions of this License.
+
+  The Free Software Foundation may publish revised and/or new versions of
+the GNU General Public License from time to time.  Such new versions will
+be similar in spirit to the present version, but may differ in detail to
+address new problems or concerns.
+
+  Each version is given a distinguishing version number.  If the
+Program specifies that a certain numbered version of the GNU General
+Public License "or any later version" applies to it, you have the
+option of following the terms and conditions either of that numbered
+version or of any later version published by the Free Software
+Foundation.  If the Program does not specify a version number of the
+GNU General Public License, you may choose any version ever published
+by the Free Software Foundation.
+
+  If the Program specifies that a proxy can decide which future
+versions of the GNU General Public License can be used, that proxy's
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+to choose that version for the Program.
+
+  Later license versions may give you additional or different
+permissions.  However, no additional obligations are imposed on any
+author or copyright holder as a result of your choosing to follow a
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+
+  15. Disclaimer of Warranty.
+
+  THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY
+APPLICABLE LAW.  EXCEPT WHEN OTHERWISE STATED IN WRITING THE COPYRIGHT
+HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS" WITHOUT WARRANTY
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+  16. Limitation of Liability.
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+  IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING
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+EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF
+SUCH DAMAGES.
+
+  17. Interpretation of Sections 15 and 16.
+
+  If the disclaimer of warranty and limitation of liability provided
+above cannot be given local legal effect according to their terms,
+reviewing courts shall apply local law that most closely approximates
+an absolute waiver of all civil liability in connection with the
+Program, unless a warranty or assumption of liability accompanies a
+copy of the Program in return for a fee.
+
+                     END OF TERMS AND CONDITIONS
+
+            How to Apply These Terms to Your New Programs
+
+  If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these terms.
+
+  To do so, attach the following notices to the program.  It is safest
+to attach them to the start of each source file to most effectively
+state the exclusion of warranty; and each file should have at least
+the "copyright" line and a pointer to where the full notice is found.
+
+    <one line to give the program's name and a brief idea of what it does.>
+    Copyright (C) <year>  <name of author>
+
+    This program is free software: you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation, either version 3 of the License, or
+    (at your option) any later version.
+
+    This program is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+Also add information on how to contact you by electronic and paper mail.
+
+  If the program does terminal interaction, make it output a short
+notice like this when it starts in an interactive mode:
+
+    <program>  Copyright (C) <year>  <name of author>
+    This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+    This is free software, and you are welcome to redistribute it
+    under certain conditions; type `show c' for details.
+
+The hypothetical commands `show w' and `show c' should show the appropriate
+parts of the General Public License.  Of course, your program's commands
+might be different; for a GUI interface, you would use an "about box".
+
+  You should also get your employer (if you work as a programmer) or school,
+if any, to sign a "copyright disclaimer" for the program, if necessary.
+For more information on this, and how to apply and follow the GNU GPL, see
+<http://www.gnu.org/licenses/>.
+
+  The GNU General Public License does not permit incorporating your program
+into proprietary programs.  If your program is a subroutine library, you
+may consider it more useful to permit linking proprietary applications with
+the library.  If this is what you want to do, use the GNU Lesser General
+Public License instead of this License.  But first, please read
+<http://www.gnu.org/philosophy/why-not-lgpl.html>.

src/Addressing.cpp

@@ -0,0 +1,223 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "Cpu65816.hpp"
+
+#define LOG_TAG "Addressing"
+
+bool Cpu65816::opCodeAddressingCrossesPageBoundary(OpCode &opCode) {
+    switch(opCode.getAddressingMode()) {
+        case AddressingMode::AbsoluteIndexedWithX:
+        {
+            Address initialAddress(mDB, mSystemBus.readTwoBytes(mProgramAddress.newWithOffset(1)));
+            // TODO: figure out when to wrap around and when not to, it should not matter in this case
+            // but it matters when fetching data
+            Address finalAddress = Address::sumOffsetToAddress(initialAddress, indexWithXRegister());
+            return Address::offsetsAreOnDifferentPages(initialAddress.getOffset(), finalAddress.getOffset());
+        }
+        case AddressingMode::AbsoluteIndexedWithY:
+        {
+            Address initialAddress(mDB, mSystemBus.readTwoBytes(mProgramAddress.newWithOffset(1)));
+            // TODO: figure out when to wrap around and when not to, it should not matter in this case
+            // but it matters when fetching data
+            Address finalAddress = Address::sumOffsetToAddress(initialAddress, indexWithYRegister());
+            return Address::offsetsAreOnDifferentPages(initialAddress.getOffset(), finalAddress.getOffset());
+        }
+        case AddressingMode::DirectPageIndirectIndexedWithY:
+        {
+            uint16_t firstStageOffset = mD + mSystemBus.readByte(mProgramAddress.newWithOffset(1));
+            Address firstStageAddress(0x00, firstStageOffset);
+            uint16_t secondStageOffset = mSystemBus.readTwoBytes(firstStageAddress);
+            Address thirdStageAddress(mDB, secondStageOffset);
+            // TODO: figure out when to wrap around and when not to, it should not matter in this case
+            // but it matters when fetching data
+            Address finalAddress = Address::sumOffsetToAddress(thirdStageAddress, indexWithYRegister());
+            return Address::offsetsAreOnDifferentPages(thirdStageAddress.getOffset(), finalAddress.getOffset());
+        }
+        default:
+        {
+            Log::err(LOG_TAG).str("!!! Unsupported opCodeAddressingCrossesPageBoundary for opCode: ").hex(opCode.getCode(), 2).show();
+        }
+
+    }
+
+    return false;
+}
+
+Address Cpu65816::getAddressOfOpCodeData(OpCode &opCode) {
+    uint8_t dataAddressBank;
+    uint16_t dataAddressOffset;
+
+    switch(opCode.getAddressingMode()) {
+        case AddressingMode::Interrupt:
+        case AddressingMode::Accumulator:
+        case AddressingMode::Implied:
+        case AddressingMode::StackImplied:
+            // Not really used, doesn't make any sense since these opcodes do not have operands
+            return mProgramAddress;
+        case AddressingMode::Immediate:
+        case AddressingMode::BlockMove:
+            // Blockmove OpCodes have two bytes following them directly
+        case AddressingMode::StackAbsolute:
+            // Stack absolute is used to push values following the op code onto the stack
+        case AddressingMode::ProgramCounterRelative:
+            // Program counter relative OpCodes such as all branch instructions have an 8 bit operand
+            // following the op code
+        case AddressingMode::ProgramCounterRelativeLong:
+            // StackProgramCounterRelativeLong is only used by the PER OpCode, it has 16 bit operand
+        case AddressingMode::StackProgramCounterRelativeLong:
+            mProgramAddress.newWithOffset(1).getBankAndOffset(&dataAddressBank, &dataAddressOffset);
+            break;
+        case AddressingMode::Absolute:
+            dataAddressBank = mDB;
+            dataAddressOffset = mSystemBus.readTwoBytes(mProgramAddress.newWithOffset(1));
+            break;
+        case AddressingMode::AbsoluteLong:
+            mSystemBus.readAddressAt(mProgramAddress.newWithOffset(1)).getBankAndOffset(&dataAddressBank, &dataAddressOffset);
+            break;
+        case AddressingMode::AbsoluteIndirect:
+        {
+            dataAddressBank = mProgramAddress.getBank();
+            Address addressOfOffset(0x00, mSystemBus.readTwoBytes(mProgramAddress.newWithOffset(1)));
+            dataAddressOffset = mSystemBus.readTwoBytes(addressOfOffset);
+        }
+            break;
+        case AddressingMode::AbsoluteIndirectLong:
+        {
+            Address addressOfEffectiveAddress(0x00, mSystemBus.readTwoBytes(mProgramAddress.newWithOffset(1)));
+            mSystemBus.readAddressAt(addressOfEffectiveAddress).getBankAndOffset(&dataAddressBank, &dataAddressOffset);
+        }
+            break;
+        case AddressingMode::AbsoluteIndexedIndirectWithX:
+        {
+            Address firstStageAddress(mProgramAddress.getBank(), mSystemBus.readTwoBytes(mProgramAddress.newWithOffset(1)));
+            Address secondStageAddress = firstStageAddress.newWithOffsetNoWrapAround(indexWithXRegister());
+            dataAddressBank = mProgramAddress.getBank();
+            dataAddressOffset = mSystemBus.readTwoBytes(secondStageAddress);
+        }
+            break;
+        case AddressingMode::AbsoluteIndexedWithX:
+        {
+            Address firstStageAddress(mDB, mSystemBus.readTwoBytes(mProgramAddress.newWithOffset(1)));
+            Address::sumOffsetToAddressNoWrapAround(firstStageAddress, indexWithXRegister())
+                .getBankAndOffset(&dataAddressBank, &dataAddressOffset);;
+        }
+            break;
+        case AddressingMode::AbsoluteLongIndexedWithX:
+        {
+            Address firstStageAddress = mSystemBus.readAddressAt(mProgramAddress.newWithOffset(1));
+            Address::sumOffsetToAddressNoWrapAround(firstStageAddress, indexWithXRegister())
+                .getBankAndOffset(&dataAddressBank, &dataAddressOffset);;
+        }
+            break;
+        case AddressingMode::AbsoluteIndexedWithY:
+        {
+            Address firstStageAddress(mDB, mSystemBus.readTwoBytes(mProgramAddress.newWithOffset(1)));
+            Address::sumOffsetToAddressNoWrapAround(firstStageAddress, indexWithYRegister())
+                .getBankAndOffset(&dataAddressBank, &dataAddressOffset);;
+        }
+            break;
+        case AddressingMode::DirectPage:
+        {
+            // Direct page/Zero page always refers to bank zero
+            dataAddressBank = 0x00;
+            if (mCpuStatus.emulationFlag()) {
+                // 6502 uses zero page
+                dataAddressOffset = mSystemBus.readByte(mProgramAddress.newWithOffset(1));
+            } else {
+                // 65816 uses direct page
+                dataAddressOffset = mD + mSystemBus.readByte(mProgramAddress.newWithOffset(1));
+            }
+        }
+            break;
+        case AddressingMode::DirectPageIndexedWithX:
+        {
+            dataAddressBank = 0x00;
+            dataAddressOffset = mD + indexWithXRegister() + mSystemBus.readByte(mProgramAddress.newWithOffset(1));
+        }
+            break;
+        case AddressingMode::DirectPageIndexedWithY:
+        {
+            dataAddressBank = 0x00;
+            dataAddressOffset = mD + indexWithYRegister() + mSystemBus.readByte(mProgramAddress.newWithOffset(1));
+        }
+            break;
+        case AddressingMode::DirectPageIndirect:
+        {
+            Address firstStageAddress(0x00, mD + mSystemBus.readByte(mProgramAddress.newWithOffset(1)));
+            dataAddressBank = mDB;
+            dataAddressOffset = mSystemBus.readTwoBytes(firstStageAddress);
+        }
+            break;
+        case AddressingMode::DirectPageIndirectLong:
+        {
+            Address firstStageAddress(0x00, mD + mSystemBus.readByte(mProgramAddress.newWithOffset(1)));
+            mSystemBus.readAddressAt(firstStageAddress)
+                .getBankAndOffset(&dataAddressBank, &dataAddressOffset);;
+        }
+            break;
+        case AddressingMode::DirectPageIndexedIndirectWithX:
+        {
+            Address firstStageAddress(0x00, mD + mSystemBus.readByte(mProgramAddress.newWithOffset(1)) + indexWithXRegister());
+            dataAddressBank = mDB;
+            dataAddressOffset = mSystemBus.readTwoBytes(firstStageAddress);
+        }
+            break;
+        case AddressingMode::DirectPageIndirectIndexedWithY:
+        {
+            Address firstStageAddress(0x00, mD + mSystemBus.readByte(mProgramAddress.newWithOffset(1)));
+            uint16_t secondStageOffset = mSystemBus.readTwoBytes(firstStageAddress);
+            Address thirdStageAddress(mDB, secondStageOffset);
+            Address::sumOffsetToAddressNoWrapAround(thirdStageAddress, indexWithYRegister())
+                .getBankAndOffset(&dataAddressBank, &dataAddressOffset);
+        }
+            break;
+        case AddressingMode::DirectPageIndirectLongIndexedWithY:
+        {
+            Address firstStageAddress(0x00, mD + mSystemBus.readByte(mProgramAddress.newWithOffset(1)));
+            Address secondStageAddress = mSystemBus.readAddressAt(firstStageAddress);
+            Address::sumOffsetToAddressNoWrapAround(secondStageAddress, indexWithYRegister())
+                .getBankAndOffset(&dataAddressBank, &dataAddressOffset);
+        }
+            break;
+        case AddressingMode::StackRelative:
+        {
+            dataAddressBank = 0x00;
+            dataAddressOffset = mStack.getStackPointer() + mSystemBus.readByte(mProgramAddress.newWithOffset(1));
+        }
+            break;
+        case AddressingMode::StackDirectPageIndirect:
+        {
+            dataAddressBank = 0x00;
+            dataAddressOffset = mD + mSystemBus.readByte(mProgramAddress.newWithOffset(1));
+        }
+            break;
+        case AddressingMode::StackRelativeIndirectIndexedWithY:
+        {
+            Address firstStageAddress(0x00, mStack.getStackPointer() + mSystemBus.readByte(mProgramAddress.newWithOffset(1)));
+            uint16_t secondStageOffset = mSystemBus.readTwoBytes(firstStageAddress);
+            Address thirdStageAddress(mDB, secondStageOffset);
+            Address::sumOffsetToAddressNoWrapAround(thirdStageAddress, indexWithYRegister())
+                .getBankAndOffset(&dataAddressBank, &dataAddressOffset);
+        }
+            break;
+    }
+
+    return Address(dataAddressBank, dataAddressOffset);
+}

src/Addressing.hpp

@@ -0,0 +1,55 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef ADDRESSING_HPP
+#define ADDRESSING_HPP
+
+enum class AddressingMode {
+    Interrupt,
+    Accumulator,
+    BlockMove,
+    Implied,
+    Immediate,
+    Absolute,
+    AbsoluteLong,
+    AbsoluteIndirect,
+    AbsoluteIndirectLong,
+    AbsoluteIndexedIndirectWithX, // index with X
+    AbsoluteIndexedWithX,
+    AbsoluteLongIndexedWithX,
+    AbsoluteIndexedWithY,
+    DirectPage,
+    DirectPageIndexedWithX,
+    DirectPageIndexedWithY,
+    DirectPageIndirect,
+    DirectPageIndirectLong,
+    DirectPageIndexedIndirectWithX,
+    DirectPageIndirectIndexedWithY,
+    DirectPageIndirectLongIndexedWithY,
+    StackImplied,
+    StackRelative,
+    StackAbsolute,
+    StackDirectPageIndirect,
+    StackProgramCounterRelativeLong,
+    StackRelativeIndirectIndexedWithY,
+    ProgramCounterRelative,
+    ProgramCounterRelativeLong
+};
+
+#endif // ADDRESSING_HPP

src/Binary.cpp

@@ -0,0 +1,183 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "Binary.hpp"
+
+namespace Binary {
+
+uint8_t lower8BitsOf(uint16_t value) {
+    return ((uint8_t)(value & 0xFF));
+}
+
+uint8_t higher8BitsOf(uint16_t value) {
+    return ((uint8_t)((value & 0xFF00) >> 8));
+}
+
+uint16_t lower16BitsOf(uint32_t value) {
+    return ((uint16_t)(value & 0xFFFF));
+}
+
+bool is8bitValueNegative(uint8_t value) {
+    return (value & 0x80);
+}
+
+bool is16bitValueNegative(uint16_t value) {
+    return (value & 0x8000);
+}
+
+bool is8bitValueZero(uint8_t value) {
+    return (value == 0x00);
+}
+
+bool is16bitValueZero(uint16_t value) {
+    return (value == 0x0000);
+}
+
+void setLower8BitsOf16BitsValue(uint16_t *destination, uint8_t value) {
+    *destination &= 0xFF00;
+    *destination |= value;
+}
+
+void setBitIn8BitValue(uint8_t *value, uint8_t bitNumber) {
+    auto mask = static_cast<uint8_t>(1 << bitNumber);
+    *value = *value | mask;
+}
+
+void clearBitIn8BitValue(uint8_t *value, uint8_t bitNumber) {
+    auto mask = static_cast<uint8_t>(1 << bitNumber);
+    mask = static_cast<uint8_t>(mask ^ 0xFF);
+    *value = *value & mask;
+}
+
+void setBitIn16BitValue(uint16_t *value, uint8_t bitNumber) {
+    auto mask = static_cast<uint16_t>(1 << bitNumber);
+    *value = *value | mask;
+}
+
+void clearBitIn16BitValue(uint16_t *value, uint8_t bitNumber) {
+    auto mask = static_cast<uint16_t>(1 << bitNumber);
+    mask = static_cast<uint16_t>(mask ^ 0xFFFF);
+    *value = *value & mask;
+}
+
+uint8_t convert8BitToBcd(uint8_t val)
+{
+	uint8_t value = val;
+	uint8_t result = 0;
+	uint8_t shiftLeft = 0;
+	while (value > 0) {
+        auto digit = static_cast<uint8_t>(value % 10);
+		result |= digit << shiftLeft;
+		value /= 10;
+		shiftLeft += 4;
+	}
+
+  	return result;
+}
+
+uint16_t convert16BitToBcd(uint16_t val)
+{
+	uint16_t value = val;
+	uint16_t result = 0;
+	uint16_t shiftLeft = 0;
+	while (value > 0) {
+        auto digit = static_cast<uint8_t>(value % 10);
+		result |= digit << shiftLeft;
+		value /= 10;
+		shiftLeft += 4;
+	}
+
+  	return result;
+}
+
+bool bcdSum8Bit(uint8_t bcdFirst, uint8_t bcdSecond, uint8_t *result, bool carry) {
+	uint8_t shift = 0;
+	*result = 0;
+
+	while (shift < 8) {
+        auto digitOfFirst = static_cast<uint8_t>(bcdFirst & 0xF);
+        auto digitOfSecond = static_cast<uint8_t>(bcdSecond & 0xF);
+        auto sumOfDigits = static_cast<uint8_t>(digitOfFirst + digitOfSecond + (carry ? 1 : 0));
+		carry = sumOfDigits > 9;
+		if (carry) sumOfDigits += 6;
+		sumOfDigits &= 0xF;
+		*result |= sumOfDigits << shift;
+
+		shift += 4;
+		bcdFirst >>= shift;
+		bcdSecond >>= shift;
+	}
+
+	return carry;
+}
+
+bool bcdSubtract8Bit(uint8_t bcdFirst, uint8_t bcdSecond, uint8_t *result, bool borrow) {
+	uint8_t shift = 0;
+	*result = 0;
+
+	while (shift < 8) {
+        auto digitOfFirst = static_cast<uint8_t>(bcdFirst & 0xF);
+        auto digitOfSecond = static_cast<uint8_t>(bcdSecond & 0xF);
+        auto diffOfDigits = static_cast<uint8_t>(digitOfFirst - digitOfSecond - (borrow ? 1 : 0));
+		borrow = diffOfDigits > 9;
+		if (borrow) diffOfDigits -= 6;
+		diffOfDigits &= 0xF;
+		*result |= diffOfDigits << shift;
+
+		shift += 4;
+		bcdFirst >>= shift;
+		bcdSecond >>= shift;
+	}
+
+	return borrow;
+}
+
+bool bcdSum16Bit(uint16_t bcdFirst, uint16_t bcdSecond, uint16_t *result, bool carry) {
+	*result = 0;
+	uint8_t shift = 0;
+	while (shift < 16) {
+        auto digitOfFirst = static_cast<uint8_t>(bcdFirst & 0xFF);
+        auto digitOfSecond = static_cast<uint8_t>(bcdSecond & 0xFF);
+		uint8_t partialresult = 0;
+		carry = bcdSum8Bit(digitOfFirst, digitOfSecond, &partialresult, carry);
+		*result |= partialresult << shift;
+		shift += 8;
+		bcdFirst >>= shift;
+		bcdSecond >>= shift;
+	}
+	return carry;
+}
+
+bool bcdSubtract16Bit(uint16_t bcdFirst, uint16_t bcdSecond, uint16_t *result, bool borrow) {
+	*result = 0;
+	uint8_t shift = 0;
+	while (shift < 16) {
+        auto digitOfFirst = static_cast<uint8_t>(bcdFirst & 0xFF);
+        auto digitOfSecond = static_cast<uint8_t>(bcdSecond & 0xFF);
+		uint8_t partialresult = 0;
+		borrow = bcdSubtract8Bit(digitOfFirst, digitOfSecond, &partialresult, borrow);
+		*result |= partialresult << shift;
+		shift += 8;
+		bcdFirst >>= shift;
+		bcdSecond >>= shift;
+	}
+	return borrow;
+}
+
+}

src/Binary.hpp

@@ -0,0 +1,47 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <stdint.h>
+
+#ifndef __UTILS__
+#define __UTILS__
+
+namespace Binary {
+    uint8_t lower8BitsOf(uint16_t);
+    uint8_t higher8BitsOf(uint16_t);
+    uint16_t lower16BitsOf(uint32_t);
+    bool is8bitValueNegative(uint8_t);
+    bool is16bitValueNegative(uint16_t);
+    bool is8bitValueZero(uint8_t);
+    bool is16bitValueZero(uint16_t);
+    void setLower8BitsOf16BitsValue(uint16_t *, uint8_t);
+    void setBitIn8BitValue(uint8_t *, uint8_t);
+    void clearBitIn8BitValue(uint8_t *, uint8_t);
+    void setBitIn16BitValue(uint16_t *, uint8_t);
+    void clearBitIn16BitValue(uint16_t *, uint8_t);
+
+    uint8_t convert8BitToBcd(uint8_t);
+    uint16_t convert16BitToBcd(uint16_t);
+    bool bcdSum8Bit(uint8_t, uint8_t, uint8_t *, bool);
+    bool bcdSum16Bit(uint16_t, uint16_t, uint16_t *, bool);
+    bool bcdSubtract8Bit(uint8_t, uint8_t, uint8_t *, bool);
+    bool bcdSubtract16Bit(uint16_t, uint16_t, uint16_t *, bool);
+}
+
+#endif

src/BuildConfig.hpp

@@ -0,0 +1,29 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/**
+ * The following define enables building the Cpu65816 for 65C02 emulation.
+ * Note that this will enable 65C02 emulation but NOT R65C02 emulation.
+ * The R65C02 cpu has several different opcodes and is not compatible
+ * with the 65C02.
+ *
+ * This define enables some minor differences in cycles counting
+ * for some opcodes.
+ * */
+//#define EMU_65C02

src/Cpu65816.cpp

@@ -0,0 +1,125 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "Cpu65816.hpp"
+
+#include <cmath>
+
+#ifdef EMU_65C02
+#define LOG_TAG "Cpu65C02"
+#else
+#define LOG_TAG (mCpuStatus.emulationFlag() ? "Cpu6502" : "Cpu65816")
+#endif
+
+Cpu65816::Cpu65816(SystemBus &systemBus, EmulationModeInterrupts *emulationInterrupts, NativeModeInterrupts *nativeInterrupts) :
+            mSystemBus(systemBus),
+            mEmulationInterrupts(emulationInterrupts),
+            mNativeInterrupts(nativeInterrupts),
+            mStack(&mSystemBus) {
+}
+
+/**
+ * Resets the cpu to its initial state.
+ * */
+void Cpu65816::reset() {
+    setRESPin(true);
+    mCpuStatus.setEmulationFlag();
+    mCpuStatus.setAccumulatorWidthFlag();
+    mCpuStatus.setIndexWidthFlag();
+    mX &= 0xFF;
+    mY &= 0xFF;
+    mD = 0x0;
+    mStack = Stack(&mSystemBus);
+    mProgramAddress = Address(0x00, mEmulationInterrupts->reset);
+}
+
+void Cpu65816::setRESPin(bool value) {
+    if (value == false && mPins.RES == true) {
+        reset();
+    }
+    mPins.RES = value;
+}
+
+void Cpu65816::setRDYPin(bool value) {
+    mPins.RDY = value;
+}
+
+bool Cpu65816::executeNextInstruction() {
+    if (mPins.RES) {
+        return false;
+    }
+
+    // Fetch the instruction
+    const uint8_t instruction = mSystemBus.readByte(mProgramAddress);
+    OpCode opCode = OP_CODE_TABLE[instruction];
+
+    // Execute it
+    return opCode.execute(*this);
+}
+
+bool Cpu65816::accumulatorIs8BitWide() {
+    // Accumulator is always 8 bit in emulation mode.
+    if (mCpuStatus.emulationFlag()) return true;
+    // Accumulator width set to one means 8 bit accumulator.
+    else return mCpuStatus.accumulatorWidthFlag();
+}
+
+bool Cpu65816::accumulatorIs16BitWide() {
+    return !accumulatorIs8BitWide();
+}
+
+bool Cpu65816::indexIs8BitWide() {
+    // Index is always 8 bit in emulation mode.
+    if (mCpuStatus.emulationFlag()) return true;
+    // Index width set to one means 8 bit accumulator.
+    else return mCpuStatus.indexWidthFlag();
+}
+
+bool Cpu65816::indexIs16BitWide() {
+    return !indexIs8BitWide();
+}
+
+void Cpu65816::addToCycles(int cycles) {
+    mTotalCyclesCounter += cycles;
+}
+
+void Cpu65816::subtractFromCycles(int cycles) {
+    mTotalCyclesCounter -= cycles;
+}
+
+void Cpu65816::addToProgramAddress(int bytes) {
+    mProgramAddress.incrementOffsetBy(bytes);
+}
+
+void Cpu65816::addToProgramAddressAndCycles(int bytes, int cycles) {
+    addToCycles(cycles);
+    addToProgramAddress(bytes);
+}
+
+uint16_t Cpu65816::indexWithXRegister() {
+    return indexIs8BitWide() ? Binary::lower8BitsOf(mX) : mX;
+}
+
+uint16_t Cpu65816::indexWithYRegister() {
+    return indexIs8BitWide() ? Binary::lower8BitsOf(mY) : mY;
+}
+
+void Cpu65816::setProgramAddress(const Address &address) {
+    mProgramAddress = address;
+}

src/Cpu65816.hpp

@@ -0,0 +1,184 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __CPU_65816__
+#define __CPU_65816__
+
+#include <stdint.h>
+
+#include "SystemBus.hpp"
+#include "Interrupt.hpp"
+#include "Addressing.hpp"
+#include "Stack.hpp"
+#include "CpuStatus.hpp"
+#include "opcodes/OpCode.hpp"
+#include "Log.hpp"
+#include "Binary.hpp"
+#include "BuildConfig.hpp"
+
+// Macro used by OpCode methods when an unrecognized OpCode is being executed.
+#define LOG_UNEXPECTED_OPCODE(opCode) Log::err(LOG_TAG).str("Unexpected OpCode: ").str(opCode.getName()).show();
+
+class Cpu65816Debugger;
+
+class Cpu65816 {
+        friend class Cpu65816Debugger;
+    public:
+        Cpu65816(SystemBus &, EmulationModeInterrupts *, NativeModeInterrupts *);
+
+        void setRESPin(bool);
+        void setRDYPin(bool);
+
+        // Temporary
+        bool executeNextInstruction();
+
+    private:
+        SystemBus &mSystemBus;
+        EmulationModeInterrupts *mEmulationInterrupts;
+        NativeModeInterrupts *mNativeInterrupts;
+
+        // Accumulator register
+        uint16_t mA = 0;
+        // X index register
+        uint16_t mX = 0;
+        // Y index register
+        uint16_t mY = 0;
+        // Status register
+        CpuStatus mCpuStatus;
+        // Data bank register
+        uint8_t mDB = 0;
+        // Direct page register
+        uint16_t mD = 0;
+
+        struct {
+            // Reset to true means low power mode (do nothing)
+            bool RES = true;
+            // Ready to false means CPU is waiting for an NMI/IRQ/ABORT/RESET
+            bool RDY = false;
+        } mPins;
+
+        Stack mStack;
+
+        // Address of the current OpCode
+        Address mProgramAddress {0x00, 0x0000};
+
+        // Total number of cycles
+        uint64_t mTotalCyclesCounter = 0;
+
+        bool accumulatorIs8BitWide();
+        bool accumulatorIs16BitWide();
+        bool indexIs8BitWide();
+        bool indexIs16BitWide();
+
+        uint16_t indexWithXRegister();
+        uint16_t indexWithYRegister();
+
+        Address getAddressOfOpCodeData(OpCode &);
+        bool opCodeAddressingCrossesPageBoundary(OpCode &);
+
+        void setProgramAddress(const Address &);
+        void addToCycles(int);
+        void subtractFromCycles(int);
+        void addToProgramAddress(int);
+        void addToProgramAddressAndCycles(int, int);
+
+        // OpCode Table.
+        static OpCode OP_CODE_TABLE[];
+
+        // OpCodes handling routines.
+        // Implementations for these methods can be found in the corresponding OpCode_XXX.cpp file.
+        void executeORA(OpCode &);
+        void executeORA8Bit(OpCode &);
+        void executeORA16Bit(OpCode &);
+        void executeStack(OpCode &);
+        void executeStatusReg(OpCode &);
+        void executeMemoryROL(OpCode &);
+        void executeAccumulatorROL(OpCode &);
+        void executeROL(OpCode &);
+        void executeMemoryROR(OpCode &);
+        void executeAccumulatorROR(OpCode &);
+        void executeROR(OpCode &);
+        void executeInterrupt(OpCode &);
+        void executeJumpReturn(OpCode &);
+        void execute8BitSBC(OpCode &);
+        void execute16BitSBC(OpCode &);
+        void execute8BitBCDSBC(OpCode &);
+        void execute16BitBCDSBC(OpCode &);
+        void executeSBC(OpCode &);
+        void execute8BitADC(OpCode &);
+        void execute16BitADC(OpCode &);
+        void execute8BitBCDADC(OpCode &);
+        void execute16BitBCDADC(OpCode &);
+        void executeADC(OpCode &);
+        void executeSTA(OpCode &);
+        void executeSTX(OpCode &);
+        void executeSTY(OpCode &);
+        void executeSTZ(OpCode &);
+        void executeTransfer(OpCode &);
+        void executeMemoryASL(OpCode &);
+        void executeAccumulatorASL(OpCode &);
+        void executeASL(OpCode &);
+        void executeAND8Bit(OpCode &);
+        void executeAND16Bit(OpCode &);
+        void executeAND(OpCode &);
+        void executeLDA8Bit(OpCode &);
+        void executeLDA16Bit(OpCode &);
+        void executeLDA(OpCode &);
+        void executeLDX8Bit(OpCode &);
+        void executeLDX16Bit(OpCode &);
+        void executeLDX(OpCode &);
+        void executeLDY8Bit(OpCode &);
+        void executeLDY16Bit(OpCode &);
+        void executeLDY(OpCode &);
+        void executeEOR8Bit(OpCode &);
+        void executeEOR16Bit(OpCode &);
+        void executeEOR(OpCode &);
+        int executeBranchShortOnCondition(bool, OpCode &);
+        int executeBranchLongOnCondition(bool, OpCode &);
+        void executeBranch(OpCode &);
+        void execute8BitCMP(OpCode &);
+        void execute16BitCMP(OpCode &);
+        void executeCMP(OpCode &);
+        void execute8BitDecInMemory(OpCode &);
+        void execute16BitDecInMemory(OpCode &);
+        void execute8BitIncInMemory(OpCode &);
+        void execute16BitIncInMemory(OpCode &);
+        void executeINCDEC(OpCode &);
+        void execute8BitCPX(OpCode &);
+        void execute16BitCPX(OpCode &);
+        void execute8BitCPY(OpCode &);
+        void execute16BitCPY(OpCode &);
+        void executeCPXCPY(OpCode &);
+        void execute8BitTSB(OpCode &);
+        void execute16BitTSB(OpCode &);
+        void execute8BitTRB(OpCode &);
+        void execute16BitTRB(OpCode &);
+        void executeTSBTRB(OpCode &);
+        void execute8BitBIT(OpCode &);
+        void execute16BitBIT(OpCode &);
+        void executeBIT(OpCode &);
+        void executeMemoryLSR(OpCode &);
+        void executeAccumulatorLSR(OpCode &);
+        void executeLSR(OpCode &);
+        void executeMisc(OpCode &);
+
+        void reset();
+};
+
+#endif

src/Cpu65816Debugger.cpp

@@ -0,0 +1,200 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "Cpu65816Debugger.hpp"
+#include "Cpu65816.hpp"
+
+#define LOG_TAG "Cpu65816Debugger"
+
+Cpu65816Debugger::Cpu65816Debugger(Cpu65816 &cpu) : mCpu(cpu) {
+    cpu.setRESPin(false);
+
+    Log::dbg(LOG_TAG).str("Cpu is ready to run").show();
+    Log::dbg(LOG_TAG).str("Emulation mode RST vector at").sp().hex(mCpu.mEmulationInterrupts->reset, 4).show();
+    Log::dbg(LOG_TAG).str("Native mode BRK vector at").sp().hex(mCpu.mNativeInterrupts->brk, 4).show();
+    Log::dbg(LOG_TAG).str("Native mode VSYNC vector at").sp().hex(mCpu.mNativeInterrupts->nonMaskableInterrupt, 4).show();
+}
+
+void Cpu65816Debugger::step() {
+    if (mBreakpointHit) return;
+
+    mOnBeforeStepHandler();
+    const uint8_t instruction = mCpu.mSystemBus.readByte(mCpu.mProgramAddress);
+    OpCode opCode = mCpu.OP_CODE_TABLE[instruction];
+    logOpCode(opCode);
+
+    mCpu.executeNextInstruction();
+
+    mOnAfterStepHandler();
+
+    if (mCpu.mProgramAddress.getBank() == mBreakPointAddress.getBank() &&
+        mCpu.mProgramAddress.getOffset() == mBreakPointAddress.getOffset()) {
+        mBreakpointHit = true;
+        Log::dbg(LOG_TAG).str("BREAKPOINT").sp()
+                .hex(mBreakPointAddress.getBank(), 2).hex(mBreakPointAddress.getOffset(), 4).show();
+        mOnBreakPointHandler();
+    }
+}
+
+void Cpu65816Debugger::doBeforeStep(const std::function<void ()> handler) {
+    mOnBeforeStepHandler = handler;
+}
+
+void Cpu65816Debugger::doAfterStep(const std::function<void ()> handler) {
+    mOnAfterStepHandler = handler;
+}
+
+void Cpu65816Debugger::onBreakPoint(const std::function<void ()> handler) {
+    mOnBreakPointHandler = handler;
+}
+
+void Cpu65816Debugger::setBreakPoint(const Address &address) {
+    mBreakPointAddress = address;
+}
+
+void Cpu65816Debugger::logStatusRegister() const {
+    Log::trc(LOG_TAG).str("P (Status): ").hex(mCpu.mCpuStatus.getRegisterValue(), 2).show();
+}
+
+void Cpu65816Debugger::dumpCpu() const {
+    Log::trc(LOG_TAG).str("====== CPU status start ======").show();
+    Log::trc(LOG_TAG).str("A: ").hex(mCpu.mA, 4).sp().str("X: ").hex(mCpu.mX, 4).sp().str("Y: ").hex(mCpu.mY, 4).show();
+    Log::trc(LOG_TAG).str("PB: ").hex(mCpu.mProgramAddress.getBank(), 2).sp().str("PC: ").hex(mCpu.mProgramAddress.getOffset(), 4).show();
+    Log::trc(LOG_TAG).str("DB: ").hex(mCpu.mDB, 2).sp().str("D: ").hex(mCpu.mD, 4).show();
+    Log::trc(LOG_TAG).str("S (Stack pointer): ").hex(mCpu.mStack.getStackPointer(), 4).show();
+    logStatusRegister();
+    Log::trc(LOG_TAG).str("====== CPU status end ======").show();
+}
+
+void Cpu65816Debugger::logOpCode(OpCode &opCode) const {
+    Address onePlusOpCodeAddress = mCpu.mProgramAddress.newWithOffset(1);
+
+    Log &log = Log::trc(LOG_TAG);
+    log.hex(mCpu.mProgramAddress.getBank(), 2).str(":").hex(mCpu.mProgramAddress.getOffset(), 4);
+    log.str(" | ").hex(opCode.getCode(), 2).sp().str(opCode.getName()).sp();
+
+    switch(opCode.getAddressingMode()) {
+        case AddressingMode::Interrupt:
+        case AddressingMode::Accumulator:
+        case AddressingMode::Implied:
+            break;
+        case AddressingMode::Immediate:
+            // This refers to accumulator size to estimate the kind of value to print.
+            // Instructions using index registers might print the wrong value.
+            if (mCpu.accumulatorIs8BitWide()) {
+                log.str("#").hex(mCpu.mSystemBus.readByte(mCpu.getAddressOfOpCodeData(opCode)), 2);
+            } else {
+                log.str("#").hex(mCpu.mSystemBus.readTwoBytes(mCpu.getAddressOfOpCodeData(opCode)), 4);
+            }
+            break;
+        case AddressingMode::Absolute:
+            log.hex(mCpu.getAddressOfOpCodeData(opCode).getOffset(), 4).sp();
+            log.str("                    [Absolute]");
+            break;
+        case AddressingMode::AbsoluteLong:
+        {
+            Address opCodeDataAddress = mCpu.getAddressOfOpCodeData(opCode);
+            log.hex(opCodeDataAddress.getBank(), 2).str(":").hex(opCodeDataAddress.getOffset(), 4).sp();
+            log.str("                [Absolute Long]");
+        }
+            break;
+        case AddressingMode::AbsoluteIndirect:
+            break;
+        case AddressingMode::AbsoluteIndirectLong:
+            break;
+        case AddressingMode::AbsoluteIndexedIndirectWithX:
+            break;
+        case AddressingMode::AbsoluteIndexedWithX:
+            log.hex(mCpu.mSystemBus.readTwoBytes(onePlusOpCodeAddress), 4).str(", X").sp();
+            log.str("                 [Absolute Indexed, X]");
+            break;
+        case AddressingMode::AbsoluteLongIndexedWithX:
+        {
+            Address opCodeDataAddress = mCpu.getAddressOfOpCodeData(opCode);
+            Address effectiveAddress = mCpu.mSystemBus.readAddressAt(opCodeDataAddress);
+            log.hex(effectiveAddress.getBank(), 2).str(":").hex(effectiveAddress.getOffset(), 4).str(", X").sp();
+            log.str("             [Absolute Long Indexed, X]");
+        }
+            break;
+        case AddressingMode::AbsoluteIndexedWithY:
+            log.hex(mCpu.mSystemBus.readTwoBytes(mCpu.getAddressOfOpCodeData(opCode)), 4).str(", Y").sp();
+            log.str("                    [Absolute Indexed, Y]");
+            break;
+        case AddressingMode::DirectPage:
+            log.hex(mCpu.mSystemBus.readByte(onePlusOpCodeAddress), 2).sp();
+            log.str("                      [Direct Page]");
+            break;
+        case AddressingMode::DirectPageIndexedWithX:
+            log.hex(mCpu.mSystemBus.readByte(onePlusOpCodeAddress), 2).str(", X").sp();
+            log.str("                    [Direct Page Indexed, X]");
+            break;
+        case AddressingMode::DirectPageIndexedWithY:
+            log.hex(mCpu.mSystemBus.readByte(onePlusOpCodeAddress), 2).str(", Y").sp();
+            log.str("                    [Direct Page Indexed, Y]");
+            break;
+        case AddressingMode::DirectPageIndirect:
+            log.str("(").hex(mCpu.mSystemBus.readByte(onePlusOpCodeAddress), 2).str(")").sp();
+            log.str("                    [Direct Page Indirect]");
+            break;
+        case AddressingMode::DirectPageIndirectLong:
+            log.str("[").hex(mCpu.mSystemBus.readByte(mCpu.getAddressOfOpCodeData(opCode)), 2).str("]").sp();
+            log.str("                    [Direct Page Indirect Long]");
+            break;
+        case AddressingMode::DirectPageIndexedIndirectWithX:
+            log.str("(").hex(mCpu.mSystemBus.readByte(mCpu.getAddressOfOpCodeData(opCode)), 2).str(", X)").sp();
+            log.str("                    [Direct Page Indexed Indirect, X]");
+            break;
+        case AddressingMode::DirectPageIndirectIndexedWithY:
+            log.str("(").hex(mCpu.mSystemBus.readByte(mCpu.getAddressOfOpCodeData(opCode)), 2).str("), Y").sp();
+            log.str("                    [Direct Page Indirect Indexed, Y]");
+            break;
+        case AddressingMode::DirectPageIndirectLongIndexedWithY:
+            log.str("[").hex(mCpu.mSystemBus.readByte(mCpu.getAddressOfOpCodeData(opCode)), 2).str("], Y").sp();
+            log.str("                    [Direct Page Indirect Indexed, Y]");
+            break;
+        case AddressingMode::StackImplied:
+            log.str("                          [Stack Implied]");
+            break;
+        case AddressingMode::StackRelative:
+            log.hex(mCpu.mSystemBus.readByte(mCpu.getAddressOfOpCodeData(opCode)), 2).str(", S").sp();
+            log.str("                    [Stack Relative]");
+            break;
+        case AddressingMode::StackAbsolute:
+            break;
+        case AddressingMode::StackDirectPageIndirect:
+            break;
+        case AddressingMode::StackProgramCounterRelativeLong:
+            break;
+        case AddressingMode::StackRelativeIndirectIndexedWithY:
+            log.str("(").hex(mCpu.mSystemBus.readByte(Address::sumOffsetToAddressWrapAround(mCpu.mProgramAddress, 1)), 2);
+            log.str(", S), Y").sp();
+            log.str("                    [Absolute Indexed, X]");
+            break;
+        case AddressingMode::ProgramCounterRelative:
+            log.hex(mCpu.mSystemBus.readByte(mCpu.getAddressOfOpCodeData(opCode)), 2).sp();
+            log.str("                      [Program Counter Relative]");
+            break;
+        case AddressingMode::ProgramCounterRelativeLong:
+            break;
+        case AddressingMode::BlockMove:
+            break;
+    }
+
+    log.show();
+}

src/Cpu65816Debugger.hpp

@@ -0,0 +1,56 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef CPU65816DEBUGGER_H
+#define CPU65816DEBUGGER_H
+
+#include <cstdint>
+#include <functional>
+
+#include "SystemBusDevice.hpp"
+#include "BuildConfig.hpp"
+#include "Cpu65816.hpp"
+
+class Cpu65816Debugger {
+    public:
+        Cpu65816Debugger(Cpu65816 &);
+
+        void step();
+        void setBreakPoint(const Address &);
+        void dumpCpu() const ;
+        void logStatusRegister() const ;
+        void logOpCode(OpCode &) const ;
+
+        void doBeforeStep(std::function<void ()>);
+        void doAfterStep(std::function<void ()>);
+        void onBreakPoint(std::function<void ()>);
+
+    private:
+        std::function<void ()> mOnBeforeStepHandler;
+        std::function<void ()> mOnAfterStepHandler;
+        std::function<void ()> mOnBreakPointHandler;
+
+        // Let's assume $00:$0000 is not a valid address for code
+        Address mBreakPointAddress {0x00, 0x0000};
+        bool mBreakpointHit = false;
+
+        Cpu65816 &mCpu;
+};
+
+#endif // CPU65816DEBUGGER_H

src/CpuStatus.cpp

@@ -0,0 +1,255 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "CpuStatus.hpp"
+#include "Log.hpp"
+#include "Binary.hpp"
+
+#define LOG_TAG "CpuStatus"
+
+/* **********************************************
+ * 
+ * Flags:
+ * 
+ *  b flag: the break flag
+ *  c flag: the carry flag
+ *  d flag: the decimal mode flag
+ *  e flag: the emulation mode flag
+ *  i flag: the interrupt disable flag
+ *  m flag: the accumulator and memory width flag
+ *  n flag: the negative flag
+ *  v flag: the overflow flag
+ *  x flag: the index register width flag
+ *  z flag: the zero flag
+ * 
+ * **********************************************/
+
+#define STATUS_CARRY                    0x01
+#define STATUS_ZERO                     0x02
+#define STATUS_INTERRUPT_DISABLE        0x04
+#define STATUS_DECIMAL                  0x08
+
+// In emulation mode
+#define STATUS_BREAK                    0X10
+// In native mode (x = 0, 16 bit)
+#define STATUS_INDEX_WIDTH              0X10
+// Only used in native mode
+#define STATUS_ACCUMULATOR_WIDTH        0X20
+
+#define STATUS_OVERFLOW                 0X40
+#define STATUS_SIGN                     0X80
+
+CpuStatus::CpuStatus() {
+}
+
+void CpuStatus::setZeroFlag() {
+    mZeroFlag = true;
+}
+
+void CpuStatus::setSignFlag() {
+    mSignFlag = true;
+}
+
+void CpuStatus::setDecimalFlag() {
+    mDecimalFlag = true;
+}
+
+void CpuStatus::setInterruptDisableFlag() {
+    mInterruptDisableFlag = true;
+}
+
+void CpuStatus::setAccumulatorWidthFlag() {
+    mAccumulatorWidthFlag = true;
+}
+
+void CpuStatus::setIndexWidthFlag() {
+    mIndexWidthFlag = true;
+}
+
+void CpuStatus::setCarryFlag() {
+    mCarryFlag = true;
+}
+
+void CpuStatus::setEmulationFlag() {
+    mEmulationFlag = true;
+}
+
+void CpuStatus::clearZeroFlag() {
+    mZeroFlag = false;
+}
+
+void CpuStatus::clearSignFlag() {
+    mSignFlag = false;
+}
+
+void CpuStatus::clearDecimalFlag() {
+    mDecimalFlag = false;
+}
+
+void CpuStatus::clearInterruptDisableFlag() {
+    mInterruptDisableFlag = false;
+}
+
+void CpuStatus::clearAccumulatorWidthFlag() {
+    mAccumulatorWidthFlag = false;
+}
+
+void CpuStatus::clearIndexWidthFlag() {
+    mIndexWidthFlag = false;
+}
+
+void CpuStatus::clearCarryFlag() {
+    mCarryFlag = false;
+}
+
+void CpuStatus::clearEmulationFlag() {
+    mEmulationFlag = false;
+}
+
+bool CpuStatus::zeroFlag() {
+    return mZeroFlag;
+}
+
+bool CpuStatus::signFlag() {
+    return mSignFlag;
+}
+
+bool CpuStatus::decimalFlag() {
+    return mDecimalFlag;
+}
+
+bool CpuStatus::interruptDisableFlag() {
+    return mInterruptDisableFlag;
+}
+
+bool CpuStatus::accumulatorWidthFlag() {
+    return mAccumulatorWidthFlag;
+}
+
+bool CpuStatus::indexWidthFlag() {
+    return mIndexWidthFlag;
+}
+
+bool CpuStatus::carryFlag() {
+    return mCarryFlag;
+}
+
+bool CpuStatus::emulationFlag() {
+    return mEmulationFlag;
+}
+
+void CpuStatus::setBreakFlag() {
+    mBreakFlag = true;
+}
+
+void CpuStatus::clearBreakFlag() {
+    mBreakFlag = false;
+}
+
+bool CpuStatus::breakFlag() {
+    return mBreakFlag;
+}
+
+void CpuStatus::setOverflowFlag() {
+    mOverflowFlag = true;
+}
+
+void CpuStatus::clearOverflowFlag() {
+    mOverflowFlag = false;
+}
+
+bool CpuStatus::overflowFlag() {
+    return mOverflowFlag;
+}
+
+uint8_t CpuStatus::getRegisterValue() {
+    uint8_t value = 0;
+    if (carryFlag())                                    value |= STATUS_CARRY;
+    if (zeroFlag())                                     value |= STATUS_ZERO;
+    if (interruptDisableFlag())                         value |= STATUS_INTERRUPT_DISABLE;
+    if (decimalFlag())                                  value |= STATUS_DECIMAL;
+    if (emulationFlag() && breakFlag())                 value |= STATUS_BREAK;
+    if (!emulationFlag() && indexWidthFlag())           value |= STATUS_INDEX_WIDTH;
+    if (!emulationFlag() && accumulatorWidthFlag())     value |= STATUS_ACCUMULATOR_WIDTH;
+    if (overflowFlag())                                 value |= STATUS_OVERFLOW;
+    if (signFlag())                                     value |= STATUS_SIGN;
+    
+    return value;
+}
+
+void CpuStatus::setRegisterValue(uint8_t value) {
+    if (value & STATUS_CARRY) setCarryFlag();
+    else clearCarryFlag();
+    
+    if (value & STATUS_ZERO) setZeroFlag();
+    else clearZeroFlag();
+    
+    if (value & STATUS_INTERRUPT_DISABLE) setInterruptDisableFlag();
+    else clearInterruptDisableFlag();
+    
+    if (value & STATUS_DECIMAL) setDecimalFlag();
+    else clearDecimalFlag();
+    
+    if (emulationFlag()) {
+        if (value & STATUS_BREAK) setBreakFlag();
+        else clearBreakFlag();
+    } else {
+        if (value & STATUS_INDEX_WIDTH) setIndexWidthFlag();
+        else clearIndexWidthFlag();
+    }
+    
+    if (!emulationFlag() && (value & STATUS_ACCUMULATOR_WIDTH)) setAccumulatorWidthFlag();
+    else clearAccumulatorWidthFlag();
+    
+    if (value & STATUS_OVERFLOW) setOverflowFlag();
+    else clearOverflowFlag();
+    
+    if (value & STATUS_SIGN) setSignFlag();
+    else clearSignFlag();
+}
+
+void CpuStatus::updateZeroFlagFrom8BitValue(uint8_t value) {
+    if (Binary::is8bitValueZero(value)) setZeroFlag();
+    else clearZeroFlag();
+}
+
+void CpuStatus::updateZeroFlagFrom16BitValue(uint16_t value) {
+    if (Binary::is16bitValueZero(value)) setZeroFlag();
+    else clearZeroFlag();
+}
+
+void CpuStatus::updateSignFlagFrom8BitValue(uint8_t value) {
+    if (Binary::is8bitValueNegative(value)) setSignFlag();
+    else clearSignFlag();
+}
+
+void CpuStatus::updateSignFlagFrom16BitValue(uint16_t value) {
+    if (Binary::is16bitValueNegative(value)) setSignFlag();
+    else clearSignFlag();
+}
+
+void CpuStatus::updateSignAndZeroFlagFrom8BitValue(uint8_t value) {
+    updateSignFlagFrom8BitValue(value);
+    updateZeroFlagFrom8BitValue(value);
+}
+
+void CpuStatus::updateSignAndZeroFlagFrom16BitValue(uint16_t value) {
+    updateSignFlagFrom16BitValue(value);
+    updateZeroFlagFrom16BitValue(value);
+}

src/CpuStatus.hpp

@@ -0,0 +1,92 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef CPUSTATUS_H
+#define CPUSTATUS_H
+
+#include <stdint.h>
+
+class CpuStatus {
+    public:
+        CpuStatus();
+    
+        void setZeroFlag();
+        void clearZeroFlag();
+        bool zeroFlag();
+        
+        void setSignFlag();
+        void clearSignFlag();
+        bool signFlag();
+        
+        void setDecimalFlag();
+        void clearDecimalFlag();
+        bool decimalFlag();
+        
+        void setInterruptDisableFlag();
+        void clearInterruptDisableFlag();
+        bool interruptDisableFlag();
+        
+        void setAccumulatorWidthFlag();
+        void clearAccumulatorWidthFlag();
+        bool accumulatorWidthFlag();
+
+        void setIndexWidthFlag();
+        void clearIndexWidthFlag();
+        bool indexWidthFlag();
+        
+        void setCarryFlag();
+        void clearCarryFlag();
+        bool carryFlag();
+        
+        void setBreakFlag();
+        void clearBreakFlag();
+        bool breakFlag();
+        
+        void setOverflowFlag();
+        void clearOverflowFlag();
+        bool overflowFlag();
+        
+        void setEmulationFlag();
+        void clearEmulationFlag();
+        bool emulationFlag();
+        
+        uint8_t getRegisterValue();
+        void setRegisterValue(uint8_t);
+        
+        void updateZeroFlagFrom8BitValue(uint8_t);
+        void updateZeroFlagFrom16BitValue(uint16_t);
+        void updateSignFlagFrom8BitValue(uint8_t);
+        void updateSignFlagFrom16BitValue(uint16_t);
+        void updateSignAndZeroFlagFrom8BitValue(uint8_t);
+        void updateSignAndZeroFlagFrom16BitValue(uint16_t);
+    
+    private:
+        bool mZeroFlag = false;
+        bool mSignFlag = false;
+        bool mDecimalFlag = false;
+        bool mInterruptDisableFlag = false;
+        bool mAccumulatorWidthFlag = false;
+        bool mIndexWidthFlag = false;
+        bool mCarryFlag = false;
+        bool mEmulationFlag = true; // CPU Starts in emulation mode
+        bool mOverflowFlag = false;
+        bool mBreakFlag = false;
+};
+
+#endif // CPUSTATUS_H

src/Interrupt.hpp

@@ -0,0 +1,45 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef INTERRUPT_HPP
+#define INTERRUPT_HPP
+
+#include <stdint.h>
+
+// Interrupt table. Native mode.
+typedef struct {
+    const uint16_t coProcessorEnable;
+    const uint16_t brk;
+    const uint16_t abort;
+    const uint16_t nonMaskableInterrupt;
+    const uint16_t reset;
+    const uint16_t interruptRequest;
+} NativeModeInterrupts;
+
+// Interrupt table. Emulation mode.
+typedef struct {
+    const uint16_t coProcessorEnable;
+    const uint16_t unused;
+    const uint16_t abort;
+    const uint16_t nonMaskableInterrupt;
+    const uint16_t reset;
+    const uint16_t brkIrq;
+} EmulationModeInterrupts;
+
+#endif // INTERRUPT_HPP

src/Stack.cpp

@@ -0,0 +1,60 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "Stack.hpp"
+#include "Log.hpp"
+
+#define LOG_TAG "Stack"
+
+Stack::Stack(SystemBus *systemBus) :
+        mSystemBus(systemBus),
+        mStackAddress(0x00, STACK_POINTER_DEFAULT) {
+    Log::trc(LOG_TAG).str("Initialized at default location ").sp().hex(mStackAddress.getOffset(), 4).show();
+}
+
+Stack::Stack(SystemBus *systemBus, uint16_t stackPointer) :
+        mSystemBus(systemBus),
+        mStackAddress(0x00, stackPointer) {
+    Log::trc(LOG_TAG).str("Initialized at location ").sp().hex(mStackAddress.getOffset(), 4).show();
+}
+
+void Stack::push8Bit(uint8_t value) {
+    mSystemBus->storeByte(mStackAddress, value);
+    mStackAddress.decrementOffsetBy(sizeof(uint8_t));
+}
+
+void Stack::push16Bit(uint16_t value) {
+    auto leastSignificant = (uint8_t)((value) & 0xFF);
+    auto mostSignificant =  (uint8_t)(((value) & 0xFF00) >> 8);
+    push8Bit(mostSignificant);
+    push8Bit(leastSignificant);
+}
+
+uint8_t Stack::pull8Bit() {
+    mStackAddress.incrementOffsetBy(sizeof(uint8_t));
+    return mSystemBus->readByte(mStackAddress);
+}
+
+uint16_t Stack::pull16Bit() {
+    return (uint16_t)(pull8Bit() | (((uint16_t)pull8Bit()) << 8));
+}
+
+uint16_t Stack::getStackPointer() {
+    return mStackAddress.getOffset();
+}

src/Stack.hpp

@@ -0,0 +1,47 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __STACK__
+#define __STACK__
+
+#include <stdint.h>
+#include  "SystemBus.hpp"
+
+#define STACK_POINTER_DEFAULT 0x1FF
+
+class Stack {
+    public:
+
+        Stack(SystemBus *);
+        Stack(SystemBus *, uint16_t);
+        
+        void push8Bit(uint8_t);
+        void push16Bit(uint16_t);
+        
+        uint8_t pull8Bit();
+        uint16_t pull16Bit();
+        
+        uint16_t getStackPointer();
+        
+    private:
+        SystemBus *mSystemBus;
+        Address mStackAddress;
+};
+
+#endif

src/SystemBus.cpp

@@ -0,0 +1,112 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <cmath>
+#include "SystemBus.hpp"
+#include "Log.hpp"
+
+#define LOG_TAG "SystemBus"
+
+SystemBus::SystemBus() {
+    mPpuApuRegs = new uint8_t[PPU_APU_REGS_SIZE];
+    mDspSuperFxRegs = new uint8_t[DSP_SUPERFX_REGS_SIZE];
+    mOldStyleJoypadRegs = new uint8_t[OLD_STYLE_JOYPAD_REGS_SIZE];
+    mDmaPpu2Regs = new uint8_t[DMA_PPU2_REGS_SIZE];
+    // TODO: allocate only if present on cartridge
+    mCartridgeSRam = new uint8_t[CARTRIDGE_SRAM_SIZE];
+
+}
+
+SystemBus::~SystemBus() {
+    delete[] mPpuApuRegs;
+    delete[] mDspSuperFxRegs;
+    delete[] mOldStyleJoypadRegs;
+    delete[] mDmaPpu2Regs;
+    delete[] mCartridgeSRam;
+}
+
+void SystemBus::registerDevice(SystemBusDevice *device) {
+    mDevices.push_back(device);
+}
+
+void SystemBus::storeByte(const Address &address, uint8_t value) {
+    for (SystemBusDevice *device : mDevices) {
+        Address decodedAddress;
+        if (device->decodeAddress(address, decodedAddress)) {
+            device->storeByte(decodedAddress, value);
+            return;
+        }
+    }
+}
+
+void SystemBus::storeTwoBytes(const Address &address, uint16_t value) {
+    for (SystemBusDevice *device : mDevices) {
+        Address decodedAddress;
+        if (device->decodeAddress(address, decodedAddress)) {
+            uint8_t leastSignificantByte = (uint8_t)(value & 0xFF);
+            uint8_t mostSignificantByte = (uint8_t)((value & 0xFF00) >> 8);
+            device->storeByte(decodedAddress, leastSignificantByte);
+            decodedAddress.incrementOffsetBy(1);
+            device->storeByte(decodedAddress, mostSignificantByte);
+            return;
+        }
+    }
+}
+
+uint8_t SystemBus::readByte(const Address &address) {
+    for (SystemBusDevice *device : mDevices) {
+        Address decodedAddress;
+        if (device->decodeAddress(address, decodedAddress)) {
+            return device->readByte(decodedAddress);
+        }
+    }
+    return 0;
+}
+
+uint16_t SystemBus::readTwoBytes(const Address &address) {
+    for (SystemBusDevice *device : mDevices) {
+        Address decodedAddress;
+        if (device->decodeAddress(address, decodedAddress)) {
+            uint8_t leastSignificantByte = device->readByte(decodedAddress);
+            decodedAddress.incrementOffsetBy(sizeof(uint8_t));
+            uint8_t mostSignificantByte = device->readByte(decodedAddress);
+            uint16_t value = ((uint16_t)mostSignificantByte << 8) | leastSignificantByte;
+            return value;
+        }
+    }
+    return 0;
+}
+
+Address SystemBus::readAddressAt(const Address &address) {
+    Address decodedAddress { 0x00, 0x0000 };
+    for (SystemBusDevice *device : mDevices) {
+        if (device->decodeAddress(address, decodedAddress)) {
+            // Read offset
+            uint8_t leastSignificantByte = device->readByte(decodedAddress);
+            decodedAddress.incrementOffsetBy(sizeof(uint8_t));
+            uint8_t mostSignificantByte = device->readByte(decodedAddress);
+            uint16_t offset = ((uint16_t)mostSignificantByte << 8) | leastSignificantByte;
+            // Read bank
+            decodedAddress.incrementOffsetBy(sizeof(uint8_t));
+            uint8_t bank = device->readByte(decodedAddress);
+            return Address(bank, offset);
+        }
+    }
+    return decodedAddress;
+}

src/SystemBus.hpp

@@ -0,0 +1,57 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef __SYSTEMBUS__
+#define __SYSTEMBUS__
+
+#include <stdint.h>
+#include <vector>
+
+#include "SystemBusDevice.hpp"
+
+#define PPU_APU_REGS_SIZE                0x200
+#define DSP_SUPERFX_REGS_SIZE           0x1000
+#define OLD_STYLE_JOYPAD_REGS_SIZE       0x100
+#define DMA_PPU2_REGS_SIZE               0x300
+#define CARTRIDGE_SRAM_SIZE             0x2000
+
+class SystemBus {
+    public:
+        SystemBus();
+        ~SystemBus();
+
+        void registerDevice(SystemBusDevice *);
+        void storeByte(const Address&, uint8_t);
+        void storeTwoBytes(const Address&, uint16_t);
+        uint8_t readByte(const Address&);
+        uint16_t readTwoBytes(const Address&);
+        Address readAddressAt(const Address&);
+
+    private:
+
+        std::vector<SystemBusDevice *> mDevices;
+
+        uint8_t *mPpuApuRegs;
+        uint8_t *mDspSuperFxRegs;
+        uint8_t *mOldStyleJoypadRegs;
+        uint8_t *mDmaPpu2Regs;
+        uint8_t *mCartridgeSRam;
+};
+
+#endif

src/SystemBusDevice.cpp

@@ -0,0 +1,72 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <cmath>
+
+#include "SystemBusDevice.hpp"
+
+Address Address::sumOffsetToAddressNoWrapAround(const Address &address, uint16_t offset) {
+    uint8_t newBank = address.getBank();
+    uint16_t newOffset;
+    auto offsetSum = (uint32_t)(address.getOffset() + offset);
+    if (offsetSum >= BANK_SIZE_BYTES) {
+        ++newBank;
+        newOffset = static_cast<uint16_t>(offsetSum - BANK_SIZE_BYTES);
+    } else {
+        newOffset = address.getOffset() + offset;
+    }
+    return {newBank, newOffset};
+}
+
+Address Address::sumOffsetToAddressWrapAround(const Address &address, uint16_t offset) {
+    Address newAddress(address.getBank(), address.getOffset() + offset);
+    return newAddress;
+}
+
+Address Address::sumOffsetToAddress(const Address &address, uint16_t offset) {
+    // This wraps around by default
+    // TODO figure out when to wrap around and when not to
+    return sumOffsetToAddressWrapAround(address, offset);
+}
+
+bool Address::offsetsAreOnDifferentPages(uint16_t offsetFirst, uint16_t offsetSecond) {
+    int pageOfFirst = static_cast<int>(std::floor(offsetFirst / PAGE_SIZE_BYTES));
+    int pageOfSecond = static_cast<int>(std::floor(offsetSecond / PAGE_SIZE_BYTES));
+    return pageOfFirst != pageOfSecond;
+}
+
+Address Address::newWithOffset(uint16_t offset) {
+    return sumOffsetToAddress((const Address &)*this, offset);
+}
+
+Address Address::newWithOffsetNoWrapAround(uint16_t offset) {
+    return sumOffsetToAddressNoWrapAround((const Address &)*this, offset);
+}
+
+Address Address::newWithOffsetWrapAround(uint16_t offset) {
+    return sumOffsetToAddressWrapAround((const Address &)*this, offset);
+}
+
+void Address::decrementOffsetBy(uint16_t offset) {
+    mOffset -= offset;
+}
+
+void Address::incrementOffsetBy(uint16_t offset) {
+    mOffset += offset;
+}

src/SystemBusDevice.hpp

@@ -0,0 +1,89 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef SYSBUS_DEVICE_H
+#define SYSBUS_DEVICE_H
+
+#include <stdint.h>
+
+#define BANK_SIZE_BYTES                0x10000
+#define HALF_BANK_SIZE_BYTES            0x8000
+#define PAGE_SIZE_BYTES                    256
+
+class Address {
+    private:
+        uint8_t mBank;
+        uint16_t mOffset;
+
+    public:
+        static bool offsetsAreOnDifferentPages(uint16_t, uint16_t);
+        static Address sumOffsetToAddress(const Address &, uint16_t);
+        static Address sumOffsetToAddressNoWrapAround(const Address &, uint16_t);
+        static Address sumOffsetToAddressWrapAround(const Address &, uint16_t);
+
+        Address() = default;
+        Address(uint8_t bank, uint16_t offset) : mBank(bank), mOffset(offset) {};
+
+        Address newWithOffset(uint16_t);
+        Address newWithOffsetNoWrapAround(uint16_t);
+        Address newWithOffsetWrapAround(uint16_t);
+
+        void incrementOffsetBy(uint16_t);
+        void decrementOffsetBy(uint16_t);
+
+        void getBankAndOffset(uint8_t *bank, uint16_t *offset) {
+            *bank = mBank;
+            *offset = mOffset;
+        }
+
+        uint8_t getBank() const {
+            return mBank;
+        }
+
+        uint16_t getOffset() const {
+            return mOffset;
+        }
+};
+
+/**
+ Every device (PPU, APU, ...) implements this interface.
+ */
+class SystemBusDevice {
+    public:
+        virtual ~SystemBusDevice() {};
+
+        /**
+          Stores one byte to the real address represented by the specified virtual address.
+          That is: maps the virtual address to the real one and stores one byte in it.
+         */
+        virtual void storeByte(const Address &, uint8_t) = 0;
+
+        /**
+          Reads one byte from the real address represented by the specified virtual address.
+          That is: maps the virtual address to the real one and reads from it.
+         */
+        virtual uint8_t readByte(const Address &) = 0;
+
+        /**
+          Returns true if the address was decoded successfully by this device.
+         */
+        virtual bool decodeAddress(const Address &, Address &) = 0;
+};
+
+#endif // SYSBUS_DEVICE_H

src/opcodes/OpCode.hpp

@@ -0,0 +1,67 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef OPCODE_HPP
+#define OPCODE_HPP
+
+#include <stdint.h>
+
+#include "../Addressing.hpp"
+
+class Cpu65816;
+
+class OpCode {
+    private:
+        uint8_t mCode;
+        const char * const mName;
+        AddressingMode mAddressingMode;
+        void (Cpu65816::*mExecutor)(OpCode &);
+
+    public:
+        OpCode(uint8_t code, const char * const name, const AddressingMode &addressingMode) :
+            mCode(code), mName(name), mAddressingMode(addressingMode), mExecutor(0) {
+        }
+
+        OpCode(uint8_t code, const char * const name, const AddressingMode &addressingMode, void (Cpu65816::*executor)(OpCode &)) :
+            mCode(code), mName(name), mAddressingMode(addressingMode), mExecutor(executor) {
+        }
+
+        const uint8_t getCode() {
+            return mCode;
+        }
+
+        const char *getName() {
+            return mName;
+        }
+
+        const AddressingMode getAddressingMode() {
+            return mAddressingMode;
+        }
+
+        const bool execute(Cpu65816 &cpu) {
+            if (mExecutor != 0) {
+                OpCode opCode = *this;
+                (cpu.*mExecutor)(opCode);
+                return true;
+            }
+            return false;
+        }
+};
+
+#endif // OPCODE_HPP

src/opcodes/OpCodeTable.cpp

@@ -0,0 +1,285 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef OPCODE_TABLE_HPP
+#define OPCODE_TABLE_HPP
+
+#include "../Cpu65816.hpp"
+
+OpCode Cpu65816::OP_CODE_TABLE[] = {
+    OpCode(0x00, "BRK", AddressingMode::Interrupt,                            &Cpu65816::executeInterrupt),
+    OpCode(0x01, "ORA", AddressingMode::DirectPageIndexedIndirectWithX,       &Cpu65816::executeORA),
+    OpCode(0x02, "COP", AddressingMode::Interrupt,                            &Cpu65816::executeInterrupt),
+    OpCode(0x03, "ORA", AddressingMode::StackRelative,                        &Cpu65816::executeORA),
+    OpCode(0x04, "TSB", AddressingMode::DirectPage,                           &Cpu65816::executeTSBTRB),
+    OpCode(0x05, "ORA", AddressingMode::DirectPage,                           &Cpu65816::executeORA),
+    OpCode(0x06, "ASL", AddressingMode::DirectPage,                           &Cpu65816::executeASL),
+    OpCode(0x07, "ORA", AddressingMode::DirectPageIndirectLong,               &Cpu65816::executeORA),
+    OpCode(0x08, "PHP", AddressingMode::StackImplied,                         &Cpu65816::executeStack),
+    OpCode(0x09, "ORA", AddressingMode::Immediate,                            &Cpu65816::executeORA),
+    OpCode(0x0A, "ASL", AddressingMode::Accumulator,                          &Cpu65816::executeASL),
+    OpCode(0x0B, "PHD", AddressingMode::StackImplied,                         &Cpu65816::executeStack),
+    OpCode(0x0C, "TSB", AddressingMode::Absolute,                             &Cpu65816::executeTSBTRB),
+    OpCode(0x0D, "ORA", AddressingMode::Absolute,                             &Cpu65816::executeORA),
+    OpCode(0x0E, "ASL", AddressingMode::Absolute,                             &Cpu65816::executeASL),
+    OpCode(0x0F, "ORA", AddressingMode::AbsoluteLong,                         &Cpu65816::executeORA),
+    OpCode(0x10, "BPL", AddressingMode::ProgramCounterRelative,               &Cpu65816::executeBranch),
+    OpCode(0x11, "ORA", AddressingMode::DirectPageIndirectIndexedWithY,       &Cpu65816::executeORA),
+    OpCode(0x12, "ORA", AddressingMode::DirectPageIndirect,                   &Cpu65816::executeORA),
+    OpCode(0x13, "ORA", AddressingMode::StackRelativeIndirectIndexedWithY,    &Cpu65816::executeORA),
+    OpCode(0x14, "TRB", AddressingMode::DirectPage,                           &Cpu65816::executeTSBTRB),
+    OpCode(0x15, "ORA", AddressingMode::DirectPageIndexedWithX,               &Cpu65816::executeORA),
+    OpCode(0x16, "ASL", AddressingMode::DirectPageIndexedWithX,               &Cpu65816::executeASL),
+    OpCode(0x17, "ORA", AddressingMode::DirectPageIndirectLongIndexedWithY,   &Cpu65816::executeORA),
+    OpCode(0x18, "CLC", AddressingMode::Implied,                              &Cpu65816::executeStatusReg),
+    OpCode(0x19, "ORA", AddressingMode::AbsoluteIndexedWithY,                 &Cpu65816::executeORA),
+    OpCode(0x1A, "INC", AddressingMode::Accumulator,                          &Cpu65816::executeINCDEC),
+    OpCode(0x1B, "TCS", AddressingMode::Implied,                              &Cpu65816::executeTransfer),
+    OpCode(0x1C, "TRB", AddressingMode::Absolute,                             &Cpu65816::executeTSBTRB),
+    OpCode(0x1D, "ORA", AddressingMode::AbsoluteIndexedWithX,                 &Cpu65816::executeORA),
+    OpCode(0x1E, "ASL", AddressingMode::AbsoluteIndexedWithX,                 &Cpu65816::executeASL),
+    OpCode(0x1F, "ORA", AddressingMode::AbsoluteLongIndexedWithX,             &Cpu65816::executeORA),
+    OpCode(0x20, "JSR", AddressingMode::Absolute,                             &Cpu65816::executeJumpReturn),
+    OpCode(0x21, "AND", AddressingMode::DirectPageIndexedIndirectWithX,       &Cpu65816::executeAND),
+    OpCode(0x22, "JSR", AddressingMode::AbsoluteLong,                         &Cpu65816::executeJumpReturn),
+    OpCode(0x23, "AND", AddressingMode::StackRelative,                        &Cpu65816::executeAND),
+    OpCode(0x24, "BIT", AddressingMode::DirectPage,                           &Cpu65816::executeBIT),
+    OpCode(0x25, "AND", AddressingMode::DirectPage,                           &Cpu65816::executeAND),
+    OpCode(0x26, "ROL", AddressingMode::DirectPage,                           &Cpu65816::executeROL),
+    OpCode(0x27, "AND", AddressingMode::DirectPageIndirectLong,               &Cpu65816::executeAND),
+    OpCode(0x28, "PLP", AddressingMode::StackImplied,                         &Cpu65816::executeStack),
+    OpCode(0x29, "AND", AddressingMode::Immediate,                            &Cpu65816::executeAND),
+    OpCode(0x2A, "ROL", AddressingMode::Accumulator,                          &Cpu65816::executeROL),
+    OpCode(0x2B, "PLD", AddressingMode::StackImplied,                         &Cpu65816::executeStack),
+    OpCode(0x2C, "BIT", AddressingMode::Absolute,                             &Cpu65816::executeBIT),
+    OpCode(0x2D, "AND", AddressingMode::Absolute,                             &Cpu65816::executeAND),
+    OpCode(0x2E, "ROL", AddressingMode::Absolute,                             &Cpu65816::executeROL),
+    OpCode(0x2F, "AND", AddressingMode::AbsoluteLong,                         &Cpu65816::executeAND),
+    OpCode(0x30, "BMI", AddressingMode::ProgramCounterRelative,               &Cpu65816::executeBranch),
+    OpCode(0x31, "AND", AddressingMode::DirectPageIndirectIndexedWithY,       &Cpu65816::executeAND),
+    OpCode(0x32, "AND", AddressingMode::DirectPageIndirect,                   &Cpu65816::executeAND),
+    OpCode(0x33, "AND", AddressingMode::StackRelativeIndirectIndexedWithY,    &Cpu65816::executeAND),
+    OpCode(0x34, "BIT", AddressingMode::DirectPageIndexedWithX,               &Cpu65816::executeBIT),
+    OpCode(0x35, "AND", AddressingMode::DirectPageIndexedWithX,               &Cpu65816::executeAND),
+    OpCode(0x36, "ROL", AddressingMode::DirectPageIndexedWithX,               &Cpu65816::executeROL),
+    OpCode(0x37, "AND", AddressingMode::DirectPageIndirectLongIndexedWithY,   &Cpu65816::executeAND),
+    OpCode(0x38, "SEC", AddressingMode::Implied,                              &Cpu65816::executeStatusReg),
+    OpCode(0x39, "AND", AddressingMode::AbsoluteIndexedWithY,                 &Cpu65816::executeAND),
+    OpCode(0x3A, "DEC", AddressingMode::Accumulator,                          &Cpu65816::executeINCDEC),
+    OpCode(0x3B, "TSC", AddressingMode::Implied,                              &Cpu65816::executeTransfer),
+    OpCode(0x3C, "BIT", AddressingMode::AbsoluteIndexedWithX,                 &Cpu65816::executeBIT),
+    OpCode(0x3D, "AND", AddressingMode::AbsoluteIndexedWithX,                 &Cpu65816::executeAND),
+    OpCode(0x3E, "ROL", AddressingMode::AbsoluteIndexedWithX,                 &Cpu65816::executeROL),
+    OpCode(0x3F, "AND", AddressingMode::AbsoluteLongIndexedWithX,             &Cpu65816::executeAND),
+    OpCode(0x40, "RTI", AddressingMode::StackImplied,                         &Cpu65816::executeInterrupt),
+    OpCode(0x41, "EOR", AddressingMode::DirectPageIndexedIndirectWithX,       &Cpu65816::executeEOR),
+    OpCode(0x42, "WDM", AddressingMode::Implied,                              &Cpu65816::executeMisc),
+    OpCode(0x43, "EOR", AddressingMode::StackRelative,                        &Cpu65816::executeEOR),
+    OpCode(0x44, "MVP", AddressingMode::BlockMove,                            &Cpu65816::executeMisc),
+    OpCode(0x45, "EOR", AddressingMode::DirectPage,                           &Cpu65816::executeEOR),
+    OpCode(0x46, "LSR", AddressingMode::DirectPage,                           &Cpu65816::executeLSR),
+    OpCode(0x47, "EOR", AddressingMode::DirectPageIndirectLong,               &Cpu65816::executeEOR),
+    OpCode(0x48, "PHA", AddressingMode::StackImplied,                         &Cpu65816::executeStack),
+    OpCode(0x49, "EOR", AddressingMode::Immediate,                            &Cpu65816::executeEOR),
+    OpCode(0x4A, "LSR", AddressingMode::Accumulator,                          &Cpu65816::executeLSR),
+    OpCode(0x4B, "PHK", AddressingMode::StackImplied,                         &Cpu65816::executeStack),
+    OpCode(0x4C, "JMP", AddressingMode::Absolute,                             &Cpu65816::executeJumpReturn),
+    OpCode(0x4D, "EOR", AddressingMode::Absolute,                             &Cpu65816::executeEOR),
+    OpCode(0x4E, "LSR", AddressingMode::Absolute,                             &Cpu65816::executeLSR),
+    OpCode(0x4F, "EOR", AddressingMode::AbsoluteLong,                         &Cpu65816::executeEOR),
+    OpCode(0x50, "BVC", AddressingMode::ProgramCounterRelative,               &Cpu65816::executeBranch),
+    OpCode(0x51, "EOR", AddressingMode::DirectPageIndirectIndexedWithY,       &Cpu65816::executeEOR),
+    OpCode(0x52, "EOR", AddressingMode::DirectPageIndirect,                   &Cpu65816::executeEOR),
+    OpCode(0x53, "EOR", AddressingMode::StackRelativeIndirectIndexedWithY,    &Cpu65816::executeEOR),
+    OpCode(0x54, "MVN", AddressingMode::BlockMove,                            &Cpu65816::executeMisc),
+    OpCode(0x55, "EOR", AddressingMode::DirectPageIndexedWithX,               &Cpu65816::executeEOR),
+    OpCode(0x56, "LSR", AddressingMode::DirectPageIndexedWithX,               &Cpu65816::executeLSR),
+    OpCode(0x57, "EOR", AddressingMode::DirectPageIndirectLongIndexedWithY,   &Cpu65816::executeEOR),
+    OpCode(0x58, "CLI", AddressingMode::Implied,                              &Cpu65816::executeStatusReg),
+    OpCode(0x59, "EOR", AddressingMode::AbsoluteIndexedWithY,                 &Cpu65816::executeEOR),
+    OpCode(0x5A, "PHY", AddressingMode::StackImplied,                         &Cpu65816::executeStack),
+    OpCode(0x5B, "TCD", AddressingMode::Implied,                              &Cpu65816::executeTransfer),
+    OpCode(0x5C, "JMP", AddressingMode::AbsoluteLong,                         &Cpu65816::executeJumpReturn),
+    OpCode(0x5D, "EOR", AddressingMode::AbsoluteIndexedWithX,                 &Cpu65816::executeEOR),
+    OpCode(0x5E, "LSR", AddressingMode::AbsoluteIndexedWithX,                 &Cpu65816::executeLSR),
+    OpCode(0x5F, "EOR", AddressingMode::AbsoluteLongIndexedWithX,             &Cpu65816::executeEOR),
+    OpCode(0x60, "RTS", AddressingMode::StackImplied,                         &Cpu65816::executeJumpReturn),
+    OpCode(0x61, "ADC", AddressingMode::DirectPageIndexedIndirectWithX,       &Cpu65816::executeADC),
+    OpCode(0x62, "PER", AddressingMode::StackProgramCounterRelativeLong,      &Cpu65816::executeStack),
+    OpCode(0x63, "ADC", AddressingMode::StackRelative,                        &Cpu65816::executeADC),
+    OpCode(0x64, "STZ", AddressingMode::DirectPage,                           &Cpu65816::executeSTZ),
+    OpCode(0x65, "ADC", AddressingMode::DirectPage,                           &Cpu65816::executeADC),
+    OpCode(0x66, "ROR", AddressingMode::DirectPage,                           &Cpu65816::executeROR),
+    OpCode(0x67, "ADC", AddressingMode::DirectPageIndirectLong,               &Cpu65816::executeADC),
+    OpCode(0x68, "PLA", AddressingMode::StackImplied,                         &Cpu65816::executeStack),
+    OpCode(0x69, "ADC", AddressingMode::Immediate,                            &Cpu65816::executeADC),
+    OpCode(0x6A, "ROR", AddressingMode::Accumulator,                          &Cpu65816::executeROR),
+    OpCode(0x6B, "RTL", AddressingMode::StackImplied,                         &Cpu65816::executeJumpReturn),
+    OpCode(0x6C, "JMP", AddressingMode::AbsoluteIndirect,                     &Cpu65816::executeJumpReturn),
+    OpCode(0x6D, "ADC", AddressingMode::Absolute,                             &Cpu65816::executeADC),
+    OpCode(0x6E, "ROR", AddressingMode::Absolute,                             &Cpu65816::executeROR),
+    OpCode(0x6F, "ADC", AddressingMode::AbsoluteLong,                         &Cpu65816::executeADC),
+    OpCode(0x70, "BVS", AddressingMode::ProgramCounterRelative,               &Cpu65816::executeBranch),
+    OpCode(0x71, "ADC", AddressingMode::DirectPageIndirectIndexedWithY,       &Cpu65816::executeADC),
+    OpCode(0x72, "ADC", AddressingMode::DirectPageIndirect,                   &Cpu65816::executeADC),
+    OpCode(0x73, "ADC", AddressingMode::StackRelativeIndirectIndexedWithY,    &Cpu65816::executeADC),
+    OpCode(0x74, "STZ", AddressingMode::DirectPageIndexedWithX,               &Cpu65816::executeSTZ),
+    OpCode(0x75, "ADC", AddressingMode::DirectPageIndexedWithX,               &Cpu65816::executeADC),
+    OpCode(0x76, "ROR", AddressingMode::DirectPageIndexedWithX,               &Cpu65816::executeROR),
+    OpCode(0x77, "ADC", AddressingMode::DirectPageIndirectLongIndexedWithY,   &Cpu65816::executeADC),
+    OpCode(0x78, "SEI", AddressingMode::Implied,                              &Cpu65816::executeStatusReg),
+    OpCode(0x79, "ADC", AddressingMode::AbsoluteIndexedWithY,                 &Cpu65816::executeADC),
+    OpCode(0x7A, "PLY", AddressingMode::StackImplied,                         &Cpu65816::executeStack),
+    OpCode(0x7B, "TDC", AddressingMode::Implied,                              &Cpu65816::executeTransfer),
+    OpCode(0x7C, "JMP", AddressingMode::AbsoluteIndexedIndirectWithX,         &Cpu65816::executeJumpReturn),
+    OpCode(0x7D, "ADC", AddressingMode::AbsoluteIndexedWithX,                 &Cpu65816::executeADC),
+    OpCode(0x7E, "ROR", AddressingMode::AbsoluteIndexedWithX,                 &Cpu65816::executeROR),
+    OpCode(0x7F, "ADC", AddressingMode::AbsoluteLongIndexedWithX,             &Cpu65816::executeADC),
+    OpCode(0x80, "BRA", AddressingMode::ProgramCounterRelative,               &Cpu65816::executeBranch),
+    OpCode(0x81, "STA", AddressingMode::DirectPageIndexedIndirectWithX,       &Cpu65816::executeSTA),
+    OpCode(0x82, "BRL", AddressingMode::ProgramCounterRelativeLong,           &Cpu65816::executeBranch),
+    OpCode(0x83, "STA", AddressingMode::StackRelative,                        &Cpu65816::executeSTA),
+    OpCode(0x84, "STY", AddressingMode::DirectPage,                           &Cpu65816::executeSTY),
+    OpCode(0x85, "STA", AddressingMode::DirectPage,                           &Cpu65816::executeSTA),
+    OpCode(0x86, "STX", AddressingMode::DirectPage,                           &Cpu65816::executeSTX),
+    OpCode(0x87, "STA", AddressingMode::DirectPageIndirectLong,               &Cpu65816::executeSTA),
+    OpCode(0x88, "DEY", AddressingMode::Implied,                              &Cpu65816::executeINCDEC),
+    OpCode(0x89, "BIT", AddressingMode::Immediate,                            &Cpu65816::executeBIT),
+    OpCode(0x8A, "TXA", AddressingMode::Implied,                              &Cpu65816::executeTransfer),
+    OpCode(0x8B, "PHB", AddressingMode::StackImplied,                         &Cpu65816::executeStack),
+    OpCode(0x8C, "STY", AddressingMode::Absolute,                             &Cpu65816::executeSTY),
+    OpCode(0x8D, "STA", AddressingMode::Absolute,                             &Cpu65816::executeSTA),
+    OpCode(0x8E, "STX", AddressingMode::Absolute,                             &Cpu65816::executeSTX),
+    OpCode(0x8F, "STA", AddressingMode::AbsoluteLong,                         &Cpu65816::executeSTA),
+    OpCode(0x90, "BCC", AddressingMode::ProgramCounterRelative,               &Cpu65816::executeBranch),
+    OpCode(0x91, "STA", AddressingMode::DirectPageIndirectIndexedWithY,       &Cpu65816::executeSTA),
+    OpCode(0x92, "STA", AddressingMode::DirectPageIndirect,                   &Cpu65816::executeSTA),
+    OpCode(0x93, "STA", AddressingMode::StackRelativeIndirectIndexedWithY,    &Cpu65816::executeSTA),
+    OpCode(0x94, "STY", AddressingMode::DirectPageIndexedWithX,               &Cpu65816::executeSTY),
+    OpCode(0x95, "STA", AddressingMode::DirectPageIndexedWithX,               &Cpu65816::executeSTA),
+    OpCode(0x96, "STX", AddressingMode::DirectPageIndexedWithY,               &Cpu65816::executeSTX),
+    OpCode(0x97, "STA", AddressingMode::DirectPageIndirectLongIndexedWithY,   &Cpu65816::executeSTA),
+    OpCode(0x98, "TYA", AddressingMode::Implied,                              &Cpu65816::executeTransfer),
+    OpCode(0x99, "STA", AddressingMode::AbsoluteIndexedWithY,                 &Cpu65816::executeSTA),
+    OpCode(0x9A, "TXS", AddressingMode::Implied,                              &Cpu65816::executeTransfer),
+    OpCode(0x9B, "TXY", AddressingMode::Implied,                              &Cpu65816::executeTransfer),
+    OpCode(0x9C, "STZ", AddressingMode::Absolute,                             &Cpu65816::executeSTZ),
+    OpCode(0x9D, "STA", AddressingMode::AbsoluteIndexedWithX,                 &Cpu65816::executeSTA),
+    OpCode(0x9E, "STZ", AddressingMode::AbsoluteIndexedWithX,                 &Cpu65816::executeSTZ),
+    OpCode(0x9F, "STA", AddressingMode::AbsoluteLongIndexedWithX,             &Cpu65816::executeSTA),
+    OpCode(0xA0, "LDY", AddressingMode::Immediate,                            &Cpu65816::executeLDY),
+    OpCode(0xA1, "LDA", AddressingMode::DirectPageIndexedIndirectWithX,       &Cpu65816::executeLDA),
+    OpCode(0xA2, "LDX", AddressingMode::Immediate,                            &Cpu65816::executeLDX),
+    OpCode(0xA3, "LDA", AddressingMode::StackRelative,                        &Cpu65816::executeLDA),
+    OpCode(0xA4, "LDY", AddressingMode::DirectPage,                           &Cpu65816::executeLDY),
+    OpCode(0xA5, "LDA", AddressingMode::DirectPage,                           &Cpu65816::executeLDA),
+    OpCode(0xA6, "LDX", AddressingMode::DirectPage,                           &Cpu65816::executeLDX),
+    OpCode(0xA7, "LDA", AddressingMode::DirectPageIndirectLong,               &Cpu65816::executeLDA),
+    OpCode(0xA8, "TAY", AddressingMode::Implied,                              &Cpu65816::executeTransfer),
+    OpCode(0xA9, "LDA", AddressingMode::Immediate,                            &Cpu65816::executeLDA),
+    OpCode(0xAA, "TAX", AddressingMode::Implied,                              &Cpu65816::executeTransfer),
+    OpCode(0xAB, "PLB", AddressingMode::StackImplied,                         &Cpu65816::executeStack),
+    OpCode(0xAC, "LDY", AddressingMode::Absolute,                             &Cpu65816::executeLDY),
+    OpCode(0xAD, "LDA", AddressingMode::Absolute,                             &Cpu65816::executeLDA),
+    OpCode(0xAE, "LDX", AddressingMode::Absolute,                             &Cpu65816::executeLDX),
+    OpCode(0xAF, "LDA", AddressingMode::AbsoluteLong,                         &Cpu65816::executeLDA),
+    OpCode(0xB0, "BCS", AddressingMode::ProgramCounterRelative,               &Cpu65816::executeBranch),
+    OpCode(0xB1, "LDA", AddressingMode::DirectPageIndirectIndexedWithY,       &Cpu65816::executeLDA),
+    OpCode(0xB2, "LDA", AddressingMode::DirectPageIndirect,                   &Cpu65816::executeLDA),
+    OpCode(0xB3, "LDA", AddressingMode::StackRelativeIndirectIndexedWithY,    &Cpu65816::executeLDA),
+    OpCode(0xB4, "LDY", AddressingMode::DirectPageIndexedWithX,               &Cpu65816::executeLDY),
+    OpCode(0xB5, "LDA", AddressingMode::DirectPageIndexedWithX,               &Cpu65816::executeLDA),
+    OpCode(0xB6, "LDX", AddressingMode::DirectPageIndexedWithY,               &Cpu65816::executeLDX),
+    OpCode(0xB7, "LDA", AddressingMode::DirectPageIndirectLongIndexedWithY,   &Cpu65816::executeLDA),
+    OpCode(0xB8, "CLV", AddressingMode::Implied,                              &Cpu65816::executeStatusReg),
+    OpCode(0xB9, "LDA", AddressingMode::AbsoluteIndexedWithY,                 &Cpu65816::executeLDA),
+    OpCode(0xBA, "TSX", AddressingMode::Implied,                              &Cpu65816::executeTransfer),
+    OpCode(0xBB, "TYX", AddressingMode::Implied,                              &Cpu65816::executeTransfer),
+    OpCode(0xBC, "LDY", AddressingMode::AbsoluteIndexedWithX,                 &Cpu65816::executeLDY),
+    OpCode(0xBD, "LDA", AddressingMode::AbsoluteIndexedWithX,                 &Cpu65816::executeLDA),
+    OpCode(0xBE, "LDX", AddressingMode::AbsoluteIndexedWithY,                 &Cpu65816::executeLDX),
+    OpCode(0xBF, "LDA", AddressingMode::AbsoluteLongIndexedWithX,             &Cpu65816::executeLDA),
+    OpCode(0xC0, "CPY", AddressingMode::Immediate,                            &Cpu65816::executeCPXCPY),
+    OpCode(0xC1, "CMP", AddressingMode::DirectPageIndexedIndirectWithX,       &Cpu65816::executeCMP),
+    OpCode(0xC2, "REP", AddressingMode::Immediate,                            &Cpu65816::executeStatusReg),
+    OpCode(0xC3, "CMP", AddressingMode::StackRelative,                        &Cpu65816::executeCMP),
+    OpCode(0xC4, "CPY", AddressingMode::DirectPage,                           &Cpu65816::executeCPXCPY),
+    OpCode(0xC5, "CMP", AddressingMode::DirectPage,                           &Cpu65816::executeCMP),
+    OpCode(0xC6, "DEC", AddressingMode::DirectPage,                           &Cpu65816::executeINCDEC),
+    OpCode(0xC7, "CMP", AddressingMode::DirectPageIndirectLong,               &Cpu65816::executeCMP),
+    OpCode(0xC8, "INY", AddressingMode::Implied,                              &Cpu65816::executeINCDEC),
+    OpCode(0xC9, "CMP", AddressingMode::Immediate,                            &Cpu65816::executeCMP),
+    OpCode(0xCA, "DEX", AddressingMode::Implied,                              &Cpu65816::executeINCDEC),
+    OpCode(0xCB, "WAI", AddressingMode::Implied),
+    OpCode(0xCC, "CPY", AddressingMode::Absolute,                             &Cpu65816::executeCPXCPY),
+    OpCode(0xCD, "CMP", AddressingMode::Absolute,                             &Cpu65816::executeCMP),
+    OpCode(0xCE, "DEC", AddressingMode::Absolute,                             &Cpu65816::executeINCDEC),
+    OpCode(0xCF, "CMP", AddressingMode::AbsoluteLong,                         &Cpu65816::executeCMP),
+    OpCode(0xD0, "BNE", AddressingMode::ProgramCounterRelative,               &Cpu65816::executeBranch),
+    OpCode(0xD1, "CMP", AddressingMode::DirectPageIndirectIndexedWithY,       &Cpu65816::executeCMP),
+    OpCode(0xD2, "CMP", AddressingMode::DirectPageIndirect,                   &Cpu65816::executeCMP),
+    OpCode(0xD3, "CMP", AddressingMode::StackRelativeIndirectIndexedWithY,    &Cpu65816::executeCMP),
+    OpCode(0xD4, "PEI", AddressingMode::StackDirectPageIndirect,              &Cpu65816::executeStack),
+    OpCode(0xD5, "CMP", AddressingMode::DirectPageIndexedWithX,               &Cpu65816::executeCMP),
+    OpCode(0xD6, "DEC", AddressingMode::DirectPageIndexedWithX,               &Cpu65816::executeINCDEC),
+    OpCode(0xD7, "CMP", AddressingMode::DirectPageIndirectLongIndexedWithY,   &Cpu65816::executeCMP),
+    OpCode(0xD8, "CLD", AddressingMode::Implied,                              &Cpu65816::executeStatusReg),
+    OpCode(0xD9, "CMP", AddressingMode::AbsoluteIndexedWithY,                 &Cpu65816::executeCMP),
+    OpCode(0xDA, "PHX", AddressingMode::StackImplied,                         &Cpu65816::executeStack),
+    OpCode(0xDB, "STP", AddressingMode::Implied,                              &Cpu65816::executeMisc),
+    OpCode(0xDC, "JMP", AddressingMode::AbsoluteIndirectLong,                 &Cpu65816::executeJumpReturn),
+    OpCode(0xDD, "CMP", AddressingMode::AbsoluteIndexedWithX,                 &Cpu65816::executeCMP),
+    OpCode(0xDE, "DEC", AddressingMode::AbsoluteIndexedWithX,                 &Cpu65816::executeINCDEC),
+    OpCode(0xDF, "CMP", AddressingMode::AbsoluteLongIndexedWithX,             &Cpu65816::executeCMP),
+    OpCode(0xE0, "CPX", AddressingMode::Immediate,                            &Cpu65816::executeCPXCPY),
+    OpCode(0xE1, "SBC", AddressingMode::DirectPageIndexedIndirectWithX,       &Cpu65816::executeSBC),
+    OpCode(0xE2, "SEP", AddressingMode::Immediate,                            &Cpu65816::executeStatusReg),
+    OpCode(0xE3, "SBC", AddressingMode::StackRelative,                        &Cpu65816::executeSBC),
+    OpCode(0xE4, "CPX", AddressingMode::DirectPage,                           &Cpu65816::executeCPXCPY),
+    OpCode(0xE5, "SBC", AddressingMode::DirectPage,                           &Cpu65816::executeSBC),
+    OpCode(0xE6, "INC", AddressingMode::DirectPage,                           &Cpu65816::executeINCDEC),
+    OpCode(0xE7, "SBC", AddressingMode::DirectPageIndirectLong,               &Cpu65816::executeSBC),
+    OpCode(0xE8, "INX", AddressingMode::Implied,                              &Cpu65816::executeINCDEC),
+    OpCode(0xE9, "SBC", AddressingMode::Immediate,                            &Cpu65816::executeSBC),
+    OpCode(0xEA, "NOP", AddressingMode::Implied,                              &Cpu65816::executeMisc),
+    OpCode(0xEB, "XBA", AddressingMode::Implied,                              &Cpu65816::executeMisc),
+    OpCode(0xEC, "CPX", AddressingMode::Absolute,                             &Cpu65816::executeCPXCPY),
+    OpCode(0xED, "SBC", AddressingMode::Absolute,                             &Cpu65816::executeSBC),
+    OpCode(0xEE, "INC", AddressingMode::Absolute,                             &Cpu65816::executeINCDEC),
+    OpCode(0xEF, "SBC", AddressingMode::AbsoluteLong,                         &Cpu65816::executeSBC),
+    OpCode(0xF0, "BEQ", AddressingMode::ProgramCounterRelative,               &Cpu65816::executeBranch),
+    OpCode(0xF1, "SBC", AddressingMode::DirectPageIndirectIndexedWithY,       &Cpu65816::executeSBC),
+    OpCode(0xF2, "SBC", AddressingMode::DirectPageIndirect,                   &Cpu65816::executeSBC),
+    OpCode(0xF3, "SBC", AddressingMode::StackRelativeIndirectIndexedWithY,    &Cpu65816::executeSBC),
+    OpCode(0xF4, "PEA", AddressingMode::StackAbsolute,                        &Cpu65816::executeStack),
+    OpCode(0xF5, "SBC", AddressingMode::DirectPageIndexedWithX,               &Cpu65816::executeSBC),
+    OpCode(0xF6, "INC", AddressingMode::DirectPageIndexedWithX,               &Cpu65816::executeINCDEC),
+    OpCode(0xF7, "SBC", AddressingMode::DirectPageIndirectLongIndexedWithY,   &Cpu65816::executeSBC),
+    OpCode(0xF8, "SED", AddressingMode::Implied,                              &Cpu65816::executeStatusReg),
+    OpCode(0xF9, "SBC", AddressingMode::AbsoluteIndexedWithY,                 &Cpu65816::executeSBC),
+    OpCode(0xFA, "PLX", AddressingMode::StackImplied,                         &Cpu65816::executeStack),
+    OpCode(0xFB, "XCE", AddressingMode::Implied,                              &Cpu65816::executeStatusReg),
+    OpCode(0xFC, "JSR", AddressingMode::AbsoluteIndexedIndirectWithX,         &Cpu65816::executeJumpReturn),
+    OpCode(0xFD, "SBC", AddressingMode::AbsoluteIndexedWithX,                 &Cpu65816::executeSBC),
+    OpCode(0xFE, "INC", AddressingMode::AbsoluteIndexedWithX,                 &Cpu65816::executeINCDEC),
+    OpCode(0xFF, "SBC", AddressingMode::AbsoluteLongIndexedWithX,             &Cpu65816::executeSBC)
+};
+
+#endif // OPCODE_TABLE_HPP
+

src/opcodes/OpCode_ADC.cpp

@@ -0,0 +1,271 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "../Cpu65816.hpp"
+
+#define LOG_TAG "Cpu::executeADC"
+
+/**
+ * This file contains the implementation for all ADC OpCodes.
+ */
+
+void Cpu65816::execute8BitADC(OpCode &opCode) {
+    Address dataAddress = getAddressOfOpCodeData(opCode);
+    uint8_t value = mSystemBus.readByte(dataAddress);
+    uint8_t accumulator = Binary::lower8BitsOf(mA);
+    uint8_t carryValue = mCpuStatus.carryFlag() ? 1 : 0;
+
+    uint16_t result16Bit = accumulator + value + carryValue;
+
+    // Is there a carry out of the penultimate bit, redo the sum with 7 bits value and find out.
+    accumulator &= 0x7F;
+    value &= 0x7F;
+    uint8_t partialResult = accumulator + value + carryValue;
+    // Is bit 8 set?
+    bool carryOutOfPenultimateBit = partialResult & 0x80;
+
+    // Is there a carry out of the last bit, check bit 8 for that
+    bool carryOutOfLastBit = result16Bit & 0x0100;
+
+    bool overflow = carryOutOfLastBit ^ carryOutOfPenultimateBit;
+    if (overflow) mCpuStatus.setOverflowFlag();
+    else mCpuStatus.clearOverflowFlag();
+
+    if (carryOutOfLastBit) mCpuStatus.setCarryFlag();
+    else mCpuStatus.clearCarryFlag();
+
+    uint8_t result8Bit = Binary::lower8BitsOf(result16Bit);
+    // Update sign and zero flags
+    mCpuStatus.updateSignAndZeroFlagFrom8BitValue(result8Bit);
+    // Store the 8 bit result in the accumulator
+    Binary::setLower8BitsOf16BitsValue(&mA, result8Bit);
+}
+
+void Cpu65816::execute16BitADC(OpCode &opCode) {
+    Address dataAddress = getAddressOfOpCodeData(opCode);
+    uint16_t value = mSystemBus.readTwoBytes(dataAddress);
+    uint16_t accumulator = mA;
+    uint16_t carryValue = mCpuStatus.carryFlag() ? 1 : 0;
+
+    uint32_t result32Bit = accumulator + value + carryValue;
+
+    // Is there a carry out of the penultimate bit, redo the sum with 15 bits value and find out.
+    accumulator &= 0x7FFF;
+    value &= 0x7FFF;
+    uint16_t partialResult = accumulator + value + carryValue;
+    // Is bit 8 set?
+    bool carryOutOfPenultimateBit = partialResult & 0x8000;
+
+    // Is there a carry out of the last bit, check bit 16 for that
+    bool carryOutOfLastBit = result32Bit & 0x010000;
+
+    bool overflow = carryOutOfLastBit ^ carryOutOfPenultimateBit;
+    if (overflow) mCpuStatus.setOverflowFlag();
+    else mCpuStatus.clearOverflowFlag();
+
+    if (carryOutOfLastBit) mCpuStatus.setCarryFlag();
+    else mCpuStatus.clearCarryFlag();
+
+    uint8_t result16Bit = Binary::lower16BitsOf(result32Bit);
+    // Update sign and zero flags
+    mCpuStatus.updateSignAndZeroFlagFrom8BitValue(result16Bit);
+    // Store the 16 bit result in the accumulator
+    mA = result16Bit;
+}
+
+void Cpu65816::execute8BitBCDADC(OpCode &opCode) {
+    Address dataAddress = getAddressOfOpCodeData(opCode);
+    uint8_t value = mSystemBus.readByte(dataAddress);
+    uint8_t accumulator = Binary::lower8BitsOf(mA);
+
+    uint8_t result = 0;
+    bool carry = Binary::bcdSum8Bit(value, accumulator, &result, mCpuStatus.carryFlag());
+    if (carry) mCpuStatus.setCarryFlag();
+    else mCpuStatus.clearCarryFlag();
+
+    Binary::setLower8BitsOf16BitsValue(&mA, result);
+    mCpuStatus.updateSignAndZeroFlagFrom8BitValue(result);
+}
+
+void Cpu65816::execute16BitBCDADC(OpCode &opCode) {
+    Address dataAddress = getAddressOfOpCodeData(opCode);
+    uint16_t value = mSystemBus.readTwoBytes(dataAddress);
+    uint16_t accumulator = mA;
+
+    uint16_t result = 0;
+    bool carry = Binary::bcdSum16Bit(value, accumulator, &result, mCpuStatus.carryFlag());
+    if (carry) mCpuStatus.setCarryFlag();
+    else mCpuStatus.clearCarryFlag();
+
+    mA = result;
+    mCpuStatus.updateSignAndZeroFlagFrom8BitValue(result);
+}
+
+void Cpu65816::executeADC(OpCode &opCode) {
+    if (accumulatorIs8BitWide()) {
+        if (mCpuStatus.decimalFlag()) execute8BitBCDADC(opCode);
+        else execute8BitADC(opCode);
+    } else {
+        if (mCpuStatus.decimalFlag()) execute16BitBCDADC(opCode);
+        else execute16BitADC(opCode);
+        addToCycles(1);
+    }
+
+// All OpCodes take one more cycle on 65C02 in decimal mode
+#ifdef EMU_65C02
+    if (mCpuStatus.decimalFlag()) {
+        addToCycles(1);
+    }
+#endif
+
+    switch (opCode.getCode()) {
+        switch (opCode.getCode()) {
+            case (0x69):                 // ADC Immediate
+            {
+                if (accumulatorIs16BitWide()) {
+                    addToProgramAddress(1);
+                }
+                addToProgramAddress(2);
+                addToCycles(2);
+                break;
+            }
+            case (0x6D):                 // ADC Absolute
+            {
+                addToProgramAddress(3);
+                addToCycles(4);
+                break;
+            }
+            case (0x6F):                 // ADC Absolute Long
+            {
+                addToProgramAddress(4);
+                addToCycles(5);
+                break;
+            }
+            case (0x65):                 // ADC Direct Page
+            {
+                if (Binary::lower8BitsOf(mD) != 0) {
+                    addToCycles(1);
+                }
+
+                addToProgramAddress(2);
+                addToCycles(3);
+                break;
+            }
+            case (0x72):                 // ADC Direct Page Indirect
+            {
+                if (Binary::lower8BitsOf(mD) != 0) {
+                    addToCycles(1);
+                }
+
+                addToProgramAddress(2);
+                addToCycles(5);
+                break;
+            }
+            case (0x67):                 // ADC Direct Page Indirect Long
+            {
+                if (Binary::lower8BitsOf(mD) != 0) {
+                    addToCycles(1);
+                }
+
+                addToProgramAddress(2);
+                addToCycles(6);
+                break;
+            }
+            case (0x7D):                 // ADC Absolute Indexed, X
+            {
+                if (opCodeAddressingCrossesPageBoundary(opCode)) {
+                    addToCycles(1);
+                }
+
+                addToProgramAddress(3);
+                addToCycles(4);
+                break;
+            }
+            case (0x7F):                 // ADC Absolute Long Indexed, X
+            {
+                addToProgramAddress(4);
+                addToCycles(5);
+                break;
+            }
+            case (0x79):                 // ADC Absolute Indexed Y
+            {
+                if (opCodeAddressingCrossesPageBoundary(opCode)) {
+                    addToCycles(1);
+                }
+                addToProgramAddress(3);
+                addToCycles(4);
+                break;
+            }
+            case (0x75):                 // ADC Direct Page Indexed, X
+            {
+                if (Binary::lower8BitsOf(mD) != 0) {
+                    addToCycles(1);
+                }
+                addToProgramAddress(2);
+                addToCycles(4);
+                break;
+            }
+            case (0x61):                 // ADC Direct Page Indexed Indirect, X
+            {
+                if (Binary::lower8BitsOf(mD) != 0) {
+                    addToCycles(1);
+                }
+                addToProgramAddress(2);
+                addToCycles(6);
+                break;
+            }
+            case (0x71):                 // ADC Direct Page Indirect Indexed, Y
+            {
+                if (Binary::lower8BitsOf(mD) != 0) {
+                    addToCycles(1);
+                }
+                if (opCodeAddressingCrossesPageBoundary(opCode)) {
+                    addToCycles(1);
+                }
+                addToProgramAddress(2);
+                addToCycles(5);
+                break;
+            }
+            case (0x77):                 // ADC Direct Page Indirect Long Indexed, Y
+            {
+                if (Binary::lower8BitsOf(mD) != 0) {
+                    addToCycles(1);
+                }
+                addToProgramAddress(2);
+                addToCycles(6);
+                break;
+            }
+            case (0x63):                 // ADC Stack Relative
+            {
+                addToProgramAddress(2);
+                addToCycles(4);
+                break;
+            }
+            case (0x73):                 // ADC Stack Relative Indirect Indexed, Y
+            {
+                addToProgramAddress(2);
+                addToCycles(7);
+                break;
+            }
+            default: {
+                LOG_UNEXPECTED_OPCODE(opCode);
+            }
+        }
+    }
+}

src/opcodes/OpCode_AND.cpp

@@ -0,0 +1,170 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "../Cpu65816.hpp"
+
+#include <cmath>
+
+#define LOG_TAG "Cpu::executeORA"
+
+/**
+ * This file contains implementations for all AND OpCodes.
+ */
+
+void Cpu65816::executeAND8Bit(OpCode &opCode) {
+    Address opCodeDataAddress = getAddressOfOpCodeData(opCode);
+    uint8_t operand = mSystemBus.readByte(opCodeDataAddress);
+    uint8_t result = Binary::lower8BitsOf(mA) & operand;
+    mCpuStatus.updateSignAndZeroFlagFrom8BitValue(result);
+    Binary::setLower8BitsOf16BitsValue(&mA, result);
+}
+
+void Cpu65816::executeAND16Bit(OpCode &opCode) {
+    Address opCodeDataAddress = getAddressOfOpCodeData(opCode);
+    uint16_t operand = mSystemBus.readTwoBytes(opCodeDataAddress);
+    uint16_t result = mA & operand;
+    mCpuStatus.updateSignAndZeroFlagFrom16BitValue(result);
+    mA = result;
+}
+
+void Cpu65816::executeAND(OpCode &opCode) {
+    if (accumulatorIs16BitWide()) {
+        executeAND16Bit(opCode);
+        addToCycles(1);
+    } else {
+        executeAND8Bit(opCode);
+    }
+
+    switch (opCode.getCode()) {
+        case (0x29):                // AND Immediate
+        {
+            if (accumulatorIs16BitWide()) {
+                addToProgramAddress(1);
+            }
+            addToProgramAddressAndCycles(2, 2);
+            break;
+        }
+        case (0x2D):                // AND Absolute
+        {
+            addToProgramAddressAndCycles(3, 4);
+            break;
+        }
+        case (0x2F):                // AND Absolute Long
+        {
+            addToProgramAddressAndCycles(4, 5);
+            break;
+        }
+        case (0x25):                // AND Direct Page
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 3);
+            break;
+        }
+        case (0x32):                // AND Direct Page Indirect
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 5);
+            break;
+        }
+        case (0x27):                // AND Direct Page Indirect Long
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 6);
+            break;
+        }
+        case (0x3D):                // AND Absolute Indexed, X
+        {
+            if (opCodeAddressingCrossesPageBoundary(opCode)) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(3, 4);
+            break;
+        }
+        case (0x3F):                // AND Absolute Long Indexed, X
+        {
+            addToProgramAddressAndCycles(4, 5);
+            break;
+        }
+        case (0x39):                // AND Absolute Indexed, Y
+        {
+            if (opCodeAddressingCrossesPageBoundary(opCode)) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(3, 4);
+            break;
+        }
+        case (0x35):                // AND Direct Page Indexed, X
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 4);
+            break;
+        }
+        case (0x21):                // AND Direct Page Indexed Indirect, X
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 6);
+            break;
+        }
+        case (0x31):                // AND Direct Page Indirect Indexed, Y
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            if (opCodeAddressingCrossesPageBoundary(opCode)) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 5);
+            break;
+        }
+        case (0x37):                // AND Direct Page Indirect Long Indexed, Y
+        {
+            // TODO: The manual reports a '0' not on the cycles count for this OpCode.
+            // No idea what that means.
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 6);
+            break;
+        }
+        case (0x23):                // AND Stack Relative
+        {
+            addToProgramAddressAndCycles(2, 4);
+            break;
+        }
+        case (0x33):                // AND Stack Relative Indirect Indexed, Y
+        {
+            addToProgramAddressAndCycles(2, 7);
+            break;
+        }
+        default:
+        {
+            LOG_UNEXPECTED_OPCODE(opCode);
+        }
+    }
+}

src/opcodes/OpCode_ASL.cpp

@@ -0,0 +1,131 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "../Cpu65816.hpp"
+
+#define LOG_TAG "Cpu::executeASL"
+
+#define DO_ASL_8_BIT(value) {                                   \
+    bool newCarry = value & 0x80;                               \
+    value = value << 1;                                         \
+    if (newCarry) mCpuStatus.setCarryFlag();                    \
+    else mCpuStatus.clearCarryFlag();                           \
+    mCpuStatus.updateSignAndZeroFlagFrom8BitValue(value);       \
+}
+
+#define DO_ASL_16_BIT(value) {                                  \
+    bool newCarry = value & 0x8000;                             \
+    value = value << 1;                                         \
+    if (newCarry) mCpuStatus.setCarryFlag();                    \
+    else mCpuStatus.clearCarryFlag();                           \
+    mCpuStatus.updateSignAndZeroFlagFrom16BitValue(value);      \
+}
+
+/**
+ * This file contains implementations for all ASL OpCodes.
+ */
+
+void Cpu65816::executeMemoryASL(OpCode &opCode) {
+    Address opCodeDataAddress = getAddressOfOpCodeData(opCode);
+
+    if(accumulatorIs8BitWide()) {
+        uint8_t value = mSystemBus.readByte(opCodeDataAddress);
+        DO_ASL_8_BIT(value);
+        mSystemBus.storeByte(opCodeDataAddress, value);
+    } else {
+        uint16_t value = mSystemBus.readTwoBytes(opCodeDataAddress);
+        DO_ASL_16_BIT(value);
+        mSystemBus.storeTwoBytes(opCodeDataAddress, value);
+    }
+}
+
+void Cpu65816::executeAccumulatorASL(OpCode &opCode) {
+    if(accumulatorIs8BitWide()) {
+        uint8_t value = Binary::lower8BitsOf(mA);
+        DO_ASL_8_BIT(value);
+        Binary::setLower8BitsOf16BitsValue(&mA, value);
+    } else {
+        DO_ASL_16_BIT(mA);
+    }
+}
+
+void Cpu65816::executeASL(OpCode &opCode) {
+    switch (opCode.getCode()) {
+        case (0x0A):                // ASL Accumulator
+        {
+            executeAccumulatorASL(opCode);
+            addToProgramAddressAndCycles(1, 2);
+            break;
+        }
+        case (0x0E):                // ASL Absolute
+        {
+            if (accumulatorIs16BitWide()) {
+                addToCycles(2);
+            }
+
+            executeMemoryASL(opCode);
+            addToProgramAddressAndCycles(3, 6);
+            break;
+        }
+        case (0x06):                // ASL Direct Page
+        {
+            if (accumulatorIs16BitWide()) {
+                addToCycles(2);
+            }
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+
+            executeMemoryASL(opCode);
+            addToProgramAddressAndCycles(2, 5);
+            break;
+        }
+        case (0x1E):                // ASL Absolute Indexed, X
+        {
+            if (accumulatorIs16BitWide()) {
+                addToCycles(2);
+            }
+#ifdef EMU_65C02
+            if (!opCodeAddressingCrossesPageBoundary(opCode)) {
+                subtractFromCycles(1);
+            }
+#endif
+            executeMemoryASL(opCode);
+            addToProgramAddressAndCycles(3, 7);
+            break;
+        }
+        case (0x16):                // ASL Direct Page Indexed, X
+        {
+            if (accumulatorIs16BitWide()) {
+                addToCycles(2);
+            }
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+
+            executeMemoryASL(opCode);
+            addToProgramAddressAndCycles(2, 6);
+            break;
+        }
+        default:
+        {
+            LOG_UNEXPECTED_OPCODE(opCode);
+        }
+    }
+}

src/opcodes/OpCode_BIT.cpp

@@ -0,0 +1,109 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "../Interrupt.hpp"
+#include "../Cpu65816.hpp"
+
+#define LOG_TAG "Cpu::executeBIT"
+
+/**
+ * This file contains the implementation for all BIT OpCodes
+ */
+
+void Cpu65816::execute8BitBIT(OpCode &opCode) {
+    const Address addressOfOpCodeData = getAddressOfOpCodeData(opCode);
+    uint8_t value = mSystemBus.readByte(addressOfOpCodeData);
+    bool isHighestBitSet = value & 0x80;
+    bool isNextToHighestBitSet = value & 0x40;
+
+    if (opCode.getAddressingMode() != AddressingMode::Immediate) {
+        if (isHighestBitSet) mCpuStatus.setSignFlag();
+        else mCpuStatus.clearSignFlag();
+        if (isNextToHighestBitSet) mCpuStatus.setOverflowFlag();
+        else mCpuStatus.clearOverflowFlag();
+    }
+    mCpuStatus.updateZeroFlagFrom8BitValue(value & Binary::lower8BitsOf(mA));
+}
+
+void Cpu65816::execute16BitBIT(OpCode &opCode) {
+    const Address addressOfOpCodeData = getAddressOfOpCodeData(opCode);
+    uint16_t value = mSystemBus.readTwoBytes(addressOfOpCodeData);
+    bool isHighestBitSet = value & 0x8000;
+    bool isNextToHighestBitSet = value & 0x4000;
+
+    if (opCode.getAddressingMode() != AddressingMode::Immediate) {
+        if (isHighestBitSet) mCpuStatus.setSignFlag();
+        else mCpuStatus.clearSignFlag();
+        if (isNextToHighestBitSet) mCpuStatus.setOverflowFlag();
+        else mCpuStatus.clearOverflowFlag();
+    }
+    mCpuStatus.updateZeroFlagFrom16BitValue(value & mA);
+}
+
+void Cpu65816::executeBIT(OpCode &opCode) {
+    if (accumulatorIs8BitWide()) {
+        execute8BitBIT(opCode);
+    } else {
+        execute16BitBIT(opCode);
+        addToCycles(1);
+    }
+
+    switch (opCode.getCode()) {
+        case(0x89):                 // BIT Immediate
+        {
+            if (accumulatorIs16BitWide()) {
+                addToProgramAddress(1);
+            }
+            addToProgramAddressAndCycles(2, 2);
+            break;
+        }
+        case(0x2C):                 // BIT Absolute
+        {
+            addToProgramAddressAndCycles(3, 4);
+            break;
+        }
+        case(0x24):                 // BIT Direct Page
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 3);
+            break;
+        }
+        case(0x3C):                 // BIT Absolute Indexed, X
+        {
+            if (opCodeAddressingCrossesPageBoundary(opCode)) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(3, 4);
+            break;
+        }
+        case(0x34):                 // BIT Direct Page Indexed, X
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 4);
+            break;
+        }
+        default: {
+            LOG_UNEXPECTED_OPCODE(opCode);
+        }
+    }
+}

src/opcodes/OpCode_Branch.cpp

@@ -0,0 +1,125 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "../Cpu65816.hpp"
+
+#include <cmath>
+
+#define LOG_TAG "Cpu::executeBranch"
+
+/**
+ * This file contains the implementation for all branch OpCodes
+ */
+
+int Cpu65816::executeBranchShortOnCondition(bool condition, OpCode &opCode) {
+    uint8_t opCycles = 2;
+    uint8_t destination =  mSystemBus.readByte(getAddressOfOpCodeData(opCode));
+    // This is the address of the next instruction
+    uint16_t actualDestination;
+    if (condition) {
+        // One extra cycle if the branch is taken
+        opCycles++;
+        uint16_t destination16;
+        if (Binary::is8bitValueNegative(destination)) {
+            destination16 = 0xFF00 | destination;
+        } else {
+            destination16 = destination;
+        }
+        actualDestination = mProgramAddress.getOffset() + 2 + destination16;
+        // Emulation mode requires 1 extra cycle on page boundary crossing
+        if (Address::offsetsAreOnDifferentPages(mProgramAddress.getOffset(), actualDestination) &&
+            mCpuStatus.emulationFlag()) {
+            opCycles++;
+        }
+    } else {
+        actualDestination = mProgramAddress.getOffset() + 2;
+    }
+    Address newProgramAddress(mProgramAddress.getBank(), actualDestination);
+    mProgramAddress = newProgramAddress;
+    return opCycles;
+}
+
+int Cpu65816::executeBranchLongOnCondition(bool condition, OpCode &opCode) {
+    if (condition) {
+        uint16_t destination = mSystemBus.readTwoBytes(getAddressOfOpCodeData(opCode));
+        mProgramAddress.incrementOffsetBy(3 + destination);
+    }
+    // CPU cycles: 4
+    return 4;
+}
+
+void Cpu65816::executeBranch(OpCode &opCode) {
+
+    switch(opCode.getCode()) {
+        case(0xD0):  // BNE
+        {
+            addToCycles(executeBranchShortOnCondition(!mCpuStatus.zeroFlag(), opCode));
+            break;
+        }
+        case(0xF0):  // BEQ
+        {
+            addToCycles(executeBranchShortOnCondition(mCpuStatus.zeroFlag(), opCode));
+            break;
+        }
+        case(0x90):  // BCC
+        {
+            addToCycles(executeBranchShortOnCondition(!mCpuStatus.carryFlag(), opCode));
+            break;
+        }
+        case(0xB0):  // BCS
+        {
+            addToCycles(executeBranchShortOnCondition(mCpuStatus.carryFlag(), opCode));
+            break;
+        }
+        case(0x10):  // BPL
+        {
+            int cycles = executeBranchShortOnCondition(!mCpuStatus.signFlag(), opCode);
+            addToCycles(cycles);
+            break;
+        }
+        case(0x30):  // BMI
+        {
+            addToCycles(executeBranchShortOnCondition(mCpuStatus.signFlag(), opCode));
+            break;
+        }
+        case(0x50):  // BVC
+        {
+            addToCycles(executeBranchShortOnCondition(!mCpuStatus.overflowFlag(), opCode));
+            break;
+        }
+        case(0x70):  // BVS
+        {
+            addToCycles(executeBranchShortOnCondition(mCpuStatus.overflowFlag(), opCode));
+            break;
+        }
+        case(0x80):  // BRA
+        {
+            addToCycles(executeBranchShortOnCondition(true, opCode));
+            break;
+        }
+        case(0x82):  // BRL
+        {
+            addToCycles(executeBranchLongOnCondition(true, opCode));
+            break;
+        }
+        default: {
+            LOG_UNEXPECTED_OPCODE(opCode);
+        }
+    }
+}

src/opcodes/OpCode_CMP.cpp

@@ -0,0 +1,169 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "../Cpu65816.hpp"
+
+#define LOG_TAG "Cpu::executeCMP"
+
+/**
+ * This file contains the implementation for all CMP OpCodes
+ */
+
+void Cpu65816::execute8BitCMP(OpCode &opCode) {
+    Address valueAddress = getAddressOfOpCodeData(opCode);
+    uint8_t value = mSystemBus.readByte(valueAddress);
+    uint8_t result = Binary::lower8BitsOf(mA) - value;
+    mCpuStatus.updateSignAndZeroFlagFrom8BitValue(result);
+    if (Binary::lower8BitsOf(mA) >= value) {
+        mCpuStatus.setCarryFlag();
+    } else {
+        mCpuStatus.clearCarryFlag();
+    }
+}
+
+void Cpu65816::execute16BitCMP(OpCode &opCode) {
+    Address valueAddress = getAddressOfOpCodeData(opCode);
+    uint16_t value = mSystemBus.readTwoBytes(valueAddress);
+    uint16_t result = mA - value;
+    mCpuStatus.updateSignAndZeroFlagFrom16BitValue(result);
+    if (mA >= value) {
+        mCpuStatus.setCarryFlag();
+    } else {
+        mCpuStatus.clearCarryFlag();
+    }
+}
+void Cpu65816::executeCMP(OpCode &opCode) {
+    if (accumulatorIs8BitWide()) {
+        execute8BitCMP(opCode);
+    } else {
+        execute16BitCMP(opCode);
+        addToCycles(1);
+    }
+
+    switch(opCode.getCode()) {
+        case(0xC9):  // CMP Immediate
+        {
+            if (accumulatorIs16BitWide()) {
+                addToProgramAddress(1);
+            }
+            addToProgramAddressAndCycles(2, 2);
+            break;
+        }
+        case(0xCD):  // CMP Absolute
+        {
+            addToProgramAddressAndCycles(3, 4);
+            break;
+        }
+        case(0xCF):  // CMP Absolute Long
+        {
+            addToProgramAddressAndCycles(4, 5);
+            break;
+        }
+        case(0xC5):  // CMP Direct Page
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 3);
+            break;
+        }
+        case(0xD2):  // CMP Direct Page Indirect
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 5);
+            break;
+        }
+        case(0xC7):  // CMP Direct Page Indirect Long
+        {
+            addToProgramAddressAndCycles(2, 6);
+            break;
+        }
+        case(0xDD):  // CMP Absolute Indexed, X
+        {
+            if (opCodeAddressingCrossesPageBoundary(opCode)) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(3, 4);
+            break;
+        }
+        case(0xDF):  // CMP Absolute Long Indexed, X
+        {
+            addToProgramAddressAndCycles(4, 5);
+            break;
+        }
+        case(0xD9):  // CMP Absolute Indexed, Y
+        {
+            if (opCodeAddressingCrossesPageBoundary(opCode)) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(3, 4);
+            break;
+        }
+        case(0xD5):  // CMP Direct Page Indexed, X
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 4);
+            break;
+        }
+        case(0xC1):  // CMP Direct Page Indexed Indirect, X
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 6);
+            break;
+        }
+        case(0xD1):  // CMP Direct Page Indexed Indirect, Y
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            if (opCodeAddressingCrossesPageBoundary(opCode)) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 5);
+            break;
+        }
+        case(0xD7):  // CMP Direct Page Indirect Long Indexed, Y
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 6);
+            break;
+        }
+        case(0xC3):  // CMP Stack Relative
+        {
+            addToProgramAddressAndCycles(2, 4);
+            break;
+        }
+        case(0xD3):  // CMP Stack Relative Indirect Indexed, Y
+        {
+            addToProgramAddressAndCycles(2, 7);
+            break;
+        }
+        default: {
+            LOG_UNEXPECTED_OPCODE(opCode);
+        }
+    }
+}

src/opcodes/OpCode_CPX_CPY.cpp

@@ -0,0 +1,141 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "../Cpu65816.hpp"
+
+#define LOG_TAG "Cpu::executeCPXCPY"
+
+/**
+ * This file contains implementations for all CPX and CPY OpCodes.
+ */
+
+void Cpu65816::execute8BitCPX(OpCode &opCode) {
+    uint8_t value = mSystemBus.readByte(getAddressOfOpCodeData(opCode));
+    uint8_t result = Binary::lower8BitsOf(mX) - value;
+    mCpuStatus.updateSignAndZeroFlagFrom8BitValue(result);
+    if (Binary::lower8BitsOf(mX) >= value) mCpuStatus.setCarryFlag();
+    else mCpuStatus.clearCarryFlag();
+}
+
+void Cpu65816::execute16BitCPX(OpCode &opCode) {
+    uint16_t value = mSystemBus.readTwoBytes(getAddressOfOpCodeData(opCode));
+    uint16_t result = mX - value;
+    mCpuStatus.updateSignAndZeroFlagFrom16BitValue(result);
+    if (mX >= value) mCpuStatus.setCarryFlag();
+    else mCpuStatus.clearCarryFlag();
+}
+
+void Cpu65816::execute8BitCPY(OpCode &opCode) {
+    uint8_t value = mSystemBus.readByte(getAddressOfOpCodeData(opCode));
+    uint8_t result = Binary::lower8BitsOf(mY) - value;
+    mCpuStatus.updateSignAndZeroFlagFrom8BitValue(result);
+    if (Binary::lower8BitsOf(mY) >= value) mCpuStatus.setCarryFlag();
+    else mCpuStatus.clearCarryFlag();
+}
+
+void Cpu65816::execute16BitCPY(OpCode &opCode) {
+    uint16_t value = mSystemBus.readTwoBytes(getAddressOfOpCodeData(opCode));
+    uint16_t result = mY - value;
+    mCpuStatus.updateSignAndZeroFlagFrom16BitValue(result);
+    if (mY >= value) mCpuStatus.setCarryFlag();
+    else mCpuStatus.clearCarryFlag();
+}
+
+void Cpu65816::executeCPXCPY(OpCode &opCode) {
+    switch (opCode.getCode()) {
+        case(0xE0):  // CPX Immediate
+        {
+            if (indexIs8BitWide()) {
+                execute8BitCPX(opCode);
+            } else {
+                execute16BitCPX(opCode);
+                addToProgramAddress(1);
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 2);
+            break;
+        }
+        case(0xEC):  // CPX Absolute
+        {
+            if (indexIs8BitWide()) {
+                execute8BitCPX(opCode);
+            } else {
+                execute16BitCPX(opCode);
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(3, 4);
+            break;
+        }
+        case(0xE4):  // CPX Direct Page
+        {
+            if (indexIs8BitWide()) {
+                execute8BitCPX(opCode);
+            } else {
+                execute16BitCPX(opCode);
+                addToCycles(1);
+            }
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 3);
+            break;
+        }
+        case(0xC0):  // CPY Immediate
+        {
+            if (indexIs8BitWide()) {
+                execute8BitCPY(opCode);
+            } else {
+                execute16BitCPY(opCode);
+                addToProgramAddress(1);
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 2);
+            break;
+        }
+        case(0xCC):  // CPY Absolute
+        {
+            if (indexIs8BitWide()) {
+                execute8BitCPY(opCode);
+            } else {
+                execute16BitCPY(opCode);
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(3, 4);
+            break;
+        }
+        case(0xC4):  // CPY Direct Page
+        {
+            if (indexIs8BitWide()) {
+                execute8BitCPY(opCode);
+            } else {
+                execute16BitCPY(opCode);
+                addToCycles(1);
+            }
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 3);
+            break;
+        }
+        default:
+        {
+            LOG_UNEXPECTED_OPCODE(opCode);
+        }
+    }
+}

src/opcodes/OpCode_EOR.cpp

@@ -0,0 +1,165 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "../Cpu65816.hpp"
+
+#define LOG_TAG "Cpu::executeEOR"
+
+/**
+ * This file contains the implementation for all EOR OpCodes.
+ */
+
+void Cpu65816::executeEOR8Bit(OpCode &opCode) {
+    Address opCodeDataAddress = getAddressOfOpCodeData(opCode);
+    uint8_t operand = mSystemBus.readByte(opCodeDataAddress);
+    uint8_t result = Binary::lower8BitsOf(mA) ^ operand;
+    mCpuStatus.updateSignAndZeroFlagFrom8BitValue(result);
+    Binary::setLower8BitsOf16BitsValue(&mA, result);
+}
+
+void Cpu65816::executeEOR16Bit(OpCode &opCode) {
+    Address opCodeDataAddress = getAddressOfOpCodeData(opCode);
+    uint16_t operand = mSystemBus.readTwoBytes(opCodeDataAddress);
+    uint16_t result = mA ^ operand;
+    mCpuStatus.updateSignAndZeroFlagFrom16BitValue(result);
+    mA = result;
+}
+
+void Cpu65816::executeEOR(OpCode &opCode) {
+    if (accumulatorIs8BitWide()) {
+        executeEOR8Bit(opCode);
+    } else {
+        executeEOR16Bit(opCode);
+        addToCycles(1);
+    }
+
+    switch (opCode.getCode()) {
+        case (0x49):                // EOR Immediate
+        {
+            if (accumulatorIs16BitWide()) {
+                addToProgramAddress(1);
+            }
+            addToProgramAddressAndCycles(2, 2);
+            break;
+        }
+        case (0x4D):                // EOR Absolute
+        {
+            addToProgramAddressAndCycles(3, 4);
+            break;
+        }
+        case (0x4F):                // EOR Absolute Long
+        {
+            addToProgramAddressAndCycles(4, 5);
+            break;
+        }
+        case (0x45):                 // EOR Direct Page
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 3);
+            break;
+        }
+        case (0x52):                 // EOR Direct Page Indirect
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 5);
+            break;
+        }
+        case (0x47):                 // EOR Direct Page Indirect Long
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 6);
+            break;
+        }
+        case (0x5D):                 // EOR Absolute Indexed, X
+        {
+            if (opCodeAddressingCrossesPageBoundary(opCode)) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(3, 4);
+            break;
+        }
+        case (0x5F):                 // EOR Absolute Long Indexed, X
+        {
+            addToProgramAddressAndCycles(4, 5);
+            break;
+        }
+        case (0x59):                 // EOR Absolute Indexed, Y
+        {
+            if (opCodeAddressingCrossesPageBoundary(opCode)) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(3, 4);
+            break;
+        }
+        case (0x55):                 // EOR Direct Page Indexed, X
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 4);
+            break;
+        }
+        case (0x41):                // EOR Direct Page Indexed Indirect, X
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 6);
+            break;
+        }
+        case (0x51):                 // EOR Direct Page Indirect Indexed, Y
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            if (opCodeAddressingCrossesPageBoundary(opCode)) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 5);
+            break;
+        }
+        case (0x57):                 // EOR Direct Page Indirect Long Indexed, Y
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 6);
+            break;
+        }
+        case (0x43):                // EOR Stack Relative
+        {
+            addToProgramAddressAndCycles(2, 4);
+            break;
+        }
+        case (0x53):                // EOR Stack Relative Indirect Indexed, Y
+        {
+            addToProgramAddressAndCycles(2, 7);
+            break;
+        }
+        default: {
+            LOG_UNEXPECTED_OPCODE(opCode);
+        }
+    }
+}

src/opcodes/OpCode_INC_DEC.cpp

@@ -0,0 +1,251 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "../Cpu65816.hpp"
+
+#define LOG_TAG "Cpu::executeINCDEC"
+
+/**
+ * This file contains implementations for all Increment and Decrement OpCodes.
+ */
+
+void Cpu65816::execute8BitDecInMemory(OpCode &opCode) {
+    Address opCodeDataAddress = getAddressOfOpCodeData(opCode);
+    uint8_t value = mSystemBus.readByte(opCodeDataAddress);
+    value--;
+    mCpuStatus.updateSignAndZeroFlagFrom8BitValue(value);
+    mSystemBus.storeByte(opCodeDataAddress, value);
+}
+
+void Cpu65816::execute16BitDecInMemory(OpCode &opCode) {
+    Address opCodeDataAddress = getAddressOfOpCodeData(opCode);
+    uint16_t value = mSystemBus.readTwoBytes(opCodeDataAddress);
+    value--;
+    mCpuStatus.updateSignAndZeroFlagFrom16BitValue(value);
+    mSystemBus.storeTwoBytes(opCodeDataAddress, value);
+}
+
+void Cpu65816::execute8BitIncInMemory(OpCode &opCode) {
+    Address opCodeDataAddress = getAddressOfOpCodeData(opCode);
+    uint8_t value = mSystemBus.readByte(opCodeDataAddress);
+    value++;
+    mCpuStatus.updateSignAndZeroFlagFrom8BitValue(value);
+    mSystemBus.storeByte(opCodeDataAddress, value);
+}
+
+void Cpu65816::execute16BitIncInMemory(OpCode &opCode) {
+    Address opCodeDataAddress = getAddressOfOpCodeData(opCode);
+    uint16_t value = mSystemBus.readTwoBytes(opCodeDataAddress);
+    value++;
+    mCpuStatus.updateSignAndZeroFlagFrom16BitValue(value);
+    mSystemBus.storeTwoBytes(opCodeDataAddress, value);
+}
+
+void Cpu65816::executeINCDEC(OpCode &opCode) {
+    switch (opCode.getCode()) {
+        case(0x1A):  // INC Accumulator
+        {
+            if (accumulatorIs8BitWide()) {
+                uint8_t lowerA = Binary::lower8BitsOf(mA);
+                lowerA++;
+                Binary::setLower8BitsOf16BitsValue(&mA, lowerA);
+                mCpuStatus.updateSignAndZeroFlagFrom8BitValue(lowerA);
+            } else {
+                mA++;
+                mCpuStatus.updateSignAndZeroFlagFrom16BitValue(mA);
+            }
+            addToProgramAddressAndCycles(1, 2);
+        }
+        case(0xEE): // INC Absolute
+        {
+            if (accumulatorIs8BitWide()) {
+                execute8BitIncInMemory(opCode);
+            } else {
+                execute16BitIncInMemory(opCode);
+                addToCycles(2);
+            }
+            addToProgramAddressAndCycles(3, 6);
+        }
+        case(0xE6): // INC Direct Page
+        {
+            if (accumulatorIs8BitWide()) {
+                execute8BitIncInMemory(opCode);
+            } else {
+                execute16BitIncInMemory(opCode);
+                addToCycles(2);
+            }
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 5);
+        }
+        case(0xFE): // INC Absolute Indexed, X
+        {
+            if (accumulatorIs8BitWide()) {
+                execute8BitIncInMemory(opCode);
+            } else {
+                execute16BitIncInMemory(opCode);
+                addToCycles(2);
+            }
+#ifdef EMU_65C02
+            if (!opCodeAddressingCrossesPageBoundary(opCode)) {
+                subtractFromCycles(1);
+            }
+#endif
+            addToProgramAddressAndCycles(3, 7);
+        }
+        case(0xF6): // INC Direct Page Indexed, X
+        {
+            if (accumulatorIs8BitWide()) {
+                execute8BitIncInMemory(opCode);
+            } else {
+                execute16BitIncInMemory(opCode);
+                addToCycles(2);
+            }
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 6);
+        }
+        case(0x3A):  // DEC Accumulator
+        {
+            if (accumulatorIs8BitWide()) {
+                uint8_t lowerA = Binary::lower8BitsOf(mA);
+                lowerA--;
+                Binary::setLower8BitsOf16BitsValue(&mA, lowerA);
+                mCpuStatus.updateSignAndZeroFlagFrom8BitValue(lowerA);
+            } else {
+                mA--;
+                mCpuStatus.updateSignAndZeroFlagFrom16BitValue(mA);
+            }
+            addToProgramAddressAndCycles(1, 2);
+        }
+        case(0xCE): // DEC Absolute
+        {
+            if (accumulatorIs8BitWide()) {
+                execute8BitDecInMemory(opCode);
+            } else {
+                execute16BitDecInMemory(opCode);
+                addToCycles(2);
+            }
+            addToProgramAddressAndCycles(3, 6);
+        }
+        case(0xC6): // DEC Direct Page
+        {
+            if (accumulatorIs8BitWide()) {
+                execute8BitDecInMemory(opCode);
+            } else {
+                execute16BitDecInMemory(opCode);
+                addToCycles(2);
+            }
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 5);
+        }
+        case(0xDE): // DEC Absolute Indexed, X
+        {
+            if (accumulatorIs8BitWide()) {
+                execute8BitDecInMemory(opCode);
+            } else {
+                execute16BitDecInMemory(opCode);
+                addToCycles(2);
+            }
+#ifdef EMU_65C02
+            if (!opCodeAddressingCrossesPageBoundary(opCode)) {
+                subtractFromCycles(1);
+            }
+#endif
+            addToProgramAddressAndCycles(3, 7);
+        }
+        case(0xD6): // DEC Direct Page Indexed, X
+        {
+            if (accumulatorIs8BitWide()) {
+                execute8BitDecInMemory(opCode);
+            } else {
+                execute16BitDecInMemory(opCode);
+                addToCycles(2);
+            }
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 6);
+        }
+        case(0xC8):  // INY
+        {
+            if (indexIs8BitWide()) {
+                uint8_t lowerY = Binary::lower8BitsOf(mY);
+                lowerY++;
+                Binary::setLower8BitsOf16BitsValue(&mY, lowerY);
+                mCpuStatus.updateSignAndZeroFlagFrom8BitValue(lowerY);
+            } else {
+                mY++;
+                mCpuStatus.updateSignAndZeroFlagFrom16BitValue(mY);
+            }
+            addToProgramAddressAndCycles(1, 2);
+            break;
+        }
+        case(0xE8):  // INX
+        {
+            if (indexIs8BitWide()) {
+                uint8_t lowerX = Binary::lower8BitsOf(mX);
+                lowerX++;
+                Binary::setLower8BitsOf16BitsValue(&mX, lowerX);
+                mCpuStatus.updateSignAndZeroFlagFrom8BitValue(lowerX);
+            } else {
+                mX++;
+                mCpuStatus.updateSignAndZeroFlagFrom16BitValue(mX);
+            }
+            addToProgramAddressAndCycles(1,2);
+            break;
+        }
+        case(0x88):  // DEY
+        {
+            if (indexIs8BitWide()) {
+                uint8_t lowerY = Binary::lower8BitsOf(mY);
+                lowerY--;
+                Binary::setLower8BitsOf16BitsValue(&mY, lowerY);
+                mCpuStatus.updateSignAndZeroFlagFrom8BitValue(lowerY);
+            } else {
+                mY--;
+                mCpuStatus.updateSignAndZeroFlagFrom16BitValue(mY);
+            }
+            addToProgramAddressAndCycles(1,2);
+            break;
+        }
+        case(0xCA):  // DEX
+        {
+            if (indexIs8BitWide()) {
+                uint8_t lowerX = Binary::lower8BitsOf(mX);
+                lowerX--;
+                Binary::setLower8BitsOf16BitsValue(&mX, lowerX);
+                mCpuStatus.updateSignAndZeroFlagFrom8BitValue(lowerX);
+            } else {
+                mX--;
+                mCpuStatus.updateSignAndZeroFlagFrom16BitValue(mX);
+            }
+            addToProgramAddressAndCycles(1,2);
+            break;
+        }
+        default:
+        {
+            LOG_UNEXPECTED_OPCODE(opCode);
+        }
+    }
+}

src/opcodes/OpCode_Interrupt.cpp

@@ -0,0 +1,97 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "../Interrupt.hpp"
+#include "../Cpu65816.hpp"
+
+#define LOG_TAG "Cpu::executeInterrupt"
+
+/**
+ * This file contains the implementation for all OpCodes
+ * that deal with interrupts.
+ */
+
+void Cpu65816::executeInterrupt(OpCode &opCode) {
+    switch (opCode.getCode()) {
+        case(0x00):  // BRK
+        {
+            if (mCpuStatus.emulationFlag()) {
+                mStack.push16Bit(static_cast<uint16_t>(mProgramAddress.getOffset() + 2));
+                mCpuStatus.setBreakFlag();
+                mStack.push8Bit(mCpuStatus.getRegisterValue());
+                mCpuStatus.setInterruptDisableFlag();
+#ifdef EMU_65C02
+                mCpuStatus.clearDecimalFlag();
+#endif
+                setProgramAddress(Address(0x00, mEmulationInterrupts->brkIrq));
+                addToCycles(7);
+            } else {
+                mStack.push8Bit(mProgramAddress.getBank());
+                mStack.push16Bit(static_cast<uint16_t>(mProgramAddress.getOffset() + 2));
+                mStack.push8Bit(mCpuStatus.getRegisterValue());
+                mCpuStatus.setInterruptDisableFlag();
+                mCpuStatus.clearDecimalFlag();
+                Address newAddress(0x00, mNativeInterrupts->brk);
+                setProgramAddress(newAddress);
+                addToCycles(8);
+            }
+            break;
+        }
+        case(0x02):                 // COP
+        {
+            if (mCpuStatus.emulationFlag()) {
+                mStack.push16Bit(static_cast<uint16_t>(mProgramAddress.getOffset() + 2));
+                mStack.push8Bit(mCpuStatus.getRegisterValue());
+                mCpuStatus.setInterruptDisableFlag();
+                setProgramAddress(Address(0x00, mEmulationInterrupts->coProcessorEnable));
+                addToCycles(7);
+            } else {
+                mStack.push8Bit(mProgramAddress.getBank());
+                mStack.push16Bit(static_cast<uint16_t>(mProgramAddress.getOffset() + 2));
+                mStack.push8Bit(mCpuStatus.getRegisterValue());
+                mCpuStatus.setInterruptDisableFlag();
+                setProgramAddress(Address(0x00, mNativeInterrupts->coProcessorEnable));
+                addToCycles(8);
+            }
+            mCpuStatus.clearDecimalFlag();
+            break;
+        }
+        case(0x40):                 // RTI
+        {
+            // Note: The picture in the 65816 programming manual about this looks wrong.
+            // This implementation follows the text instead.
+            mCpuStatus.setRegisterValue(mStack.pull8Bit());
+
+            if (mCpuStatus.emulationFlag()) {
+                Address newProgramAddress(mProgramAddress.getBank(), mStack.pull16Bit());
+                mProgramAddress = newProgramAddress;
+                addToCycles(6);
+            } else {
+                uint16_t offset = mStack.pull16Bit();
+                uint8_t bank = mStack.pull8Bit();
+                Address newProgramAddress(bank, offset);
+                mProgramAddress = newProgramAddress;
+                addToCycles(7);
+            }
+        }
+        default: {
+            LOG_UNEXPECTED_OPCODE(opCode);
+        }
+    }
+}

src/opcodes/OpCode_JumpReturn.cpp

@@ -0,0 +1,111 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "../Cpu65816.hpp"
+
+#define LOG_TAG "Cpu::executeJumpReturn"
+
+/**
+ * This file contains the implementation for all OpCodes
+ * that deal with jumps, calls and returns.
+ */
+
+void Cpu65816::executeJumpReturn(OpCode &opCode) {
+    switch (opCode.getCode()) {
+        case(0x20):  // JSR Absolute
+        {
+            mStack.push16Bit(mProgramAddress.getOffset() + 2);
+            uint16_t destinationAddress = getAddressOfOpCodeData(opCode).getOffset();
+            setProgramAddress(Address(mProgramAddress.getBank(), destinationAddress));
+            addToCycles(6);
+            break;
+        }
+        case(0x22):  // JSR Absolute Long
+        {
+            mStack.push8Bit(mProgramAddress.getBank());
+            mStack.push16Bit(mProgramAddress.getOffset() + 3);
+            setProgramAddress(getAddressOfOpCodeData(opCode));
+            addToCycles(8);
+            break;
+        }
+        case(0xFC):  // JSR Absolute Indexed Indirect, X
+        {
+            Address destinationAddress = getAddressOfOpCodeData(opCode);
+            mStack.push8Bit(mProgramAddress.getBank());
+            mStack.push16Bit(mProgramAddress.getOffset() + 2);
+            setProgramAddress(destinationAddress);
+            addToCycles(8);
+            break;
+        }
+        case(0x4C):  // JMP Absolute
+        {
+            uint16_t destinationAddress = getAddressOfOpCodeData(opCode).getOffset();
+            setProgramAddress(Address(mProgramAddress.getBank(), destinationAddress));
+            addToCycles(3);
+            break;
+        }
+        case(0x6C):  // JMP Absolute Indirect
+        {
+            setProgramAddress(getAddressOfOpCodeData(opCode));
+            addToCycles(5);
+#ifdef EMU_65C02
+            addToCycles(1);
+#endif
+            break;
+        }
+        case(0x7C):  // JMP Absolute Indexed Indirect, X
+        {
+            setProgramAddress(getAddressOfOpCodeData(opCode));
+            addToCycles(6);
+            break;
+        }
+        case(0x5C):  // JMP Absolute Long
+        {
+            setProgramAddress(getAddressOfOpCodeData(opCode));
+            addToCycles(4);
+            break;
+        }
+        case(0xDC):  // JMP Absolute Indirect Long
+        {
+            setProgramAddress(getAddressOfOpCodeData(opCode));
+            addToCycles(6);
+            break;
+        }
+        case(0x6B):                 // RTL
+        {
+            uint16_t newOffset = mStack.pull16Bit() + 1;
+            uint8_t newBank = mStack.pull8Bit();
+
+            Address returnAddress(newBank, newOffset);
+            setProgramAddress(returnAddress);
+            addToCycles(6);
+            break;
+        }
+        case(0x60):                 // RTS
+        {
+            Address returnAddress(mProgramAddress.getBank(), mStack.pull16Bit() + 1);
+            setProgramAddress(returnAddress);
+            addToCycles(6);
+            break;
+        }
+        default: {
+            LOG_UNEXPECTED_OPCODE(opCode);
+        }
+    }
+}

src/opcodes/OpCode_LDA.cpp

@@ -0,0 +1,165 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "../Cpu65816.hpp"
+
+#include <cmath>
+
+#define LOG_TAG "Cpu::executeLDA"
+
+/**
+ * This file contains implementations for all LDA OpCodes.
+ */
+
+void Cpu65816::executeLDA8Bit(OpCode &opCode) {
+    Address opCodeDataAddress = getAddressOfOpCodeData(opCode);
+    uint8_t value = mSystemBus.readByte(opCodeDataAddress);
+    Binary::setLower8BitsOf16BitsValue(&mA, value);
+    mCpuStatus.updateSignAndZeroFlagFrom8BitValue(value);
+}
+
+void Cpu65816::executeLDA16Bit(OpCode &opCode) {
+    Address opCodeDataAddress = getAddressOfOpCodeData(opCode);
+    mA = mSystemBus.readTwoBytes(opCodeDataAddress);
+    mCpuStatus.updateSignAndZeroFlagFrom16BitValue(mA);
+}
+
+void Cpu65816::executeLDA(OpCode &opCode) {
+    if (accumulatorIs16BitWide()) {
+        executeLDA16Bit(opCode);
+        addToCycles(1);
+    } else {
+        executeLDA8Bit(opCode);
+    }
+
+    switch (opCode.getCode()) {
+        case (0xA9):                // LDA Immediate
+        {
+            if (accumulatorIs16BitWide()) {
+                addToProgramAddress(1);
+            }
+            addToProgramAddressAndCycles(2, 2);
+            break;
+        }
+        case (0xAD):                // LDA Absolute
+        {
+            addToProgramAddressAndCycles(3, 4);
+            break;
+        }
+        case (0xAF):                // LDA Absolute Long
+        {
+            addToProgramAddressAndCycles(4, 5);
+            break;
+        }
+        case (0xA5):                // LDA Direct Page
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 3);
+            break;
+        }
+        case (0xB2):                // LDA Direct Page Indirect
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 5);
+            break;
+        }
+        case (0xA7):                // LDA Direct Page Indirect Long
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 6);
+            break;
+        }
+        case (0xBD):                // LDA Absolute Indexed, X
+        {
+            if (opCodeAddressingCrossesPageBoundary(opCode)) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(3, 4);
+            break;
+        }
+        case (0xBF):                // LDA Absolute Long Indexed, X
+        {
+            addToProgramAddressAndCycles(4, 5);
+            break;
+        }
+        case (0xB9):                // LDA Absolute Indexed, Y
+        {
+            if (opCodeAddressingCrossesPageBoundary(opCode)) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(3, 4);
+            break;
+        }
+        case (0xB5):                // LDA Direct Page Indexed, X
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 4);
+            break;
+        }
+        case (0xA1):                // LDA Direct Page Indexed Indirect, X
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 6);
+            break;
+        }
+        case (0xB1):                // LDA Direct Page Indirect Indexed, Y
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            if (opCodeAddressingCrossesPageBoundary(opCode)) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 5);
+            break;
+        }
+        case (0xB7):                // LDA Direct Page DP Indirect Long Indexed, Y
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 6);
+            break;
+        }
+        case (0xA3):                // LDA Stack Relative
+        {
+            addToProgramAddressAndCycles(2, 4);
+            break;
+        }
+        case (0xB3):                // LDA Stack Relative Indirect Indexed, Y
+        {
+            addToProgramAddressAndCycles(2, 7);
+            break;
+        }
+        default:
+        {
+            LOG_UNEXPECTED_OPCODE(opCode);
+        }
+    }
+}

src/opcodes/OpCode_LDX.cpp

@@ -0,0 +1,94 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "../Cpu65816.hpp"
+
+#include <cmath>
+
+#define LOG_TAG "Cpu::executeLDX"
+
+/**
+ * This file contains implementations for all LDX OpCodes.
+ */
+
+void Cpu65816::executeLDX8Bit(OpCode &opCode) {
+    Address opCodeDataAddress = getAddressOfOpCodeData(opCode);
+    uint8_t value = mSystemBus.readByte(opCodeDataAddress);
+    Binary::setLower8BitsOf16BitsValue(&mX, value);
+    mCpuStatus.updateSignAndZeroFlagFrom8BitValue(value);
+}
+
+void Cpu65816::executeLDX16Bit(OpCode &opCode) {
+    Address opCodeDataAddress = getAddressOfOpCodeData(opCode);
+    mX = mSystemBus.readTwoBytes(opCodeDataAddress);
+    mCpuStatus.updateSignAndZeroFlagFrom16BitValue(mX);
+}
+
+void Cpu65816::executeLDX(OpCode &opCode) {
+    if (indexIs16BitWide()) {
+        executeLDX16Bit(opCode);
+        addToCycles(1);
+    } else {
+        executeLDX8Bit(opCode);
+    }
+
+    switch (opCode.getCode()) {
+        case (0xA2):                // LDX Immediate
+        {
+            if (indexIs16BitWide()) {
+                addToProgramAddress(1);
+            }
+            addToProgramAddressAndCycles(2, 2);
+            break;
+        }
+        case (0xAE):                // LDX Absolute
+        {
+            addToProgramAddressAndCycles(3, 4);
+            break;
+        }
+        case (0xA6):                // LDX Direct Page
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 3);
+            break;
+        }
+        case (0xBE):                // LDX Absolute Indexed, Y
+        {
+            if (opCodeAddressingCrossesPageBoundary(opCode)) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(3, 4);
+            break;
+        }
+        case (0xB6):                // LDX Direct Page Indexed, Y
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 4);
+            break;
+        }
+        default:
+        {
+            LOG_UNEXPECTED_OPCODE(opCode);
+        }
+    }
+}

src/opcodes/OpCode_LDY.cpp

@@ -0,0 +1,94 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "../Cpu65816.hpp"
+
+#include <cmath>
+
+#define LOG_TAG "Cpu::executeLDY"
+
+/**
+ * This file contains implementations for all LDY OpCodes.
+ */
+
+void Cpu65816::executeLDY8Bit(OpCode &opCode) {
+    Address opCodeDataAddress = getAddressOfOpCodeData(opCode);
+    uint8_t value = mSystemBus.readByte(opCodeDataAddress);
+    Binary::setLower8BitsOf16BitsValue(&mY, value);
+    mCpuStatus.updateSignAndZeroFlagFrom8BitValue(value);
+}
+
+void Cpu65816::executeLDY16Bit(OpCode &opCode) {
+    Address opCodeDataAddress = getAddressOfOpCodeData(opCode);
+    mY = mSystemBus.readTwoBytes(opCodeDataAddress);
+    mCpuStatus.updateSignAndZeroFlagFrom16BitValue(mY);
+}
+
+void Cpu65816::executeLDY(OpCode &opCode) {
+    if (indexIs16BitWide()) {
+        executeLDY16Bit(opCode);
+        addToCycles(1);
+    } else {
+        executeLDY8Bit(opCode);
+    }
+
+    switch (opCode.getCode()) {
+        case (0xA0):                // LDY Immediate
+        {
+            if (indexIs16BitWide()) {
+                addToProgramAddress(1);
+            }
+            addToProgramAddressAndCycles(2, 2);
+            break;
+        }
+        case (0xAC):                // LDY Absolute
+        {
+            addToProgramAddressAndCycles(3, 4);
+            break;
+        }
+        case (0xA4):                // LDY Direct Page
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 3);
+            break;
+        }
+        case (0xBC):                // LDY Absolute Indexed, X
+        {
+            if (opCodeAddressingCrossesPageBoundary(opCode)) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(3, 4);
+            break;
+        }
+        case (0xB4):                // LDY Direct Page Indexed, X
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 4);
+            break;
+        }
+        default:
+        {
+            LOG_UNEXPECTED_OPCODE(opCode);
+        }
+    }
+}

src/opcodes/OpCode_LSR.cpp

@@ -0,0 +1,132 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "../Cpu65816.hpp"
+
+#define LOG_TAG "Cpu::executeLSR"
+
+#define DO_LSR_8_BIT(value) {                                   \
+    bool newCarry = value & 0x01;                               \
+    value = value >> 1;                                         \
+    if (newCarry) mCpuStatus.setCarryFlag();                    \
+    else mCpuStatus.clearCarryFlag();                           \
+    mCpuStatus.updateSignAndZeroFlagFrom8BitValue(value);       \
+}
+
+#define DO_LSR_16_BIT(value) {                                  \
+    bool newCarry = value & 0x0001;                             \
+    value = value >> 1;                                         \
+    if (newCarry) mCpuStatus.setCarryFlag();                    \
+    else mCpuStatus.clearCarryFlag();                           \
+    mCpuStatus.updateSignAndZeroFlagFrom16BitValue(value);      \
+}
+
+/**
+ * This file contains implementations for all LSR OpCodes.
+ */
+
+void Cpu65816::executeMemoryLSR(OpCode &opCode) {
+    Address opCodeDataAddress = getAddressOfOpCodeData(opCode);
+
+    if(accumulatorIs8BitWide()) {
+        uint8_t value = mSystemBus.readByte(opCodeDataAddress);
+        DO_LSR_8_BIT(value);
+        mSystemBus.storeByte(opCodeDataAddress, value);
+    } else {
+        uint16_t value = mSystemBus.readTwoBytes(opCodeDataAddress);
+        DO_LSR_16_BIT(value);
+        mSystemBus.storeTwoBytes(opCodeDataAddress, value);
+    }
+}
+
+void Cpu65816::executeAccumulatorLSR(OpCode &opCode) {
+    if(accumulatorIs8BitWide()) {
+        uint8_t value = Binary::lower8BitsOf(mA);
+        DO_LSR_8_BIT(value);
+        Binary::setLower8BitsOf16BitsValue(&mA, value);
+    } else {
+        DO_LSR_16_BIT(mA);
+    }
+}
+
+void Cpu65816::executeLSR(OpCode &opCode) {
+    switch (opCode.getCode()) {
+        case (0x4A):                // LSR Accumulator
+        {
+            executeAccumulatorLSR(opCode);
+            addToProgramAddressAndCycles(1, 2);
+            break;
+        }
+        case (0x4E):                // LSR Absolute
+        {
+            executeMemoryLSR(opCode);
+            if (accumulatorIs16BitWide()) {
+                addToCycles(2);
+            }
+            addToProgramAddressAndCycles(3, 6);
+            break;
+        }
+        case (0x46):                // LSR Direct Page
+        {
+            executeMemoryLSR(opCode);
+            if (accumulatorIs16BitWide()) {
+                addToCycles(2);
+            }
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+
+            addToProgramAddressAndCycles(2, 5);
+            break;
+        }
+        case (0x5E):                // LSR Absolute Indexed, X
+        {
+            executeMemoryLSR(opCode);
+            if (accumulatorIs16BitWide()) {
+                addToCycles(2);
+            }
+
+#ifdef EMU_65C02
+            if (!opCodeAddressingCrossesPageBoundary(opCode)) {
+                subtractFromCycles(1);
+            }
+#endif
+
+            addToProgramAddressAndCycles(3, 7);
+            break;
+        }
+        case (0x56):                // LSR Direct Page Indexed, X
+        {
+            executeMemoryLSR(opCode);
+            if (accumulatorIs16BitWide()) {
+                addToCycles(2);
+            }
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+
+            addToProgramAddressAndCycles(2, 6);
+            break;
+        }
+        default:
+        {
+            LOG_UNEXPECTED_OPCODE(opCode);
+        }
+    }
+}

src/opcodes/OpCode_Misc.cpp

@@ -0,0 +1,122 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "../Cpu65816.hpp"
+
+#define LOG_TAG "Cpu::executeMisc"
+
+/**
+ * This file contains implementations for all OpCodes that didn't fall into other categories.
+ */
+
+void Cpu65816::executeMisc(OpCode &opCode) {
+    switch (opCode.getCode()) {
+        case(0xEB):     // XBA
+        {
+            uint8_t lowerA = Binary::lower8BitsOf(mA);
+            uint8_t higherA = Binary::higher8BitsOf(mA);
+            mA = higherA | (((uint16_t)(lowerA)) << 8);
+            mCpuStatus.updateSignAndZeroFlagFrom8BitValue(higherA);
+            addToProgramAddressAndCycles(1, 3);
+            break;
+        }
+        case(0xDB):     // STP
+        {
+            reset();
+            addToProgramAddress(1);
+            addToCycles(3);
+            break;
+
+        }
+        case(0xCB):     // WAI
+        {
+            setRDYPin(false);
+
+            addToProgramAddress(1);
+            addToCycles(3);
+            break;
+        }
+        case(0x42):     // WDM
+        {
+            addToProgramAddress(2);
+            addToCycles(2);
+            break;
+        }
+        case(0xEA):     // NOP
+        {
+            addToProgramAddress(1);
+            addToCycles(2);
+            break;
+        }
+        case(0x44):     // MVP
+        {
+            Address addressOfOpCodeData = getAddressOfOpCodeData(opCode);
+            uint8_t destinationBank = mSystemBus.readByte(addressOfOpCodeData);
+            addressOfOpCodeData.incrementOffsetBy(1);
+            uint8_t sourceBank = mSystemBus.readByte(addressOfOpCodeData);
+
+            Address sourceAddress(sourceBank, mX);
+            Address destinationAddress(destinationBank, mY);
+
+            while(mA != 0xFFFF) {
+                uint8_t toTransfer = mSystemBus.readByte(sourceAddress);
+                mSystemBus.storeByte(destinationAddress, toTransfer);
+
+                sourceAddress.decrementOffsetBy(1);
+                destinationAddress.decrementOffsetBy(1);
+                mA--;
+
+                addToCycles(7);
+            }
+            mDB = destinationBank;
+
+            addToProgramAddress(3);
+            break;
+        }
+        case(0x54):     // MVN
+        {
+            Address addressOfOpCodeData = getAddressOfOpCodeData(opCode);
+            uint8_t destinationBank = mSystemBus.readByte(addressOfOpCodeData);
+            addressOfOpCodeData.incrementOffsetBy(1);
+            uint8_t sourceBank = mSystemBus.readByte(addressOfOpCodeData);
+
+            Address sourceAddress(sourceBank, mX);
+            Address destinationAddress(destinationBank, mY);
+
+            while(mA != 0xFFFF) {
+                uint8_t toTransfer = mSystemBus.readByte(sourceAddress);
+                mSystemBus.storeByte(destinationAddress, toTransfer);
+
+                sourceAddress.incrementOffsetBy(1);
+                destinationAddress.incrementOffsetBy(1);
+                mA--;
+
+                addToCycles(7);
+            }
+            mDB = destinationBank;
+
+            addToProgramAddress(3);
+            break;
+        }
+        default:
+        {
+            LOG_UNEXPECTED_OPCODE(opCode);
+        }
+    }
+}

src/opcodes/OpCode_ORA.cpp

@@ -0,0 +1,168 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "../Cpu65816.hpp"
+
+#include <cmath>
+
+#define LOG_TAG "Cpu::executeORA"
+
+/**
+ * This file contains implementations for all ORA OpCodes.
+ */
+
+void Cpu65816::executeORA8Bit(OpCode &opCode) {
+    Address opCodeDataAddress = getAddressOfOpCodeData(opCode);
+    uint8_t operand = mSystemBus.readByte(opCodeDataAddress);
+    uint8_t result = Binary::lower8BitsOf(mA) | operand;
+    mCpuStatus.updateSignAndZeroFlagFrom8BitValue(result);
+    Binary::setLower8BitsOf16BitsValue(&mA, result);
+}
+
+void Cpu65816::executeORA16Bit(OpCode &opCode) {
+    Address opCodeDataAddress = getAddressOfOpCodeData(opCode);
+    uint16_t operand = mSystemBus.readTwoBytes(opCodeDataAddress);
+    uint16_t result = mA | operand;
+    mCpuStatus.updateSignAndZeroFlagFrom16BitValue(result);
+    mA = result;
+}
+
+void Cpu65816::executeORA(OpCode &opCode) {
+    if (accumulatorIs8BitWide()) {
+        executeORA8Bit(opCode);
+    } else {
+        executeORA16Bit(opCode);
+        addToCycles(1);
+    }
+
+    switch (opCode.getCode()) {
+        case (0x09):                // ORA Immediate
+        {
+            if (accumulatorIs16BitWide()) {
+                addToProgramAddress(1);
+            }
+            addToProgramAddressAndCycles(2, 2);
+            break;
+        }
+        case (0x0D):                // ORA Absolute
+        {
+            addToProgramAddressAndCycles(3, 4);
+            break;
+        }
+        case (0x0F):                // ORA Absolute Long
+        {
+            addToProgramAddressAndCycles(4, 5);
+            break;
+        }
+        case(0x05):                 // ORA Direct Page
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 3);
+            break;
+        }
+        case(0x12):                 // ORA Direct Page Indirect
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 5);
+            break;
+        }
+        case(0x07):                 // ORA Direct Page Indirect Long
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 6);
+            break;
+        }
+        case(0x1D):                 // ORA Absolute Indexed, X
+        {
+            if (opCodeAddressingCrossesPageBoundary(opCode)) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(3, 4);
+            break;
+        }
+        case(0x1F):                 // ORA Absolute Long Indexed, X
+        {
+            addToProgramAddressAndCycles(4, 5);
+            break;
+        }
+        case(0x19):                 // ORA Absolute Indexed, Y
+        {
+            if (opCodeAddressingCrossesPageBoundary(opCode)) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(3, 4);
+            break;
+        }
+        case(0x15):                 // ORA Direct Page Indexed, X
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 4);
+            break;
+        }
+        case (0x01):                // ORA Direct Page Indexed Indirect, X
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 6);
+            break;
+        }
+        case(0x11):                 // ORA Direct Page Indirect Indexed, Y
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            if (opCodeAddressingCrossesPageBoundary(opCode)) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 5);
+            break;
+        }
+        case(0x17):                 // ORA Direct Page Indirect Long Indexed, Y
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 6);
+            break;
+        }
+        case(0x03):                // ORA Stack Relative
+        {
+            addToProgramAddressAndCycles(2, 4);
+            break;
+        }
+        case(0x13):                 // ORA Stack Relative Indirect Indexed, Y
+        {
+            addToProgramAddressAndCycles(2, 7);
+            break;
+        }
+        default:
+        {
+            LOG_UNEXPECTED_OPCODE(opCode);
+        }
+    }
+}

src/opcodes/OpCode_ROL.cpp

@@ -0,0 +1,135 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "../Cpu65816.hpp"
+
+#define LOG_TAG "Cpu::executeROL"
+
+#define DO_ROL_8_BIT(value) {                                   \
+    bool carryWasSet = mCpuStatus.carryFlag();                  \
+    bool carryWillBeSet = (value & 0x80) != 0;                  \
+    value = value << 1;                                         \
+    if (carryWasSet) Binary::setBitIn8BitValue(&value, 0);      \
+    else Binary::clearBitIn8BitValue(&value, 0);                \
+    if (carryWillBeSet) mCpuStatus.setCarryFlag();              \
+    else mCpuStatus.clearCarryFlag();                           \
+    mCpuStatus.updateSignAndZeroFlagFrom16BitValue(value);      \
+}
+
+#define DO_ROL_16_BIT(value) {                                  \
+    bool carryWasSet = mCpuStatus.carryFlag();                  \
+    bool carryWillBeSet = (value & 0x8000) != 0;                \
+    value = value << 1;                                         \
+    if (carryWasSet) Binary::setBitIn16BitValue(&value, 0);     \
+    else Binary::clearBitIn16BitValue(&value, 0);               \
+    if (carryWillBeSet) mCpuStatus.setCarryFlag();              \
+    else mCpuStatus.clearCarryFlag();                           \
+    mCpuStatus.updateSignAndZeroFlagFrom16BitValue(value);      \
+}
+
+/**
+ * This file contains implementations for all ROL OpCodes.
+ */
+void Cpu65816::executeMemoryROL(OpCode &opCode) {
+    Address opCodeDataAddress = getAddressOfOpCodeData(opCode);
+
+    if(accumulatorIs8BitWide()) {
+        uint8_t value = mSystemBus.readByte(opCodeDataAddress);
+        DO_ROL_8_BIT(value);
+        mSystemBus.storeByte(opCodeDataAddress, value);
+    } else {
+        uint16_t value = mSystemBus.readTwoBytes(opCodeDataAddress);
+        DO_ROL_16_BIT(value);
+        mSystemBus.storeTwoBytes(opCodeDataAddress, value);
+    }
+}
+
+void Cpu65816::executeAccumulatorROL(OpCode &opCode) {
+    if(accumulatorIs8BitWide()) {
+        uint8_t value = Binary::lower8BitsOf(mA);
+        DO_ROL_8_BIT(value);
+        Binary::setLower8BitsOf16BitsValue(&mA, value);
+    } else {
+        uint16_t value = mA;
+        DO_ROL_16_BIT(value);
+        mA = value;
+    }
+}
+
+void Cpu65816::executeROL(OpCode &opCode) {
+    switch (opCode.getCode()) {
+        case (0x2A):                // ROL accumulator
+        {
+            executeAccumulatorROL(opCode);
+            addToProgramAddressAndCycles(1, 2);
+            break;
+        }
+        case (0x2E):                // ROL #addr
+        {
+            executeMemoryROL(opCode);
+            if (accumulatorIs8BitWide()) {
+                addToProgramAddressAndCycles(3, 6);
+            } else {
+                addToProgramAddressAndCycles(3, 8);
+            }
+            break;
+        }
+        case (0x26):                // ROL Direct Page
+        {
+            executeMemoryROL(opCode);
+            int opCycles = Binary::lower8BitsOf(mD) != 0 ? 1 : 0;
+            if (accumulatorIs8BitWide()) {
+                addToProgramAddressAndCycles(2, 5+opCycles);
+            } else {
+                addToProgramAddressAndCycles(2, 7+opCycles);
+            }
+            break;
+        }
+        case (0x3E):                // ROL Absolute Indexed, X
+        {
+            executeMemoryROL(opCode);
+#ifdef EMU_65C02
+            short opCycles = opCodeAddressingCrossesPageBoundary(opCode) ? 0 : -1;
+#else
+            short opCycles = 0;
+#endif
+            if (accumulatorIs8BitWide()) {
+                addToProgramAddressAndCycles(3, 7+opCycles);
+            } else {
+                addToProgramAddressAndCycles(3, 9+opCycles);
+            }
+            break;
+        }
+        case (0x36):                // ROL Direct Page Indexed, X
+        {
+            executeMemoryROL(opCode);
+            int opCycles = Binary::lower8BitsOf(mD) != 0 ? 1 : 0;
+            if (accumulatorIs8BitWide()) {
+                addToProgramAddressAndCycles(2, 6+opCycles);
+            } else {
+                addToProgramAddressAndCycles(2, 8+opCycles);
+            }
+            break;
+        }
+        default:
+        {
+            LOG_UNEXPECTED_OPCODE(opCode);
+        }
+    }
+}

src/opcodes/OpCode_ROR.cpp

@@ -0,0 +1,135 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "../Cpu65816.hpp"
+
+#define LOG_TAG "Cpu::executeROR"
+
+#define DO_ROR_8_BIT(value) {                                   \
+    bool carryWasSet = mCpuStatus.carryFlag();                  \
+    bool carryWillBeSet = (value & 0x01) != 0;                  \
+    value = value >> 1;                                         \
+    if (carryWasSet) Binary::setBitIn8BitValue(&value, 7);      \
+    else Binary::clearBitIn8BitValue(&value, 7);                \
+    if (carryWillBeSet) mCpuStatus.setCarryFlag();              \
+    else mCpuStatus.clearCarryFlag();                           \
+    mCpuStatus.updateSignAndZeroFlagFrom8BitValue(value);       \
+}
+
+#define DO_ROR_16_BIT(value) {                                  \
+    bool carryWasSet = mCpuStatus.carryFlag();                  \
+    bool carryWillBeSet = (value & 0x0001) != 0;                \
+    value = value >> 1;                                         \
+    if (carryWasSet) Binary::setBitIn16BitValue(&value, 15);    \
+    else Binary::clearBitIn16BitValue(&value, 15);              \
+    if (carryWillBeSet) mCpuStatus.setCarryFlag();              \
+    else mCpuStatus.clearCarryFlag();                           \
+    mCpuStatus.updateSignAndZeroFlagFrom16BitValue(value);      \
+}
+
+/**
+ * This file contains implementations for all ROR OpCodes.
+ */
+void Cpu65816::executeMemoryROR(OpCode &opCode) {
+    Address opCodeDataAddress = getAddressOfOpCodeData(opCode);
+
+    if(accumulatorIs8BitWide()) {
+        uint8_t value = mSystemBus.readByte(opCodeDataAddress);
+        DO_ROR_8_BIT(value);
+        mSystemBus.storeByte(opCodeDataAddress, value);
+    } else {
+        uint16_t value = mSystemBus.readTwoBytes(opCodeDataAddress);
+        DO_ROR_16_BIT(value);
+        mSystemBus.storeTwoBytes(opCodeDataAddress, value);
+    }
+}
+
+void Cpu65816::executeAccumulatorROR(OpCode &opCode) {
+    if(accumulatorIs8BitWide()) {
+        uint8_t value = Binary::lower8BitsOf(mA);
+        DO_ROR_8_BIT(value);
+        Binary::setLower8BitsOf16BitsValue(&mA, value);
+    } else {
+        uint16_t value = mA;
+        DO_ROR_16_BIT(value);
+        mA = value;
+    }
+}
+
+void Cpu65816::executeROR(OpCode &opCode) {
+    switch (opCode.getCode()) {
+        case (0x6A):                // ROR accumulator
+        {
+            executeAccumulatorROR(opCode);
+            addToProgramAddressAndCycles(1, 2);
+            break;
+        }
+        case (0x6E):                // ROR #addr
+        {
+            executeMemoryROR(opCode);
+            if (accumulatorIs8BitWide()) {
+                addToProgramAddressAndCycles(3, 6);
+            } else {
+                addToProgramAddressAndCycles(3, 8);
+            }
+            break;
+        }
+        case (0x66):                // ROR Direct Page
+        {
+            executeMemoryROR(opCode);
+            int opCycles = Binary::lower8BitsOf(mD) != 0 ? 1 : 0;
+            if (accumulatorIs8BitWide()) {
+                addToProgramAddressAndCycles(2, 5+opCycles);
+            } else {
+                addToProgramAddressAndCycles(2, 7+opCycles);
+            }
+            break;
+        }
+        case (0x7E):                // ROR Absolute Indexed, X
+        {
+            executeMemoryROR(opCode);
+#ifdef EMU_65C02
+            short opCycles = opCodeAddressingCrossesPageBoundary(opCode) ? 0 : -1;
+#else
+            short opCycles = 0;
+#endif
+            if (accumulatorIs8BitWide()) {
+                addToProgramAddressAndCycles(3, 7+opCycles);
+            } else {
+                addToProgramAddressAndCycles(3, 9+opCycles);
+            }
+            break;
+        }
+        case (0x76):                // ROR Direct Page Indexed, X
+        {
+            executeMemoryROR(opCode);
+            int opCycles = Binary::lower8BitsOf(mD) != 0 ? 1 : 0;
+            if (accumulatorIs8BitWide()) {
+                addToProgramAddressAndCycles(2, 6+opCycles);
+            } else {
+                addToProgramAddressAndCycles(2, 8+opCycles);
+            }
+            break;
+        }
+        default:
+        {
+            LOG_UNEXPECTED_OPCODE(opCode);
+        }
+    }
+}

src/opcodes/OpCode_SBC.cpp

@@ -0,0 +1,272 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "../Cpu65816.hpp"
+
+#define LOG_TAG "Cpu::executeSBC"
+
+/**
+ * This file contains the implementation for all SBC OpCodes.
+ */
+
+void Cpu65816::execute8BitSBC(OpCode &opCode) {
+    Address dataAddress = getAddressOfOpCodeData(opCode);
+    uint8_t value = mSystemBus.readByte(dataAddress);
+    uint8_t accumulator = Binary::lower8BitsOf(mA);
+    bool borrow = !mCpuStatus.carryFlag();
+
+    uint16_t result16Bit = accumulator - value - (borrow ? 1 : 0);
+
+    // Is there a borrow from the penultimate bit, redo the diff with 7 bits value and find out.
+    accumulator &= 0x7F;
+    value &= 0x7F;
+    uint8_t partialResult = accumulator - value - (borrow ? 1 : 0);
+    // Is bit 8 set?
+    bool borrowFromPenultimateBit = partialResult & 0x80;
+
+    // Is there a borrow from the last bit, check bit 8 for that
+    bool borrowFromLastBit = result16Bit & 0x0100;
+
+    bool overflow = borrowFromLastBit ^ borrowFromPenultimateBit;
+    if (overflow) mCpuStatus.setOverflowFlag();
+    else mCpuStatus.clearOverflowFlag();
+
+    if (borrowFromLastBit) mCpuStatus.clearCarryFlag();
+    else mCpuStatus.setCarryFlag();
+
+    uint8_t result8Bit = Binary::lower8BitsOf(result16Bit);
+    // Update sign and zero flags
+    mCpuStatus.updateSignAndZeroFlagFrom8BitValue(result8Bit);
+    // Store the 8 bit result in the accumulator
+    Binary::setLower8BitsOf16BitsValue(&mA, result8Bit);
+}
+
+void Cpu65816::execute16BitSBC(OpCode &opCode) {
+    Address dataAddress = getAddressOfOpCodeData(opCode);
+    uint16_t value = mSystemBus.readTwoBytes(dataAddress);
+    uint16_t accumulator = mA;
+    bool borrow = !mCpuStatus.carryFlag();
+
+    uint32_t result32Bit = accumulator - value - (borrow ? 1 : 0);
+
+    // Is there a borrow from the penultimate bit, redo the diff with 15 bits value and find out.
+    accumulator &= 0x7FFF;
+    value &= 0x7FFF;
+    uint16_t partialResult = accumulator - value - (borrow ? 1 : 0);
+    // Is bit 15 set?
+    bool borrowFromPenultimateBit = partialResult & 0x80;
+
+    // Is there a borrow from the last bit, check bit 16 for that
+    bool borrowFromLastBit = result32Bit & 0x0100;
+
+    bool overflow = borrowFromLastBit ^ borrowFromPenultimateBit;
+    if (overflow) mCpuStatus.setOverflowFlag();
+    else mCpuStatus.clearOverflowFlag();
+
+    if (borrowFromLastBit) mCpuStatus.clearCarryFlag();
+    else mCpuStatus.setCarryFlag();
+
+    uint16_t result16Bit = Binary::lower8BitsOf(result32Bit);
+    // Update sign and zero flags
+    mCpuStatus.updateSignAndZeroFlagFrom8BitValue(result16Bit);
+    // Store the 8 bit result in the accumulator
+    mA = result16Bit;
+}
+
+void Cpu65816::execute8BitBCDSBC(OpCode &opCode) {
+    Address dataAddress = getAddressOfOpCodeData(opCode);
+    uint8_t value = mSystemBus.readByte(dataAddress);
+    uint8_t accumulator = Binary::lower8BitsOf(mA);
+
+    uint8_t result = 0;
+    bool borrow = Binary::bcdSubtract8Bit(value, accumulator, &result, !mCpuStatus.carryFlag());
+    if (borrow) mCpuStatus.clearCarryFlag();
+    else mCpuStatus.setCarryFlag();
+
+    Binary::setLower8BitsOf16BitsValue(&mA, result);
+    mCpuStatus.updateSignAndZeroFlagFrom8BitValue(result);
+}
+
+void Cpu65816::execute16BitBCDSBC(OpCode &opCode) {
+    Address dataAddress = getAddressOfOpCodeData(opCode);
+    uint16_t value = mSystemBus.readTwoBytes(dataAddress);
+    uint16_t accumulator = mA;
+
+    uint16_t result = 0;
+    bool borrow = Binary::bcdSubtract16Bit(value, accumulator, &result, !mCpuStatus.carryFlag());
+    if (borrow) mCpuStatus.clearCarryFlag();
+    else mCpuStatus.setCarryFlag();
+
+    mA = result;
+    mCpuStatus.updateSignAndZeroFlagFrom8BitValue(result);
+}
+
+void Cpu65816::executeSBC(OpCode &opCode) {
+    if (accumulatorIs8BitWide()) {
+        if (mCpuStatus.decimalFlag()) execute8BitBCDSBC(opCode);
+        else execute8BitSBC(opCode);
+    } else {
+        if (mCpuStatus.decimalFlag()) execute16BitBCDSBC(opCode);
+        else execute16BitSBC(opCode);
+        addToCycles(1);
+    }
+
+// All OpCodes take one more cycle on 65C02 in decimal mode
+#ifdef EMU_65C02
+    if (mCpuStatus.decimalFlag()) {
+        addToCycles(1);
+    }
+#endif
+
+    switch (opCode.getCode()) {
+        case(0xE9):                 // SBC Immediate
+        {
+            if (accumulatorIs16BitWide()) {
+                addToProgramAddress(1);
+            }
+            addToProgramAddress(2);
+            addToCycles(2);
+            break;
+        }
+        case(0xED):                 // SBC Absolute
+        {
+            addToProgramAddress(3);
+            addToCycles(4);
+            break;
+        }
+        case(0xEF):                 // SBC Absolute Long
+        {
+            addToProgramAddress(4);
+            addToCycles(5);
+            break;
+        }
+        case(0xE5):                 // SBC Direct Page
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+
+            addToProgramAddress(2);
+            addToCycles(3);
+            break;
+        }
+        case(0xF2):                 // SBC Direct Page Indirect
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+
+            addToProgramAddress(2);
+            addToCycles(5);
+            break;
+        }
+        case(0xE7):                 // SBC Direct Page Indirect Long
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+
+            addToProgramAddress(2);
+            addToCycles(6);
+            break;
+        }
+        case(0xFD):                 // SBC Absolute Indexed, X
+        {
+            if (opCodeAddressingCrossesPageBoundary(opCode)) {
+                addToCycles(1);
+            }
+
+            addToProgramAddress(3);
+            addToCycles(4);
+            break;
+        }
+        case(0xFF):                 // SBC Absolute Long Indexed, X
+        {
+            addToProgramAddress(4);
+            addToCycles(5);
+            break;
+        }
+        case(0xF9):                 // SBC Absolute Indexed Y
+        {
+            if (opCodeAddressingCrossesPageBoundary(opCode)) {
+                addToCycles(1);
+            }
+            addToProgramAddress(3);
+            addToCycles(4);
+            break;
+        }
+        case(0xF5):                 // SBC Direct Page Indexed, X
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            if (opCodeAddressingCrossesPageBoundary(opCode)) {
+                addToCycles(1);
+            }
+            addToProgramAddress(2);
+            addToCycles(4);
+            break;
+        }
+        case(0xE1):                 // SBC Direct Page Indexed Indirect, X
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddress(2);
+            addToCycles(6);
+            break;
+        }
+        case(0xF1):                 // SBC Direct Page Indirect Indexed, Y
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            if (opCodeAddressingCrossesPageBoundary(opCode)) {
+                addToCycles(1);
+            }
+            addToProgramAddress(2);
+            addToCycles(5);
+            break;
+        }
+        case(0xF7):                 // SBC Direct Page Indirect Long Indexed, Y
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddress(2);
+            addToCycles(6);
+            break;
+        }
+        case(0xE3):                 // SBC Stack Relative
+        {
+            addToProgramAddress(2);
+            addToCycles(4);
+            break;
+        }
+        case(0xF3):                 // SBC Stack Relative Indirect Indexed, Y
+        {
+            addToProgramAddress(2);
+            addToCycles(7);
+            break;
+        }
+        default: {
+            LOG_UNEXPECTED_OPCODE(opCode);
+        }
+    }
+}

src/opcodes/OpCode_STA.cpp

@@ -0,0 +1,155 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "../Cpu65816.hpp"
+
+#define LOG_TAG "Cpu::executeSTA"
+
+/**
+ * This file contains the implementation for all STA OpCodes.
+ */
+
+void Cpu65816::executeSTA(OpCode &opCode) {
+
+    Address dataAddress = getAddressOfOpCodeData(opCode);
+    if (accumulatorIs8BitWide()) {
+        mSystemBus.storeByte(dataAddress, Binary::lower8BitsOf(mA));
+    } else {
+        mSystemBus.storeTwoBytes(dataAddress, mA);
+        addToCycles(1);
+    }
+
+    switch (opCode.getCode()) {
+        case(0x8D):  // STA Absolute
+        {
+            addToProgramAddress(3);
+            addToCycles(4);
+            break;
+        }
+        case(0x8F):  // STA Absolute Long
+        {
+            addToProgramAddress(4);
+            addToCycles(5);
+            break;
+        }
+        case(0x85):  // STA Direct Page
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+
+            addToProgramAddress(2);
+            addToCycles(3);
+            break;
+        }
+        case(0x92):  // STA Direct Page Indirect
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+
+            addToProgramAddress(2);
+            addToCycles(5);
+            break;
+        }
+        case(0x87):  // STA Direct Page Indirect Long
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+
+            addToProgramAddress(2);
+            addToCycles(6);
+            break;
+        }
+        case(0x9D):  // STA Absolute Indexed, X
+        {
+            addToProgramAddress(3);
+            addToCycles(5);
+            break;
+        }
+        case(0x9F):  // STA Absolute Long Indexed, X
+        {
+            addToProgramAddress(4);
+            addToCycles(5);
+            break;
+        }
+        case(0x99):  // STA Absolute Indexed, Y
+        {
+            addToProgramAddress(3);
+            addToCycles(5);
+            break;
+        }
+        case(0x95):  // STA Direct Page Indexed, X
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+
+            addToProgramAddress(2);
+            addToCycles(4);
+            break;
+        }
+        case(0x81):  // STA Direct Page Indexed Indirect, X
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+
+            addToProgramAddress(2);
+            addToCycles(6);
+            break;
+        }
+        case(0x91):  // STA Direct Page Indirect Indexed, Y
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+
+            addToProgramAddress(2);
+            addToCycles(6);
+            break;
+        }
+        case(0x97):  // STA Direct Page Indirect Long Indexed, Y
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+
+            addToProgramAddress(2);
+            addToCycles(6);
+            break;
+        }
+        case(0x83):  // STA Stack Relative
+        {
+            addToProgramAddress(2);
+            addToCycles(4);
+            break;
+        }
+        case(0x93):  // STA Stack Relative Indirect Indexed, Y
+        {
+            addToProgramAddress(2);
+            addToCycles(7);
+            break;
+        }
+        default: {
+            LOG_UNEXPECTED_OPCODE(opCode);
+        }
+    }
+}

src/opcodes/OpCode_STX.cpp

@@ -0,0 +1,68 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "../Cpu65816.hpp"
+
+#define LOG_TAG "Cpu::executeSTX"
+
+/**
+ * This file contains the implementation for all STX OpCodes.
+ */
+
+void Cpu65816::executeSTX(OpCode &opCode) {
+    Address dataAddress = getAddressOfOpCodeData(opCode);
+    if (accumulatorIs8BitWide()) {
+        mSystemBus.storeByte(dataAddress, Binary::lower8BitsOf(mX));
+    } else {
+        mSystemBus.storeTwoBytes(dataAddress, mX);
+        addToCycles(1);
+    }
+
+    switch (opCode.getCode()) {
+        case(0x8E):  // STX Absolute
+        {
+            addToProgramAddress(3);
+            addToCycles(4);
+            break;
+        }
+        case(0x86):  // STX Direct Page
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+
+            addToProgramAddress(2);
+            addToCycles(3);
+            break;
+        }
+        case(0x96):  // STX Direct Page Indexed, Y
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+
+            addToProgramAddress(2);
+            addToCycles(4);
+            break;
+        }
+        default: {
+            LOG_UNEXPECTED_OPCODE(opCode);
+        }
+    }
+}

src/opcodes/OpCode_STY.cpp

@@ -0,0 +1,68 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "../Cpu65816.hpp"
+
+#define LOG_TAG "Cpu::executeSTY"
+
+/**
+ * This file contains the implementation for all STY OpCodes.
+ */
+
+void Cpu65816::executeSTY(OpCode &opCode) {
+    Address dataAddress = getAddressOfOpCodeData(opCode);
+    if (accumulatorIs8BitWide()) {
+        mSystemBus.storeByte(dataAddress, Binary::lower8BitsOf(mY));
+    } else {
+        mSystemBus.storeTwoBytes(dataAddress, mY);
+        addToCycles(1);
+    }
+
+    switch (opCode.getCode()) {
+        case(0x8C):  // STY Absolute
+        {
+            addToProgramAddress(3);
+            addToCycles(4);
+            break;
+        }
+        case(0x84):  // STY Direct Page
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+
+            addToProgramAddress(2);
+            addToCycles(3);
+            break;
+        }
+        case(0x94):  // STY Direct Page Indexed, X
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+
+            addToProgramAddress(2);
+            addToCycles(4);
+            break;
+        }
+        default: {
+            LOG_UNEXPECTED_OPCODE(opCode);
+        }
+    }
+}

src/opcodes/OpCode_STZ.cpp

@@ -0,0 +1,74 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "../Cpu65816.hpp"
+
+#define LOG_TAG "Cpu::executeSTZ"
+
+/**
+ * This file contains the implementation for all STZ OpCodes.
+ */
+
+void Cpu65816::executeSTZ(OpCode &opCode) {
+    Address dataAddress = getAddressOfOpCodeData(opCode);
+    if (accumulatorIs8BitWide()) {
+        mSystemBus.storeByte(dataAddress, 0x00);
+    } else {
+        mSystemBus.storeTwoBytes(dataAddress, 0x0000);
+        addToCycles(1);
+    }
+
+    switch (opCode.getCode()) {
+        case(0x9C):  // STZ Absolute
+        {
+            addToProgramAddress(3);
+            addToCycles(4);
+            break;
+        }
+        case(0x64):  // STZ Direct Page
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+
+            addToProgramAddress(2);
+            addToCycles(3);
+            break;
+        }
+        case(0x9E):  // STZ Absolute Indexed, X
+        {
+            addToProgramAddress(3);
+            addToCycles(5);
+            break;
+        }
+        case(0x74):  // STZ Direct Page Indexed, X
+        {
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+
+            addToProgramAddress(2);
+            addToCycles(4);
+            break;
+        }
+        default: {
+            LOG_UNEXPECTED_OPCODE(opCode);
+        }
+    }
+}

src/opcodes/OpCode_Stack.cpp

@@ -0,0 +1,177 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "../Cpu65816.hpp"
+
+#define LOG_TAG "Cpu::executeStack"
+
+/**
+ * This file contains the implementation for every stack related OpCode.
+ */
+void Cpu65816::executeStack(OpCode &opCode) {
+    Address opCodeDataAddress = getAddressOfOpCodeData(opCode);
+    switch (opCode.getCode()) {
+        case 0xF4:                  // PEA
+        {
+            uint16_t operand = mSystemBus.readTwoBytes(opCodeDataAddress);
+            mStack.push16Bit(operand);
+            addToProgramAddressAndCycles(3, 5);
+            break;
+        }
+        case 0xD4:                  // PEI
+        {
+            uint16_t operand = mSystemBus.readTwoBytes(opCodeDataAddress);
+            mStack.push16Bit(operand);
+            int opCycles = Binary::lower8BitsOf(mD) != 0 ? 1 : 0;
+            addToProgramAddressAndCycles(2, 6+opCycles);
+            break;
+        }
+        case 0x62:                  // PER
+        {
+            int opCodeSize = 3;
+            uint16_t operand = mSystemBus.readTwoBytes(opCodeDataAddress);
+            uint16_t sum = operand + opCodeSize + mProgramAddress.getOffset();
+            mStack.push16Bit(sum);
+            addToProgramAddressAndCycles(3, 6);
+            break;
+        }
+        case(0x48):                 // PHA
+        {
+            if (accumulatorIs8BitWide()) {
+                mStack.push8Bit(Binary::lower8BitsOf(mA));
+                addToProgramAddressAndCycles(1, 4);
+            } else {
+                mStack.push16Bit(mA);
+                addToProgramAddressAndCycles(1, 3);
+            }
+            break;
+        }
+        case(0x8B):                 // PHB
+        {
+            mStack.push8Bit(mDB);
+            addToProgramAddressAndCycles(1, 3);
+            break;
+        }
+        case(0x0B):                 // PHD
+        {
+            mStack.push16Bit(mD);
+            addToProgramAddressAndCycles(1, 4);
+            break;
+        }
+        case(0x4B):                 // PHK
+        {
+            mStack.push8Bit(mProgramAddress.getBank());
+            addToProgramAddressAndCycles(1, 3);
+            break;
+        }
+        case(0x08):                 // PHP
+        {
+            mStack.push8Bit(mCpuStatus.getRegisterValue());
+            addToProgramAddressAndCycles(1, 3);
+            break;
+        }
+        case(0xDA):                 // PHX
+        {
+            if (indexIs8BitWide()) {
+                mStack.push8Bit(Binary::lower8BitsOf(mX));
+                addToProgramAddressAndCycles(1, 3);
+            } else {
+                mStack.push16Bit(mX);
+                addToProgramAddressAndCycles(1, 4);
+            }
+            break;
+        }
+        case(0x5A):                 // PHY
+        {
+            if (indexIs8BitWide()) {
+                mStack.push8Bit(Binary::lower8BitsOf(mY));
+                addToProgramAddressAndCycles(1, 3);
+            } else {
+                mStack.push16Bit(mY);
+                addToProgramAddressAndCycles(1, 4);
+            }
+            break;
+        }
+        case(0x68):                 // PLA
+        {
+            if (accumulatorIs8BitWide()) {
+                Binary::setLower8BitsOf16BitsValue(&mA, mStack.pull8Bit());
+                mCpuStatus.updateSignAndZeroFlagFrom8BitValue(mA);
+                addToProgramAddressAndCycles(1, 4);
+            } else {
+                mA = mStack.pull16Bit();
+                mCpuStatus.updateSignAndZeroFlagFrom16BitValue(mA);
+                addToProgramAddressAndCycles(1, 5);
+            }
+            break;
+        }
+        case(0xAB):                 // PLB
+        {
+            mDB = mStack.pull8Bit();
+            mCpuStatus.updateSignAndZeroFlagFrom8BitValue(mDB);
+            addToProgramAddressAndCycles(1, 4);
+            break;
+        }
+        case(0x2B):                 // PLD
+        {
+            mD = mStack.pull16Bit();
+            mCpuStatus.updateSignAndZeroFlagFrom16BitValue(mD);
+            addToProgramAddressAndCycles(1, 5);
+            break;
+        }
+        case(0x28):                 // PLP
+        {
+            mCpuStatus.setRegisterValue(mStack.pull8Bit());
+            addToProgramAddressAndCycles(1, 4);
+            break;
+        }
+        case(0xFA):                 // PLX
+        {
+            if (indexIs8BitWide()) {
+                uint8_t value = mStack.pull8Bit();
+                Binary::setLower8BitsOf16BitsValue(&mX, value);
+                mCpuStatus.updateSignAndZeroFlagFrom8BitValue(value);
+                addToProgramAddressAndCycles(1, 4);
+            } else {
+                mX = mStack.pull16Bit();
+                mCpuStatus.updateSignAndZeroFlagFrom16BitValue(mX);
+                addToProgramAddressAndCycles(1, 5);
+            }
+            break;
+        }
+        case(0x7A):                 // PLY
+        {
+            if (indexIs8BitWide()) {
+                uint8_t value = mStack.pull8Bit();
+                Binary::setLower8BitsOf16BitsValue(&mY, value);
+                mCpuStatus.updateSignAndZeroFlagFrom8BitValue(value);
+                addToProgramAddressAndCycles(1, 4);
+            } else {
+                mY = mStack.pull16Bit();
+                mCpuStatus.updateSignAndZeroFlagFrom16BitValue(mY);
+                addToProgramAddressAndCycles(1, 5);
+            }
+            break;
+        }
+        default:
+        {
+            LOG_UNEXPECTED_OPCODE(opCode);
+        }
+    }
+}

src/opcodes/OpCode_StatusReg.cpp

@@ -0,0 +1,126 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "../Cpu65816.hpp"
+
+#define LOG_TAG "Cpu::executeStatusReg"
+
+/**
+ * This file contains the implementation for all OpCodes
+ * that deal directly with the status register.
+ */
+
+void Cpu65816::executeStatusReg(OpCode &opCode) {
+    switch (opCode.getCode()) {
+        case(0xC2):  // REP #const
+        {
+            uint8_t value = mSystemBus.readByte(getAddressOfOpCodeData(opCode));
+            uint8_t statusByte = mCpuStatus.getRegisterValue();
+            mCpuStatus.setRegisterValue(statusByte & ~value);
+            addToProgramAddressAndCycles(2, 3);
+            break;
+        }
+        case(0x38):  // SEC
+        {
+            mCpuStatus.setCarryFlag();
+            addToProgramAddressAndCycles(1, 2);
+            break;
+        }
+        case(0xF8):  // SED
+        {
+            mCpuStatus.setDecimalFlag();
+            addToProgramAddressAndCycles(1, 2);
+            break;
+        }
+        case(0x78):  // SEI
+        {
+            mCpuStatus.setInterruptDisableFlag();
+            addToProgramAddressAndCycles(1, 2);
+            break;
+        }
+        case(0x58):  // CLI
+        {
+            mCpuStatus.clearInterruptDisableFlag();
+            addToProgramAddressAndCycles(1, 2);
+            break;
+        }
+        case(0xE2):  // SEP
+        {
+            uint8_t value = mSystemBus.readByte(getAddressOfOpCodeData(opCode));
+            if (mCpuStatus.emulationFlag()) {
+                // In emulation mode status bits 4 and 5 are not affected
+                // 0xCF = 11001111
+                value &= 0xCF;
+            }
+            uint8_t statusReg = mCpuStatus.getRegisterValue();
+            statusReg |= value;
+            mCpuStatus.setRegisterValue(statusReg);
+
+            addToProgramAddressAndCycles(2, 3);
+            break;
+        }
+        case(0x18):  // CLC
+        {
+            mCpuStatus.clearCarryFlag();
+            addToProgramAddressAndCycles(1, 2);
+            break;
+        }
+        case(0xD8):  // CLD
+        {
+            mCpuStatus.clearDecimalFlag();
+            addToProgramAddressAndCycles(1, 2);
+            break;
+        }
+        case(0xB8):  // CLV
+        {
+            mCpuStatus.clearOverflowFlag();
+            addToProgramAddressAndCycles(1, 2);
+            break;
+        }
+        case(0xFB):  // XCE
+        {
+            bool oldCarry = mCpuStatus.carryFlag();
+            bool oldEmulation = mCpuStatus.emulationFlag();
+            if (oldCarry) mCpuStatus.setEmulationFlag();
+            else mCpuStatus.clearEmulationFlag();
+            if (oldEmulation) mCpuStatus.setCarryFlag();
+            else mCpuStatus.clearCarryFlag();
+
+            mX &= 0xFF;
+            mY &= 0xFF;
+
+            if (mCpuStatus.emulationFlag()) {
+                mCpuStatus.setAccumulatorWidthFlag();
+                mCpuStatus.setIndexWidthFlag();
+            } else {
+                mCpuStatus.clearAccumulatorWidthFlag();
+                mCpuStatus.clearIndexWidthFlag();
+            }
+
+            // New stack
+            mStack = Stack(&mSystemBus);
+
+            addToProgramAddressAndCycles(1,2);
+            break;
+        }
+        default: {
+            LOG_UNEXPECTED_OPCODE(opCode);
+        }
+    }
+}

src/opcodes/OpCode_TSB_TRB.cpp

@@ -0,0 +1,127 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "../Interrupt.hpp"
+#include "../Cpu65816.hpp"
+
+#define LOG_TAG "Cpu::executeTSBTRB"
+
+/**
+ * This file contains the implementation for TSB and TRB OpCodes
+ */
+
+void Cpu65816::execute8BitTSB(OpCode &opCode) {
+    const Address addressOfOpCodeData = getAddressOfOpCodeData(opCode);
+    uint8_t value = mSystemBus.readByte(addressOfOpCodeData);
+    uint8_t lowerA = Binary::lower8BitsOf(mA);
+    const uint8_t result = value | lowerA;
+    mSystemBus.storeByte(addressOfOpCodeData, result);
+
+    if ((value & lowerA) == 0) mCpuStatus.setZeroFlag();
+    else mCpuStatus.clearZeroFlag();
+}
+
+void Cpu65816::execute16BitTSB(OpCode &opCode) {
+    const Address addressOfOpCodeData = getAddressOfOpCodeData(opCode);
+    uint16_t value = mSystemBus.readTwoBytes(addressOfOpCodeData);
+    const uint16_t result = value | mA;
+    mSystemBus.storeTwoBytes(addressOfOpCodeData, result);
+
+    if ((value & mA) == 0) mCpuStatus.setZeroFlag();
+    else mCpuStatus.clearZeroFlag();
+}
+
+void Cpu65816::execute8BitTRB(OpCode &opCode) {
+    const Address addressOfOpCodeData = getAddressOfOpCodeData(opCode);
+    uint8_t value = mSystemBus.readByte(addressOfOpCodeData);
+    uint8_t lowerA = Binary::lower8BitsOf(mA);
+    const uint8_t result = value & ~lowerA;
+    mSystemBus.storeByte(addressOfOpCodeData, result);
+
+    if ((value & lowerA) == 0) mCpuStatus.setZeroFlag();
+    else mCpuStatus.clearZeroFlag();
+}
+
+void Cpu65816::execute16BitTRB(OpCode &opCode) {
+    const Address addressOfOpCodeData = getAddressOfOpCodeData(opCode);
+    uint16_t value = mSystemBus.readTwoBytes(addressOfOpCodeData);
+    const uint16_t result = value & ~mA;
+    mSystemBus.storeTwoBytes(addressOfOpCodeData, result);
+
+    if ((value & mA) == 0) mCpuStatus.setZeroFlag();
+    else mCpuStatus.clearZeroFlag();
+}
+
+void Cpu65816::executeTSBTRB(OpCode &opCode) {
+    switch (opCode.getCode()) {
+        case(0x0C):                 // TSB Absolute
+        {
+            if (accumulatorIs8BitWide()) {
+                execute8BitTSB(opCode);
+            } else {
+                execute16BitTSB(opCode);
+                addToCycles(2);
+            }
+            addToProgramAddressAndCycles(3, 6);
+            break;
+        }
+        case(0x04):                 // TSB Direct Page
+        {
+            if (accumulatorIs8BitWide()) {
+                execute8BitTSB(opCode);
+            } else {
+                execute16BitTSB(opCode);
+                addToCycles(2);
+            }
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 5);
+            break;
+        }
+        case(0x1C):                 // TRB Absolute
+        {
+            if (accumulatorIs8BitWide()) {
+                execute8BitTRB(opCode);
+            } else {
+                execute16BitTRB(opCode);
+                addToCycles(2);
+            }
+            addToProgramAddressAndCycles(3, 6);
+            break;
+        }
+        case(0x14):                 // TRB Direct Page
+        {
+            if (accumulatorIs8BitWide()) {
+                execute8BitTRB(opCode);
+            } else {
+                execute16BitTRB(opCode);
+                addToCycles(2);
+            }
+            if (Binary::lower8BitsOf(mD) != 0) {
+                addToCycles(1);
+            }
+            addToProgramAddressAndCycles(2, 5);
+            break;
+        }
+        default: {
+            LOG_UNEXPECTED_OPCODE(opCode);
+        }
+    }
+}

src/opcodes/OpCode_Transfer.cpp

@@ -0,0 +1,197 @@
+/*
+ * This file is part of the 65816 Emulator Library.
+ * Copyright (c) 2018 Francesco Rigoni.
+ *
+ * https://github.com/FrancescoRigoni/Lib65816
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, version 3.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "../Cpu65816.hpp"
+
+#define LOG_TAG "Cpu::executeTransfer"
+
+/**
+ * This file contains the implementation for transfer OpCodes.
+ * These are OpCodes which transfer one register value to another.
+ */
+
+void Cpu65816::executeTransfer(OpCode &opCode) {
+    switch (opCode.getCode()) {
+        case(0xA8):  // TAY
+        {
+            if ( (accumulatorIs8BitWide() && indexIs8BitWide()) ||
+                 (accumulatorIs16BitWide() && indexIs8BitWide()) ) {
+                uint8_t lower8BitsOfA = Binary::lower8BitsOf(mA);
+                Binary::setLower8BitsOf16BitsValue(&mY, lower8BitsOfA);
+                mCpuStatus.updateSignAndZeroFlagFrom8BitValue(lower8BitsOfA);
+            } else {
+                mY = mA;
+                mCpuStatus.updateSignAndZeroFlagFrom16BitValue(mA);
+            }
+            addToProgramAddressAndCycles(1,2);
+            break;
+        }
+        case(0xAA):  // TAX
+        {
+            if ( (accumulatorIs8BitWide() && indexIs8BitWide()) ||
+                 (accumulatorIs16BitWide() && indexIs8BitWide()) ) {
+                uint8_t lower8BitsOfA = Binary::lower8BitsOf(mA);
+                Binary::setLower8BitsOf16BitsValue(&mX, lower8BitsOfA);
+                mCpuStatus.updateSignAndZeroFlagFrom8BitValue(lower8BitsOfA);
+            } else {
+                mX = mA;
+                mCpuStatus.updateSignAndZeroFlagFrom16BitValue(mA);
+            }
+            addToProgramAddressAndCycles(1,2);
+            break;
+        }
+        case(0x5B):  // TCD
+        {
+            mD = mA;
+            mCpuStatus.updateSignAndZeroFlagFrom16BitValue(mD);
+            addToProgramAddressAndCycles(1, 2);
+            break;
+        }
+        case(0x7B):  // TDC
+        {
+            mA = mD;
+            mCpuStatus.updateSignAndZeroFlagFrom16BitValue(mA);
+            addToProgramAddressAndCycles(1, 2);
+            break;
+        }
+        case(0x1B):  // TCS
+        {
+            uint16_t currentStackPointer = mStack.getStackPointer();
+            if (mCpuStatus.emulationFlag()) {
+                Binary::setLower8BitsOf16BitsValue(&currentStackPointer, Binary::lower8BitsOf(mA));
+            } else {
+                currentStackPointer = mA;
+            }
+            mStack = Stack(&mSystemBus, currentStackPointer);
+
+            addToProgramAddressAndCycles(1, 2);
+            break;
+        }
+        case(0x3B):  // TSC
+        {
+            mA = mStack.getStackPointer();
+            mCpuStatus.updateSignAndZeroFlagFrom16BitValue(mA);
+            addToProgramAddressAndCycles(1, 2);
+            break;
+        }
+        case(0xBA):  // TSX
+        {
+            uint16_t stackPointer = mStack.getStackPointer();
+            if (indexIs8BitWide()) {
+                uint8_t stackPointerLower8Bits = Binary::lower8BitsOf(stackPointer);
+                Binary::setLower8BitsOf16BitsValue(&mX, stackPointerLower8Bits);
+                mCpuStatus.updateSignAndZeroFlagFrom8BitValue(stackPointerLower8Bits);
+            } else {
+                mX = stackPointer;
+                mCpuStatus.updateSignAndZeroFlagFrom16BitValue(mX);
+            }
+
+            addToProgramAddressAndCycles(1, 2);
+            break;
+        }
+        case(0x8A):  // TXA
+        {
+            if (accumulatorIs8BitWide() && indexIs8BitWide()) {
+                uint8_t value = Binary::lower8BitsOf(mX);
+                Binary::setLower8BitsOf16BitsValue(&mA, value);
+                mCpuStatus.updateSignAndZeroFlagFrom8BitValue(value);
+            } else if (accumulatorIs8BitWide() && indexIs16BitWide()) {
+                uint8_t value = Binary::lower8BitsOf(mX);
+                Binary::setLower8BitsOf16BitsValue(&mA, value);
+                mCpuStatus.updateSignAndZeroFlagFrom8BitValue(value);
+            } else if (accumulatorIs16BitWide() && indexIs8BitWide()) {
+                uint8_t value = Binary::lower8BitsOf(mX);
+                mA = value;
+                mCpuStatus.updateSignAndZeroFlagFrom8BitValue(value);
+            } else {
+                mA = mX;
+                mCpuStatus.updateSignAndZeroFlagFrom16BitValue(mA);
+            }
+
+            addToProgramAddressAndCycles(1, 2);
+            break;
+        }
+        case(0x98):  // TYA
+        {
+            if (accumulatorIs8BitWide() && indexIs8BitWide()) {
+                uint8_t value = Binary::lower8BitsOf(mY);
+                Binary::setLower8BitsOf16BitsValue(&mA, value);
+                mCpuStatus.updateSignAndZeroFlagFrom8BitValue(value);
+            } else if (accumulatorIs8BitWide() && indexIs16BitWide()) {
+                uint8_t value = Binary::lower8BitsOf(mY);
+                Binary::setLower8BitsOf16BitsValue(&mA, value);
+                mCpuStatus.updateSignAndZeroFlagFrom8BitValue(value);
+            } else if (accumulatorIs16BitWide() && indexIs8BitWide()) {
+                uint8_t value = Binary::lower8BitsOf(mY);
+                mA = value;
+                mCpuStatus.updateSignAndZeroFlagFrom8BitValue(value);
+            } else {
+                mA = mY;
+                mCpuStatus.updateSignAndZeroFlagFrom16BitValue(mA);
+            }
+
+            addToProgramAddressAndCycles(1, 2);
+            break;
+        }
+        case(0x9A):  // TXS
+        {
+            if (mCpuStatus.emulationFlag()) {
+                uint16_t newStackPointer = 0x100;
+                newStackPointer |= Binary::lower8BitsOf(mX);
+                mStack = Stack(&mSystemBus, newStackPointer);
+            } else if (!mCpuStatus.emulationFlag() && indexIs8BitWide()) {
+                mStack = Stack(&mSystemBus, Binary::lower8BitsOf(mX));
+            } else if (!mCpuStatus.emulationFlag() && indexIs16BitWide()) {
+                mStack = Stack(&mSystemBus, mX);
+            }
+            addToProgramAddressAndCycles(1, 2);
+            break;
+        }
+        case(0x9B):  // TXY
+        {
+            if (indexIs8BitWide()) {
+                uint8_t value = Binary::lower8BitsOf(mX);
+                Binary::setLower8BitsOf16BitsValue(&mY, value);
+                mCpuStatus.updateSignAndZeroFlagFrom8BitValue(value);
+            } else {
+                mY = mX;
+                mCpuStatus.updateSignAndZeroFlagFrom16BitValue(mY);
+            }
+            addToProgramAddressAndCycles(1, 2);
+            break;
+        }
+        case(0xBB):  // TYX
+        {
+            if (indexIs8BitWide()) {
+                uint8_t value = Binary::lower8BitsOf(mY);
+                Binary::setLower8BitsOf16BitsValue(&mX, value);
+                mCpuStatus.updateSignAndZeroFlagFrom8BitValue(value);
+            } else {
+                mX = mY;
+                mCpuStatus.updateSignAndZeroFlagFrom16BitValue(mX);
+            }
+            addToProgramAddressAndCycles(1, 2);
+            break;
+        }
+
+        default: {
+            LOG_UNEXPECTED_OPCODE(opCode);
+        }
+    }
+}