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Even faster module loads. Now I'm happy

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This commit is contained in:
David Schmenk 2018-01-20 09:52:32 -08:00
parent abfe13a673
commit 934c52cf4d
1 changed files with 19 additions and 20 deletions
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39
src/vmsrc/cmd.pla
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@ -649,11 +649,12 @@ asm lookuptbl(dci, tbl)#1
STA DSTL
LDA ESTKH,X
STA DSTH
LDA ESTKL+1,X
INX
LDA ESTKL,X
STA SRCL
LDA ESTKH+1,X
LDA ESTKH,X
STA SRCH
LDY #$00
-- LDY #$00
- LDA (DST),Y
BEQ +
CMP (SRC),Y
@ -662,29 +663,27 @@ asm lookuptbl(dci, tbl)#1
ASL
BCS -
LDA (DST),Y
PHA
STA ESTKL,X ; MATCH
INY
LDA (DST),Y
TAY
PLA
+ INX
STA ESTKL,X
STY ESTKH,X
STA ESTKH,X
RTS
++ LDY #$00
-- LDA (DST),Y
INC DSTL
BEQ +
--- ASL
BCS --
LDA #$02
+ STA ESTKL,X ; NO MATCH
STA ESTKH,X
RTS
++
- LDA (DST),Y ; NEXT ENTRY
BPL +
INY
BNE -
+ TYA
CLC
ADC #$03
ADC DSTL
STA DSTL
BCC -
BCC --
INC DSTH
BCS -
+ INC DSTH
BNE ---
BNE --
end
// def lookupidx(esd, index)
// word sym