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https://github.com/dschmenk/PLASMA.git
synced 2026-04-27 03:18:02 +00:00
Fix VBL test for //c and UltraWarp
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98440eef79
commit
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10 files changed
+103
-31
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@@ -46,7 +46,7 @@ import dhgrlib
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predef dhgrMemBl7Tile(x7, y, memptr, memspan, tileptr)#0
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predef dhgrSet(dhx, y)#0
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predef dhgrUnset(dhx, y)#0
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predef dhgrVLB#0
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predef dhgrVBL#0
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predef dhgrOp(op)#0
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predef dhgrSurfScr(op)#0
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predef dhgrSurfMem(op, memh, memptr, memspan)#0
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@@ -2064,18 +2064,25 @@ end
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//
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// Wait for VLB
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//
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export asm dhgrVLB#0
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PHP
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SEI
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STA $C079 ; Enable IOU access and reset VBL int on //c
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STA $C05B ; Enable VBL int
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- LDA $C019
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STA $C079 ; Reset VBL int on //c
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BMI -
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export asm dhgrVBL#0
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- LDA $C019
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BPL -
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STA $C05A ; Disable VBL int on //c
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STA $C078 ; Disable IOU access on //c
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- LDA $C019 ; Wait during active video
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BMI -
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RTS
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end
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asm _vbl2c#0
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PHP
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SEI
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STA $C079 ; Enable IOU access and reset VBL int on //c
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STA $C05B ; Enable VBL int
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- LDA $C019
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STA $C079 ; Reset VBL int on //c
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BPL -
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- LDA $C019 ; Wait during active video
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BMI -
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STA $C05A ; Disable VBL int on //c
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STA $C078 ; Disable IOU access on //c
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PLP
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RTS
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end
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@@ -2543,4 +2550,11 @@ _dcgrTileScrB:25 = @_dcgrTileScrC.28
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_dcgrTileScrB:30 = @_dcgrTileScrC.34
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_dcgrTileScrB:35 = @_dcgrTileScrC.40
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_dcgrTileScrB:40 = @_dcgrTileScrC.46
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//
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// Check for //c specific VLB handling
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//
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if MACHID & MACHID_MODEL == MACHID_IIC
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dhgrVBL.0 = $4C // JMP instruction
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dhgrVBL:1 = @_vbl2c //c specific VLB processing
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fin
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done
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@@ -263,9 +263,8 @@ def dcgrLoadDefFont(x, y, strptr)#2 // Default if no font selected
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dcgrFont(FONT_DEFAULT)
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if fontDefault // Ensure it got loaded
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return dcgrStr(x, y, strptr)
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else
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return 0, 0
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fin
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return 0, 0
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end
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export def fontGlyphDim(ch)#2
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byte width, height, first
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@@ -15,6 +15,7 @@ byte dolz4, quit
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var arg, srcfilelist, srcpath, srcexp, srccnt
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var entrylist, entrycnt
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var retval
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var pause = 4
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res[t_except] exit
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//
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// Copy string with upper case conversion
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@@ -58,7 +59,8 @@ end
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def delay_getkey#1
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var busywait
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for busywait = 0 to 30000
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for busywait = 0 to 60*pause
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dhgrVBL
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if ^$C000 > 127
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return (^$C010 & $7F) == $03
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fin
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@@ -66,6 +68,29 @@ def delay_getkey#1
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return FALSE
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end
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def atoi(strptr)#1
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var num, len, sign
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sign = 1
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num = 0
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len = ^strptr
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strptr++
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if ^strptr == '-'
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sign = -1
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strptr++
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len--
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elsif ^strptr == '+'
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strptr++
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len--
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fin
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while len and ^strptr >= '0' and ^strptr <= '9'
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num = num * 10 + ^strptr - '0'
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strptr++
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len--
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loop
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return num * sign
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end
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arg = argNext(argFirst)
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while ^arg and ^(arg + 1) == '-'
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//
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@@ -75,6 +100,12 @@ while ^arg and ^(arg + 1) == '-'
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is 'Z' // decompress screens
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dolz4 = TRUE
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break
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is 'P' // pause between screens
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if ^arg > 2
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^(arg + 2) = ^arg - 2
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pause = atoi(arg + 2)
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fin
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break
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wend
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arg = argNext(arg)
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loop
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+1
-1
@@ -6,7 +6,7 @@ import dgrlib
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predef dgrTile(x, y, src)#0
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predef dgrTileStr(x, y, tilestr, strlen, tilebuff)#0
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predef dgrFill(x, y, tile)#0
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predef dgrVLB#0
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predef dgrVBL#0
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predef dgrClear(clr)#0
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predef dgrMode(mode)#1
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predef dgrShow(page)#1
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+1
-1
@@ -6,7 +6,7 @@ import grlib
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predef grTile(x, y, src)#0
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predef grTileStr(x, y, tilestr, strlen, tilebuff)#0
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predef grFill(x, y, tile)#0
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predef dgrVLB#0
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predef grVBL#0
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predef grClear(clr)#0
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predef grMode(mode)#1
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predef grShow(page)#1
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@@ -492,18 +492,25 @@ asm _dgrFillTile
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RTS
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end
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//
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// Wait for VLB
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// Wait for VBL
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//
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export asm dgrVLB#0
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export asm dgrVBL#0
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- LDA $C019
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BPL -
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- LDA $C019 ; Wait during active video
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BMI -
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RTS
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end
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asm _vbl2c#0
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PHP
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SEI
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STA $C079 ; Enable IOU access and reset VBL int on //c
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STA $C05B ; Enable VBL int
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- LDA $C019
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STA $C079 ; Reset VBL int on //c
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BMI -
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- LDA $C019
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BPL -
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- LDA $C019 ; Wait during active video
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BMI -
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STA $C05A ; Disable VBL int on //c
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STA $C078 ; Disable IOU access on //c
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PLP
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@@ -573,11 +580,11 @@ export def dgrShow(page)#1
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end
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export def dgrSwap#0
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^(showpage1 + drawpage)
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drawpage = drawpage ^ 1
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drawpage = drawpage ^ 1
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drawbuff = dgrbuff[drawpage]
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end
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export def dgrDrawBuf(page)#0
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drawpage = page
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drawpage = page
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drawbuff = dgrbuff[drawpage]
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end
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//
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@@ -621,6 +628,13 @@ dgrBLT:1 = @drawbuff
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dgrBLT:6 = @drawbuff+1
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dgrTile:1 = @drawbuff
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dgrTile:6 = @drawbuff+1
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//
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// Check for //c specific VLB handling
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//
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if MACHID & MACHID_MODEL == MACHID_IIC
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dgrVBL.0 = $4C // JMP instruction
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dgrVBL:1 = @_vbl2c //c specific VLB processing
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fin
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// Put read AUX mem routine in scary location
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memcpy($0100, @auxRead, 9)
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//
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@@ -407,26 +407,29 @@ asm _grFillTile
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RTS
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end
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//
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// Wait for VLB
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// Wait for VBL
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//
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export asm grVLB#0
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LDA $BF98
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AND #$C0
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CMP #$80
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BNE +
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export asm grVBL#0
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- LDA $C019
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BPL -
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- LDA $C019 ; Wait during active video
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BMI -
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RTS
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end
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asm _vbl2c#0
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PHP
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SEI
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STA $C079 ; Enable IOU access and reset VBL int on //c
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STA $C05B ; Enable VBL int
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- LDA $C019
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STA $C079 ; Reset VBL int on //c
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BMI -
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- LDA $C019
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BPL -
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- LDA $C019 ; Wait during active video
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BMI -
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STA $C05A ; Disable VBL int on //c
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STA $C078 ; Disable IOU access on //c
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PLP
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+ RTS
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RTS
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end
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//
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// Clear the buffer
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@@ -531,6 +534,15 @@ grBLT:6 = @drawbuff+1
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grTile:1 = @drawbuff
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grTile:6 = @drawbuff+1
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//
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// Check for machine specific VLB handling
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//
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if MACHID & MACHID_MODEL == MACHID_IIC
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grVBL.0 = $4C // JMP instruction
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grVBL:1 = @_vbl2c //c specific VLB processing
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elsif MACHID & MACHID_MODEL <> MACHID_IIE
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grVBL.0 = $60 // RTS instruction - do nothing on ][ or ][+
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fin
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//
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// Keep module in memory
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//
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return modkeep
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@@ -47,6 +47,7 @@ def dgrTest#0
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while ^$C000 < 128
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dgrFill(k, k, @tile1)
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dgrBLT(i, j, 8, 8, @sprite1)
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dgrVBL
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dgrSwap
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k++
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i = i + ii
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@@ -47,6 +47,7 @@ def grTest#0
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while ^$C000 < 128
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grFill(k, k, @tile1)
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grBLT(i, j, 8, 8, @sprite1)
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grVBL
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grSwap
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k++
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i = i + ii
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