Fix VBL test for //c and UltraWarp

This commit is contained in:
David Schmenk committed 2025-02-06 13:56:51 -08:00
1 parent 98440eef79
commit 9fc2f1769e
10 files changed
+103 -31

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+1 -1
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@@ -46,7 +46,7 @@ import dhgrlib
predef dhgrMemBl7Tile(x7, y, memptr, memspan, tileptr)#0
predef dhgrSet(dhx, y)#0
predef dhgrUnset(dhx, y)#0
predef dhgrVLB#0
predef dhgrVBL#0
predef dhgrOp(op)#0
predef dhgrSurfScr(op)#0
predef dhgrSurfMem(op, memh, memptr, memspan)#0
+24 -10
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@@ -2064,18 +2064,25 @@ end
//
// Wait for VLB
//
export asm dhgrVLB#0
PHP
SEI
STA $C079 ; Enable IOU access and reset VBL int on //c
STA $C05B ; Enable VBL int
- LDA $C019
STA $C079 ; Reset VBL int on //c
BMI -
export asm dhgrVBL#0
- LDA $C019
BPL -
STA $C05A ; Disable VBL int on //c
STA $C078 ; Disable IOU access on //c
- LDA $C019 ; Wait during active video
BMI -
RTS
end
asm _vbl2c#0
PHP
SEI
STA $C079 ; Enable IOU access and reset VBL int on //c
STA $C05B ; Enable VBL int
- LDA $C019
STA $C079 ; Reset VBL int on //c
BPL -
- LDA $C019 ; Wait during active video
BMI -
STA $C05A ; Disable VBL int on //c
STA $C078 ; Disable IOU access on //c
PLP
RTS
end
@@ -2543,4 +2550,11 @@ _dcgrTileScrB:25 = @_dcgrTileScrC.28
_dcgrTileScrB:30 = @_dcgrTileScrC.34
_dcgrTileScrB:35 = @_dcgrTileScrC.40
_dcgrTileScrB:40 = @_dcgrTileScrC.46
//
// Check for //c specific VLB handling
//
if MACHID & MACHID_MODEL == MACHID_IIC
dhgrVBL.0 = $4C // JMP instruction
dhgrVBL:1 = @_vbl2c //c specific VLB processing
fin
done
+1 -2
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@@ -263,9 +263,8 @@ def dcgrLoadDefFont(x, y, strptr)#2 // Default if no font selected
dcgrFont(FONT_DEFAULT)
if fontDefault // Ensure it got loaded
return dcgrStr(x, y, strptr)
else
return 0, 0
fin
return 0, 0
end
export def fontGlyphDim(ch)#2
byte width, height, first
+32 -1
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@@ -15,6 +15,7 @@ byte dolz4, quit
var arg, srcfilelist, srcpath, srcexp, srccnt
var entrylist, entrycnt
var retval
var pause = 4
res[t_except] exit
//
// Copy string with upper case conversion
@@ -58,7 +59,8 @@ end
def delay_getkey#1
var busywait
for busywait = 0 to 30000
for busywait = 0 to 60*pause
dhgrVBL
if ^$C000 > 127
return (^$C010 & $7F) == $03
fin
@@ -66,6 +68,29 @@ def delay_getkey#1
return FALSE
end
def atoi(strptr)#1
var num, len, sign
sign = 1
num = 0
len = ^strptr
strptr++
if ^strptr == '-'
sign = -1
strptr++
len--
elsif ^strptr == '+'
strptr++
len--
fin
while len and ^strptr >= '0' and ^strptr <= '9'
num = num * 10 + ^strptr - '0'
strptr++
len--
loop
return num * sign
end
arg = argNext(argFirst)
while ^arg and ^(arg + 1) == '-'
//
@@ -75,6 +100,12 @@ while ^arg and ^(arg + 1) == '-'
is 'Z' // decompress screens
dolz4 = TRUE
break
is 'P' // pause between screens
if ^arg > 2
^(arg + 2) = ^arg - 2
pause = atoi(arg + 2)
fin
break
wend
arg = argNext(arg)
loop
+1 -1
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@@ -6,7 +6,7 @@ import dgrlib
predef dgrTile(x, y, src)#0
predef dgrTileStr(x, y, tilestr, strlen, tilebuff)#0
predef dgrFill(x, y, tile)#0
predef dgrVLB#0
predef dgrVBL#0
predef dgrClear(clr)#0
predef dgrMode(mode)#1
predef dgrShow(page)#1
+1 -1
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@@ -6,7 +6,7 @@ import grlib
predef grTile(x, y, src)#0
predef grTileStr(x, y, tilestr, strlen, tilebuff)#0
predef grFill(x, y, tile)#0
predef dgrVLB#0
predef grVBL#0
predef grClear(clr)#0
predef grMode(mode)#1
predef grShow(page)#1
+20 -6
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@@ -492,18 +492,25 @@ asm _dgrFillTile
RTS
end
//
// Wait for VLB
// Wait for VBL
//
export asm dgrVLB#0
export asm dgrVBL#0
- LDA $C019
BPL -
- LDA $C019 ; Wait during active video
BMI -
RTS
end
asm _vbl2c#0
PHP
SEI
STA $C079 ; Enable IOU access and reset VBL int on //c
STA $C05B ; Enable VBL int
- LDA $C019
STA $C079 ; Reset VBL int on //c
BMI -
- LDA $C019
BPL -
- LDA $C019 ; Wait during active video
BMI -
STA $C05A ; Disable VBL int on //c
STA $C078 ; Disable IOU access on //c
PLP
@@ -573,11 +580,11 @@ export def dgrShow(page)#1
end
export def dgrSwap#0
^(showpage1 + drawpage)
drawpage = drawpage ^ 1
drawpage = drawpage ^ 1
drawbuff = dgrbuff[drawpage]
end
export def dgrDrawBuf(page)#0
drawpage = page
drawpage = page
drawbuff = dgrbuff[drawpage]
end
//
@@ -621,6 +628,13 @@ dgrBLT:1 = @drawbuff
dgrBLT:6 = @drawbuff+1
dgrTile:1 = @drawbuff
dgrTile:6 = @drawbuff+1
//
// Check for //c specific VLB handling
//
if MACHID & MACHID_MODEL == MACHID_IIC
dgrVBL.0 = $4C // JMP instruction
dgrVBL:1 = @_vbl2c //c specific VLB processing
fin
// Put read AUX mem routine in scary location
memcpy($0100, @auxRead, 9)
//
+21 -9
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@@ -407,26 +407,29 @@ asm _grFillTile
RTS
end
//
// Wait for VLB
// Wait for VBL
//
export asm grVLB#0
LDA $BF98
AND #$C0
CMP #$80
BNE +
export asm grVBL#0
- LDA $C019
BPL -
- LDA $C019 ; Wait during active video
BMI -
RTS
end
asm _vbl2c#0
PHP
SEI
STA $C079 ; Enable IOU access and reset VBL int on //c
STA $C05B ; Enable VBL int
- LDA $C019
STA $C079 ; Reset VBL int on //c
BMI -
- LDA $C019
BPL -
- LDA $C019 ; Wait during active video
BMI -
STA $C05A ; Disable VBL int on //c
STA $C078 ; Disable IOU access on //c
PLP
+ RTS
RTS
end
//
// Clear the buffer
@@ -531,6 +534,15 @@ grBLT:6 = @drawbuff+1
grTile:1 = @drawbuff
grTile:6 = @drawbuff+1
//
// Check for machine specific VLB handling
//
if MACHID & MACHID_MODEL == MACHID_IIC
grVBL.0 = $4C // JMP instruction
grVBL:1 = @_vbl2c //c specific VLB processing
elsif MACHID & MACHID_MODEL <> MACHID_IIE
grVBL.0 = $60 // RTS instruction - do nothing on ][ or ][+
fin
//
// Keep module in memory
//
return modkeep
+1
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@@ -47,6 +47,7 @@ def dgrTest#0
while ^$C000 < 128
dgrFill(k, k, @tile1)
dgrBLT(i, j, 8, 8, @sprite1)
dgrVBL
dgrSwap
k++
i = i + ii
+1
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@@ -47,6 +47,7 @@ def grTest#0
while ^$C000 < 128
grFill(k, k, @tile1)
grBLT(i, j, 8, 8, @sprite1)
grVBL
grSwap
k++
i = i + ii