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Fix decimal mode carry out in lib6502 for adc, sbc

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This commit is contained in:
David Schmenk
2024-08-23 17:57:22 -07:00
parent 4ee3a2140b
commit d767418eff
1 changed files with 6 additions and 6 deletions
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12
src/vmsrc/lib6502/lib6502.c
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@@ -177,16 +177,16 @@ typedef uint16_t word;
} \
else \
{ \
int l, h, s; \
int l, h, s, c; \
/* inelegant & slow, but consistent with the hw for illegal digits */ \
l= (A & 0x0F) + (B & 0x0F) + getC(); \
h= (A & 0xF0) + (B & 0xF0); \
if (l >= 0x0A) { l -= 0x0A; h += 0x10; } \
if (h >= 0xA0) { h -= 0xA0; } \
if (h >= 0xA0) { h -= 0xA0; c = 1;}else{c = 0;} \
fetch(); \
s= h | (l & 0x0F); \
/* only C is valid on NMOS 6502 */ \
setNVZC(s & 0x80, !(((A ^ B) & 0x80) && ((A ^ s) & 0x80)), !s, !!(h & 0x80)); \
setNVZC(s & 0x80, !(((A ^ B) & 0x80) && ((A ^ s) & 0x80)), !s, /*!!(h & 0x80)*/c); \
A= s; \
tick(1); \
next(); \
@@ -210,16 +210,16 @@ typedef uint16_t word;
else \
{ \
/* this is verbatim ADC, with a 10's complemented operand */ \
int l, h, s; \
int l, h, s, c; \
B= 0x99 - B; \
l= (A & 0x0F) + (B & 0x0F) + getC(); \
h= (A & 0xF0) + (B & 0xF0); \
if (l >= 0x0A) { l -= 0x0A; h += 0x10; } \
if (h >= 0xA0) { h -= 0xA0; } \
if (h >= 0xA0) { h -= 0xA0; c = 1;}else{c = 0;} \
fetch(); \
s= h | (l & 0x0F); \
/* only C is valid on NMOS 6502 */ \
setNVZC(s & 0x80, !(((A ^ B) & 0x80) && ((A ^ s) & 0x80)), !s, !!(h & 0x80)); \
setNVZC(s & 0x80, !(((A ^ B) & 0x80) && ((A ^ s) & 0x80)), !s, /*!!(h & 0x80)*/c); \
A= s; \
tick(1); \
next(); \