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mirror of https://github.com/dschmenk/PLASMA.git synced 2024-11-04 11:07:00 +00:00
Commit Graph

1148 Commits

Author SHA1 Message Date
David Schmenk
e5e43f58b7 Save/Restore JIT code ptr 2018-04-02 10:02:17 -07:00
David Schmenk
77ca9b2813 Re-org some JIT <-> CMDSYS <-> VM connections 2018-04-02 09:17:18 -07:00
David Schmenk
d4f15e3a90 Apple /// JITC 2018-04-02 08:47:16 -07:00
David Schmenk
574911e389 Apple /// JIT WIP 2018-04-01 18:53:56 -07:00
David Schmenk
46b24b077a Break out cor JIT for all platforms 2018-04-01 15:29:57 -07:00
David Schmenk
46b9f073d5 New JIT defaults 2018-03-31 17:15:18 -07:00
David Schmenk
630ccd88fa Improve LLA opts a little 2018-03-31 15:13:13 -07:00
David Schmenk
53a992debb Update images 2018-03-30 13:23:52 -07:00
David Schmenk
51ba2df618 Move JIT compiler to top of AUX memory 2018-03-30 13:12:39 -07:00
David Schmenk
cccfdbb9a7 Combine similar opcodes to shring module size to ~8K (keep clean version) 2018-03-30 09:52:35 -07:00
David Schmenk
f11a1470f0 Allocate seq buffer on heap and keep ints disabled durin aux memory move 2018-03-29 21:44:40 -07:00
David Schmenk
43a03d2882 Make sure all buffers on heap are allocated 2018-03-29 21:07:08 -07:00
David Schmenk
3fe85c5835 Make sure to always allocate data on heap - it can get overwritten by JIT 2018-03-29 20:00:06 -07:00
David Schmenk
f7b1d6c3fb Tracking Y register WIP 2018-03-29 17:14:27 -07:00
David Schmenk
b5885dfe8f Better tracking of Y register WIP 2018-03-29 12:19:49 -07:00
David Schmenk
148031d192 Make SIEVE JITable 2018-03-29 07:58:31 -07:00
David Schmenk
3968f82625 Lose the JIT warmup count 2018-03-28 17:02:26 -07:00
David Schmenk
208be4da1f Update images 2018-03-28 16:30:18 -07:00
David Schmenk
b72e592c9a Fix SEL tests 2018-03-28 11:51:04 -07:00
Dave Schmenk
5e049ebe8e Fix CS destination jump 2018-03-27 22:13:58 -07:00
David Schmenk
7cd9c00706 Fix SELect default branch 2018-03-27 20:00:49 -07:00
David Schmenk
369e9731f4 Source cleanup 2018-03-27 19:21:27 -07:00
David Schmenk
1e05ab789e Finished updating ops $B0-$BE 2018-03-27 14:02:09 -07:00
David Schmenk
169d347754 Make sure A_IS_TOSL is cleared at opt fence 2018-03-27 10:12:13 -07:00
David Schmenk
818a2b14ea Update ops $A0-$AE 2018-03-26 16:51:09 -07:00
David Schmenk
15c779d63b Update ops $90-$9E 2018-03-26 11:04:45 -07:00
David Schmenk
4717e01862 Fix SUB typo 2018-03-26 06:58:44 -07:00
David Schmenk
9922127a41 Updates ops $80-$8E 2018-03-25 23:03:29 -07:00
David Schmenk
26a03d8e0b Update ops $70-$7E 2018-03-25 20:20:19 -07:00
David Schmenk
8f5d4647bf Update ops $60-$6E 2018-03-25 17:31:07 -07:00
David Schmenk
08e41bf472 Update ops $50-$5E 2018-03-25 13:53:53 -07:00
David Schmenk
23779176d2 Update ops $40-$4E 2018-03-24 21:37:52 -07:00
David Schmenk
2c9373c962 WIP opcodes $40-$4E 2018-03-24 17:17:06 -07:00
David Schmenk
6cfb957df4 Rework ops $30-$3E 2018-03-24 17:04:21 -07:00
David Schmenk
1bf3c7043f Fix LLA 2018-03-24 16:37:47 -07:00
David Schmenk
8adc03d640 Rework ops $20-$2E 2018-03-24 15:47:05 -07:00
David Schmenk
27a2d8d0b7 Start more efficient coding for writing native code to buffer 2018-03-24 10:02:14 -07:00
David Schmenk
efd1ff58e3 Fix ISLE 2018-03-23 17:13:42 -07:00
David Schmenk
8b1ca4bf1e Fix DLW TOSL_DIRTY 2018-03-23 16:05:39 -07:00
David Schmenk
3c72bb9df3 Better TOSL cache checks 2018-03-23 12:31:17 -07:00
David Schmenk
36c2506a24 Move max code buffer down a smidge 2018-03-23 11:33:01 -07:00
David Schmenk
72a7996871 Fix optimization fences and BROR/BRAND/DUP/DLW 2018-03-23 11:26:25 -07:00
Dave Schmenk
56f6d783e2 JIT optimizations fixes 2018-03-22 21:53:49 -07:00
David Schmenk
9be1bd5eb8 Change sense of test to take advantage of Y=0 2018-03-22 16:50:18 -07:00
David Schmenk
a7ecdc7edc Save a few bytes so we can test JIT 2018-03-22 16:38:05 -07:00
David Schmenk
7b201b4392 Optimizing JIT WIP 2018-03-22 16:11:06 -07:00
David Schmenk
cdb0dac92f Fix SEL and SUBI 2018-03-22 12:23:25 -07:00
Dave Schmenk
81574a8a62 JIT tuning parameters 2018-03-21 22:31:06 -07:00
David Schmenk
8c18a28e49 JIT WIP 2018-03-21 20:54:16 -07:00
David Schmenk
71d17a99e4 Fix immediate value loads 2018-03-21 18:24:15 -07:00