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mirror of https://github.com/catseye/SixtyPical.git synced 2024-11-22 17:32:01 +00:00

Generate zero-page code for and, or, and xor, when possible.

This commit is contained in:
Chris Pressey 2018-04-17 17:58:26 +01:00
parent 9b53ed03c8
commit 70247e0e44
5 changed files with 19 additions and 4 deletions

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@ -1,6 +1,12 @@
History of SixtyPical History of SixtyPical
===================== =====================
0.16
----
* `or a, z`, `and a, z`, and `eor a, z` compile to zero-page operations
if the address of z < 256.
0.15 0.15
---- ----

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@ -89,6 +89,5 @@ are trashed inside the block.
* Automatic tail-call optimization (could be tricky, w/constraints?) * Automatic tail-call optimization (could be tricky, w/constraints?)
* Possibly `ld x, [ptr] + y`, possibly `st x, [ptr] + y`. * Possibly `ld x, [ptr] + y`, possibly `st x, [ptr] + y`.
* Maybe even `copy [ptra] + y, [ptrb] + y`, which can be compiled to indirect LDA then indirect STA! * Maybe even `copy [ptra] + y, [ptrb] + y`, which can be compiled to indirect LDA then indirect STA!
* Optimize `or|and|eor a, z` to zero-page operations if address of z < 256.
[VICE]: http://vice-emu.sourceforge.net/ [VICE]: http://vice-emu.sourceforge.net/

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@ -332,7 +332,7 @@ class Compiler(object):
if isinstance(src, ConstantRef): if isinstance(src, ConstantRef):
self.emitter.emit(cls(Immediate(Byte(src.value)))) self.emitter.emit(cls(Immediate(Byte(src.value))))
else: else:
self.emitter.emit(cls(Absolute(self.get_label(src.name)))) self.emitter.emit(cls(self.absolute_or_zero_page(self.get_label(src.name))))
else: else:
raise UnsupportedOpcodeError(instr) raise UnsupportedOpcodeError(instr)
elif opcode in ('shl', 'shr'): elif opcode in ('shl', 'shr'):

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@ -133,6 +133,7 @@ class AND(Instruction):
Absolute: 0x2d, Absolute: 0x2d,
AbsoluteX: 0x3d, AbsoluteX: 0x3d,
AbsoluteY: 0x39, AbsoluteY: 0x39,
ZeroPage: 0x25,
} }
@ -231,6 +232,7 @@ class EOR(Instruction):
Absolute: 0x4d, Absolute: 0x4d,
AbsoluteX: 0x5d, AbsoluteX: 0x5d,
AbsoluteY: 0x59, AbsoluteY: 0x59,
ZeroPage: 0x45,
} }
@ -299,6 +301,7 @@ class ORA(Instruction):
Absolute: 0x0d, Absolute: 0x0d,
AbsoluteX: 0x1d, AbsoluteX: 0x1d,
AbsoluteY: 0x19, AbsoluteY: 0x19,
ZeroPage: 0x05,
} }

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@ -112,7 +112,8 @@ Memory location with explicit address.
= $080F STA $0400 = $080F STA $0400
= $0812 RTS = $0812 RTS
Accesses to memory locations in zero-page with `ld` and `st` use zero-page addressing. Accesses to memory locations in zero-page with `ld` and `st`
and `and`, `or`, and `xor` use zero-page addressing.
| byte zp @ $00 | byte zp @ $00
| byte screen @ 100 | byte screen @ 100
@ -126,12 +127,18 @@ Accesses to memory locations in zero-page with `ld` and `st` use zero-page addre
| st a, screen | st a, screen
| ld a, zp | ld a, zp
| st a, zp | st a, zp
| and a, zp
| or a, zp
| xor a, zp
| } | }
= $080D LDA $64 = $080D LDA $64
= $080F STA $64 = $080F STA $64
= $0811 LDA $00 = $0811 LDA $00
= $0813 STA $00 = $0813 STA $00
= $0815 RTS = $0815 AND $00
= $0817 ORA $00
= $0819 EOR $00
= $081B RTS
Memory location with initial value. Memory location with initial value.