2012-10-16 08:10:50 +00:00
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/*****************************************************************************/
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/* */
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/* _suzy.h */
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/* */
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/* Atari Lynx, Suzy chip register hardware structures */
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/* */
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/* */
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/* This software is provided 'as-is', without any expressed or implied */
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/* warranty. In no event will the authors be held liable for any damages */
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/* arising from the use of this software. */
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/* */
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/* Permission is granted to anyone to use this software for any purpose, */
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/* including commercial applications, and to alter it and redistribute it */
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/* freely, subject to the following restrictions: */
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/* */
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/* 1. The origin of this software must not be misrepresented; you must not */
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/* claim that you wrote the original software. If you use this software */
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/* in a product, an acknowledgment in the product documentation would be */
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/* appreciated but is not required. */
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/* 2. Altered source versions must be plainly marked as such, and must not */
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/* be misrepresented as being the original software. */
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/* 3. This notice may not be removed or altered from any source */
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/* distribution. */
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/* */
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/*****************************************************************************/
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#ifndef __SUZY_H
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#define __SUZY_H
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2024-11-09 11:01:22 +00:00
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/* JOYSTICK bit definitions */
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2024-08-09 12:48:13 +00:00
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enum {
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JOYPAD_RIGHT = 0x10,
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JOYPAD_LEFT = 0x20,
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JOYPAD_DOWN = 0x40,
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JOYPAD_UP = 0x80,
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BUTTON_OPTION1 = 0x08,
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BUTTON_OPTION2 = 0x04,
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BUTTON_INNER = 0x02,
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BUTTON_OUTER = 0x01
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};
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2012-10-16 08:10:50 +00:00
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2024-11-09 11:01:22 +00:00
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/* SWITCHES bit definitions */
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2024-08-09 12:48:13 +00:00
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enum {
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CART1_IO_INACTIVE = 0x04,
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CART0_IO_INACTIVE = 0x02,
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BUTTON_PAUSE = 0x01
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};
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2012-10-16 08:10:50 +00:00
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2024-11-09 11:01:22 +00:00
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/* SPRCTL0 bit definitions */
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2024-08-09 12:48:13 +00:00
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enum {
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BPP_4 = 0xC0,
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BPP_3 = 0x80,
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BPP_2 = 0x40,
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BPP_1 = 0x00,
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HFLIP = 0x20,
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VFLIP = 0x10,
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TYPE_SHADOW = 0x07,
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TYPE_XOR = 0x06,
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TYPE_NONCOLL = 0x05,
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TYPE_NORMAL = 0x04,
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TYPE_BOUNDARY = 0x03,
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TYPE_BSHADOW = 0x02,
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TYPE_BACKNONCOLL = 0x01,
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TYPE_BACKGROUND = 0x00
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};
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2012-10-16 08:10:50 +00:00
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2024-11-09 11:01:22 +00:00
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/* SPRCTL1 bit definitions */
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2024-08-09 12:48:13 +00:00
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enum {
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LITERAL = 0x80,
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PACKED = 0x00,
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ALGO3 = 0x40,
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RENONE = 0x00,
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REHV = 0x10,
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REHVS = 0x20,
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REHVST = 0x30,
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REUSEPAL = 0x08,
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SKIP = 0x04,
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DRAWUP = 0x02,
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DRAWLEFT = 0x01
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};
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2012-10-16 08:10:50 +00:00
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2024-11-09 11:01:22 +00:00
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/* Sprite control block (SCB) definitions */
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2012-10-16 08:10:50 +00:00
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2024-11-09 11:01:22 +00:00
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/* SCB with all attributes */
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typedef struct SCB_REHVST_PAL {
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2012-10-16 08:10:50 +00:00
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unsigned char sprctl0;
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unsigned char sprctl1;
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unsigned char sprcoll;
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char *next;
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2012-11-21 13:11:52 +00:00
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unsigned char *data;
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2012-11-27 06:46:20 +00:00
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signed int hpos;
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signed int vpos;
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2012-10-16 08:10:50 +00:00
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unsigned int hsize;
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unsigned int vsize;
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unsigned int stretch;
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unsigned int tilt;
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unsigned char penpal[8];
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} SCB_REHVST_PAL;
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2024-11-09 11:01:22 +00:00
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/* SCB without pallette */
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typedef struct SCB_REHVST {
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2012-10-16 08:10:50 +00:00
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unsigned char sprctl0;
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unsigned char sprctl1;
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unsigned char sprcoll;
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char *next;
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2012-11-21 13:11:52 +00:00
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unsigned char *data;
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2012-11-27 06:46:20 +00:00
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signed int hpos;
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signed int vpos;
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2012-10-16 08:10:50 +00:00
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unsigned int hsize;
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unsigned int vsize;
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unsigned int stretch;
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unsigned int tilt;
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} SCB_REHVST;
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2024-11-09 11:01:22 +00:00
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/* SCB without stretch/tilt */
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typedef struct SCB_REHV {
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2012-10-16 08:10:50 +00:00
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unsigned char sprctl0;
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unsigned char sprctl1;
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unsigned char sprcoll;
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char *next;
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2012-11-21 13:11:52 +00:00
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unsigned char *data;
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2012-11-27 06:46:20 +00:00
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signed int hpos;
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signed int vpos;
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2012-10-16 08:10:50 +00:00
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unsigned int hsize;
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unsigned int vsize;
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} SCB_REHV;
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2024-11-09 11:01:22 +00:00
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/* SCB without stretch/tilt, with penpal */
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typedef struct SCB_REHV_PAL {
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2012-10-16 08:10:50 +00:00
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unsigned char sprctl0;
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unsigned char sprctl1;
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unsigned char sprcoll;
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char *next;
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2012-11-21 13:11:52 +00:00
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unsigned char *data;
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2012-11-27 06:46:20 +00:00
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signed int hpos;
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signed int vpos;
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2012-10-16 08:10:50 +00:00
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unsigned int hsize;
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unsigned int vsize;
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unsigned char penpal[8];
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} SCB_REHV_PAL;
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2024-11-09 11:01:22 +00:00
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/* SCB without tilt/penpal */
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typedef struct SCB_REHVS {
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2012-10-16 08:10:50 +00:00
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unsigned char sprctl0;
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unsigned char sprctl1;
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unsigned char sprcoll;
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char *next;
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2012-11-21 13:11:52 +00:00
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unsigned char *data;
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2012-11-27 06:46:20 +00:00
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signed int hpos;
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signed int vpos;
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2012-10-16 08:10:50 +00:00
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unsigned int hsize;
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unsigned int vsize;
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unsigned int stretch;
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} SCB_REHVS;
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2024-11-09 11:01:22 +00:00
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/* SCB without tilt, with penpal */
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typedef struct SCB_REHVS_PAL {
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2012-10-16 08:10:50 +00:00
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unsigned char sprctl0;
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unsigned char sprctl1;
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unsigned char sprcoll;
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char *next;
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2012-11-21 13:11:52 +00:00
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unsigned char *data;
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2012-11-27 06:46:20 +00:00
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signed int hpos;
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signed int vpos;
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2012-10-16 08:10:50 +00:00
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unsigned int hsize;
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unsigned int vsize;
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unsigned int stretch;
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unsigned char penpal[8];
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} SCB_REHVS_PAL;
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2024-11-09 11:01:22 +00:00
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/* SCB without size/stretch/tilt/penpal */
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typedef struct SCB_RENONE {
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2012-10-16 08:10:50 +00:00
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unsigned char sprctl0;
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unsigned char sprctl1;
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unsigned char sprcoll;
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char *next;
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2012-11-21 13:11:52 +00:00
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unsigned char *data;
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2012-11-27 06:46:20 +00:00
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signed int hpos;
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signed int vpos;
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2012-10-16 08:10:50 +00:00
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} SCB_RENONE;
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2024-11-09 11:01:22 +00:00
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/* SCB without size/str/tilt, with penpal */
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typedef struct SCB_RENONE_PAL {
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2012-10-16 08:10:50 +00:00
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unsigned char sprctl0;
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unsigned char sprctl1;
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unsigned char sprcoll;
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char *next;
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2012-11-21 13:11:52 +00:00
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unsigned char *data;
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2012-11-27 06:46:20 +00:00
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signed int hpos;
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signed int vpos;
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2012-10-16 08:10:50 +00:00
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unsigned char penpal[8];
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} SCB_RENONE_PAL;
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2012-11-21 13:11:52 +00:00
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typedef struct PENPAL_4 {
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unsigned char penpal[8];
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} PENPAL_4;
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typedef struct PENPAL_3 {
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unsigned char penpal[4];
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} PENPAL_3;
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typedef struct PENPAL_2 {
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unsigned char penpal[2];
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} PENPAL_2;
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typedef struct PENPAL_1 {
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unsigned char penpal[1];
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} PENPAL_1;
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2012-10-16 08:10:50 +00:00
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2024-11-09 11:01:22 +00:00
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/* SPRGO bit definitions */
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2024-08-09 12:48:13 +00:00
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enum {
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SPRITE_GO = 0x01, // sprite process start bit
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EVER_ON = 0x04 // everon detector enable
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};
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2012-10-16 08:10:50 +00:00
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2024-11-09 11:01:22 +00:00
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/* SPRSYS bit definitions for write operations */
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2024-08-09 12:48:13 +00:00
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enum {
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SIGNMATH = 0x80, // signed math
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ACCUMULATE = 0x40, // accumulate multiplication results
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NO_COLLIDE = 0x20, // do not collide with any sprites (also SPRCOLL bit definition)
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VSTRETCH = 0x10, // stretch v
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LEFTHAND = 0x08,
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CLR_UNSAFE = 0x04, // unsafe access reset
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SPRITESTOP = 0x02 // request to stop sprite process
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};
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2024-11-09 11:01:22 +00:00
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/* SPRSYS bit definitions for read operations */
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2024-08-09 12:48:13 +00:00
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enum {
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MATHWORKING = 0x80, // math operation in progress
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MATHWARNING = 0x40, // accumulator overflow on multiple or divide by zero
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MATHCARRY = 0x20, // last carry bit
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VSTRETCHING = 0x10,
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LEFTHANDED = 0x08,
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UNSAFE_ACCESS = 0x04, // unsafe access performed
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SPRITETOSTOP = 0x02, // requested to stop
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SPRITEWORKING = 0x01 // sprite process is active
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};
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2012-10-16 08:10:50 +00:00
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2024-11-09 11:01:22 +00:00
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/* Suzy hardware registers */
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2012-10-16 08:10:50 +00:00
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struct __suzy {
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2024-08-09 13:54:05 +00:00
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unsigned char *tmpadr; // 0xFC00 Temporary address
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unsigned int tiltacc; // 0xFC02 Tilt accumulator
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unsigned int hoff; // 0xFC04 Offset to H edge of screen
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unsigned int voff; // 0xFC06 Offset to V edge of screen
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2012-10-16 08:10:50 +00:00
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unsigned char *sprbase; // 0xFC08 Base address of sprite
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unsigned char *colbase; // 0xFC0A Base address of collision buffer
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unsigned char *vidadr; // 0xFC0C Current vid buffer address
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unsigned char *coladr; // 0xFC0E Current col buffer address
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unsigned char *scbnext; // 0xFC10 Address of next SCB
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unsigned char *sprdline; // 0xFC12 start of sprite data line address
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2024-08-09 13:54:05 +00:00
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unsigned int hposstrt; // 0xFC14 start hpos
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unsigned int vposstrt; // 0xFC16 start vpos
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unsigned int sprhsize; // 0xFC18 sprite h size
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unsigned int sprvsize; // 0xFC1A sprite v size
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unsigned int stretchl; // 0xFC1C H size adder
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unsigned int tilt; // 0xFC1E H pos adder
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unsigned int sprdoff; // 0xFC20 offset to next sprite data line
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unsigned int sprvpos; // 0xFC22 current vpos
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unsigned int colloff; // 0xFC24 offset to collision depository
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unsigned int vsizeacc; // 0xFC26 vertical size accumulator
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unsigned int hsizeoff; // 0xFC28 horizontal size offset
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unsigned int vsizeoff; // 0xFC2A vertical size offset
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2012-10-16 08:10:50 +00:00
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unsigned char *scbaddr; // 0xFC2C address of current SCB
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unsigned char *procaddr; // 0xFC2E address of current spr data proc
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unsigned char unused0[32]; // 0xFC30 - 0xFC4F reserved/unused
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unsigned char unused1[2]; // 0xFC50 - 0xFC51 do not use
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2024-10-28 13:20:09 +00:00
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unsigned char mathd; // 0xFC52
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unsigned char mathc; // 0xFC53
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unsigned char mathb; // 0xFC54
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unsigned char matha; // 0xFC55 write starts a multiply operation
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unsigned char mathp; // 0xFC56
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unsigned char mathn; // 0xFC57
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unsigned char unused2[8]; // 0xFC58 - 0xFC5F do not use
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unsigned char mathh; // 0xFC60
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unsigned char mathg; // 0xFC61
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unsigned char mathf; // 0xFC62
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unsigned char mathe; // 0xFC63 write starts a divide operation
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unsigned char unused3[8]; // 0xFC64 - 0xFC6B do not use
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unsigned char mathm; // 0xFC6C
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unsigned char mathl; // 0xFC6D
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unsigned char mathk; // 0xFC6E
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unsigned char mathj; // 0xFC6F
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2012-10-16 08:10:50 +00:00
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unsigned char unused4[16]; // 0xFC70 - 0xFC7F do not use
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unsigned char sprctl0; // 0xFC80 sprite control bits 0
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unsigned char sprctl1; // 0xFC81 sprite control bits 1
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unsigned char sprcoll; // 0xFC82 sprite collision number
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unsigned char sprinit; // 0xFC83 sprite initialization bits
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unsigned char unused5[4]; // 0xFC84 - 0xFC87 unused
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unsigned char suzyhrev; // 0xFC88 suzy hardware rev
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unsigned char suzysrev; // 0xFC89 suzy software rev
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unsigned char unused6[6]; // 0xFC8A - 0xFC8F unused
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unsigned char suzybusen; // 0xFC90 suzy bus enable
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unsigned char sprgo; // 0xFC91 sprite process start bit
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unsigned char sprsys; // 0xFC92 sprite system control bits
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unsigned char unused7[29]; // 0xFC93 - 0xFCAF unused
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unsigned char joystick; // 0xFCB0 joystick and buttons
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unsigned char switches; // 0xFCB1 other switches
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unsigned char cart0; // 0xFCB2 cart0 r/w
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unsigned char cart1; // 0xFCB3 cart1 r/w
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unsigned char unused8[8]; // 0xFCB4 - 0xFCBF unused
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unsigned char leds; // 0xFCC0 leds
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unsigned char unused9; // 0xFCC1 unused
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unsigned char parstat; // 0xFCC2 parallel port status
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unsigned char pardata; // 0xFCC3 parallel port data
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unsigned char howie; // 0xFCC4 howie (?)
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2013-05-09 11:56:54 +00:00
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// 0xFCC5 - 0xFCFF unused
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2012-10-16 08:10:50 +00:00
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};
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2024-11-09 11:01:22 +00:00
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/* Hardware math registers */
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2024-08-09 12:48:13 +00:00
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#define FACTOR_A *(unsigned int *) 0xFC54
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#define FACTOR_B *(unsigned int *) 0xFC52
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#define PRODUCT0 *(unsigned int *) 0xFC60
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#define PRODUCT1 *(unsigned int *) 0xFC62
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#define PRODUCT *(long *) 0xFC60
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2012-10-16 08:10:50 +00:00
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2024-08-09 12:48:13 +00:00
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#define DIVIDEND0 *(unsigned int *) 0xFC60
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#define DIVIDEND1 *(unsigned int *) 0xFC62
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#define DIVIDEND *(long *) 0xFC60
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#define DIVISOR *(unsigned int *) 0xFC56
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#define QUOTIENT0 *(unsigned int *) 0xFC52
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#define QUOTIENT1 *(unsigned int *) 0xFC54
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#define QUOTIENT *(long *) 0xFC52
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#define REMAINDER0 *(unsigned int *) 0xFC6C
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#define REMAINDER1 *(unsigned int *) 0xFC6E
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#define REMAINDER *(long *) 0xFC6C
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2024-11-09 11:01:22 +00:00
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/* Deprecated definitions */
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2024-10-28 13:20:09 +00:00
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2024-08-09 12:48:13 +00:00
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/* MAPCTL $FFF9 */
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#define HIGHSPEED 0x80
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#define VECTORSPACE 0x08
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#define ROMSPACE 0x04
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#define MIKEYSPACE 0x02
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#define SUZYSPACE 0x01
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#endif
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