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cc65/cfg/c64-asm.cfg

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Added the first implementation of a linker config suited for c64 assembly programs. git-svn-id: svn://svn.cc65.org/cc65/trunk@4864 b7a2c559-68d2-44c3-8de9-860c34a00d81
2010-11-14 13:11:09 +00:00
FEATURES {
STARTADDRESS: default = $0801;
}
SYMBOLS {
Just some beautification. git-svn-id: svn://svn.cc65.org/cc65/trunk@5984 b7a2c559-68d2-44c3-8de9-860c34a00d81
2013-02-12 20:55:19 +00:00
__LOADADDR__: type = import;
Added the first implementation of a linker config suited for c64 assembly programs. git-svn-id: svn://svn.cc65.org/cc65/trunk@4864 b7a2c559-68d2-44c3-8de9-860c34a00d81
2010-11-14 13:11:09 +00:00
}
MEMORY {
Harmonized asm linker configs. - All segments but CODE are optional and CODE is R/W. Both together allow to "just" write code/data without ever explicitly using a segment. - Symbols are defined for the BSS. This allows to use/implement zerobss. - The ZP memory area isn't artificially limited.
2016-03-17 20:51:20 +00:00
ZP: file = "", start = $0002, size = $00FE, define = yes;
Added the first implementation of a linker config suited for c64 assembly programs. git-svn-id: svn://svn.cc65.org/cc65/trunk@4864 b7a2c559-68d2-44c3-8de9-860c34a00d81
2010-11-14 13:11:09 +00:00
LOADADDR: file = %O, start = %S - 2, size = $0002;
Renamed RAM to MAIN for all disk based targets. The name RAM doesn't make much sense in general for a memeory area because i.e. the zero page is for sure RAM but is not part of the memory area named RAM. For disk based targets it makes sense to put the disk file more into focus and here MAIN means the main part of the file - in contrast to some header. Only for ROM based targets the name RAM is kept as it makes sense to focus on the difference between RAM and ROM.
2016-03-07 00:28:55 +00:00
MAIN: file = %O, start = %S, size = $D000 - %S;
Added the first implementation of a linker config suited for c64 assembly programs. git-svn-id: svn://svn.cc65.org/cc65/trunk@4864 b7a2c559-68d2-44c3-8de9-860c34a00d81
2010-11-14 13:11:09 +00:00
}
SEGMENTS {
Cleaned up C64 linker configs. The BSS segment and the ONCE segment share the same start address. So they need to be placed in two different memory areas. So far BSS was placed in the MAIN memory area and ONCE was placed in an additional memory area. Both memory areas were written to the output file. They just "happened" to be loadable and runnable at a stretch. Now ONCE is placed in the MAIN memory area and BSS is placed in an additional memory area. Only MAIN is written to the output file. It becomes more obvious that BSS is "just" defined to share memory with ONCE.
2016-03-13 13:32:07 +00:00
ZEROPAGE: load = ZP, type = zp, optional = yes;
Added the first implementation of a linker config suited for c64 assembly programs. git-svn-id: svn://svn.cc65.org/cc65/trunk@4864 b7a2c559-68d2-44c3-8de9-860c34a00d81
2010-11-14 13:11:09 +00:00
LOADADDR: load = LOADADDR, type = ro;
Renamed RAM to MAIN for all disk based targets. The name RAM doesn't make much sense in general for a memeory area because i.e. the zero page is for sure RAM but is not part of the memory area named RAM. For disk based targets it makes sense to put the disk file more into focus and here MAIN means the main part of the file - in contrast to some header. Only for ROM based targets the name RAM is kept as it makes sense to focus on the difference between RAM and ROM.
2016-03-07 00:28:55 +00:00
EXEHDR: load = MAIN, type = ro, optional = yes;
Harmonized asm linker configs. - All segments but CODE are optional and CODE is R/W. Both together allow to "just" write code/data without ever explicitly using a segment. - Symbols are defined for the BSS. This allows to use/implement zerobss. - The ZP memory area isn't artificially limited.
2016-03-17 20:51:20 +00:00
CODE: load = MAIN, type = rw;
Renamed RAM to MAIN for all disk based targets. The name RAM doesn't make much sense in general for a memeory area because i.e. the zero page is for sure RAM but is not part of the memory area named RAM. For disk based targets it makes sense to put the disk file more into focus and here MAIN means the main part of the file - in contrast to some header. Only for ROM based targets the name RAM is kept as it makes sense to focus on the difference between RAM and ROM.
2016-03-07 00:28:55 +00:00
RODATA: load = MAIN, type = ro, optional = yes;
DATA: load = MAIN, type = rw, optional = yes;
Harmonized asm linker configs. - All segments but CODE are optional and CODE is R/W. Both together allow to "just" write code/data without ever explicitly using a segment. - Symbols are defined for the BSS. This allows to use/implement zerobss. - The ZP memory area isn't artificially limited.
2016-03-17 20:51:20 +00:00
BSS: load = MAIN, type = bss, optional = yes, define = yes;
Added the first implementation of a linker config suited for c64 assembly programs. git-svn-id: svn://svn.cc65.org/cc65/trunk@4864 b7a2c559-68d2-44c3-8de9-860c34a00d81
2010-11-14 13:11:09 +00:00
}
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