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cc65/libsrc/apple2/waitvsync.s

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Added waitvsync() for the Enhanced Apple //e. The implementation is a bit tricky as it requires to take different code paths for the //e, the //c and the IIgs. Additionally the //c only provides a VBL IRQ flag supposed to be used by an IRQ handler to determine what triggered the IRQ. However, masking IRQs on the CPU, activating the VBL IRQ, clearing any pending VBL IRQs and then polling for the IRQ flag does the trick.
2020-06-18 21:44:42 +02:00
;
; Oliver Schmidt, 2020-06-14
;
; void waitvsync (void);
;
.ifdef __APPLE2ENH__
.export _waitvsync
Apple2: implement sleep using MONWAIT Also publish detect_iigs(), set_iigs_speed() and get_iigs_speed(). Refactor to only store one ostype variable.
2024-01-14 18:27:41 +01:00
.import ostype
Added waitvsync() for the Enhanced Apple //e. The implementation is a bit tricky as it requires to take different code paths for the //e, the //c and the IIgs. Additionally the //c only provides a VBL IRQ flag supposed to be used by an IRQ handler to determine what triggered the IRQ. However, masking IRQs on the CPU, activating the VBL IRQ, clearing any pending VBL IRQs and then polling for the IRQ flag does the trick.
2020-06-18 21:44:42 +02:00
.include "apple2.inc"
_waitvsync:
bit ostype
bmi iigs ; $8x
bvs iic ; $4x
: bit RDVBLBAR
bpl :- ; Blanking
: bit RDVBLBAR
bmi :- ; Drawing
rts
; Apple IIgs TechNote #40, VBL Signal
iigs: bit RDVBLBAR
bmi iigs ; Blanking
: bit RDVBLBAR
bpl :- ; Drawing
rts
; Apple IIc TechNote #9, Detecting VBL
iic: sei
sta IOUDISOFF
lda RDVBLMSK
bit ENVBL
bit PTRIG ; Reset VBL interrupt flag
: bit RDVBLBAR
bpl :-
asl
bcs :+ ; VBL interrupts were already enabled
bit DISVBL
: sta IOUDISON ; IIc Tech Ref Man: The firmware normally leaves IOUDIS on.
cli
rts
.endif ; __APPLE2ENH__
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