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Use smart mode, allow more CPUs, fix CPU dependent code, use address sizes

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for functions.


git-svn-id: svn://svn.cc65.org/cc65/trunk@2694 b7a2c559-68d2-44c3-8de9-860c34a00d81
This commit is contained in:
cuz 2003-11-29 07:40:41 +00:00
parent b520b182d0
commit 05f3f154a9
6 changed files with 35 additions and 22 deletions
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21
src/cc65/codegen.c
View File

@ -165,10 +165,17 @@ void g_preamble (void)
VER_MAJOR, VER_MINOR, VER_PATCH);
/* If we're producing code for some other CPU, switch the command set */
if (CPU == CPU_65C02) {
AddTextLine ("\t.setcpu\t\t\"65C02\"");
switch (CPU) {
case CPU_6502: AddTextLine ("\t.setcpu\t\t\"6502\""); break;
case CPU_65SC02: AddTextLine ("\t.setcpu\t\t\"65SC02\""); break;
case CPU_65C02: AddTextLine ("\t.setcpu\t\t\"65C02\""); break;
case CPU_65816: AddTextLine ("\t.setcpu\t\t\"65816\""); break;
default: Internal ("Unknown CPU: %d", CPU);
}
/* Use smart mode */
AddTextLine ("\t.smart\t\ton");
/* Allow auto import for runtime library routines */
AddTextLine ("\t.autoimport\ton");
@ -283,7 +290,7 @@ unsigned sizeofarg (unsigned flags)
}
int pop (unsigned flags)
/* Pop an argument of the given size */
{
@ -920,7 +927,7 @@ void g_leasp (int offs)
AddCodeLine ("jsr leaasp"); /* Load effective address */
} else {
unsigned L = GetLocalLabel ();
if (CPU == CPU_65C02 && offs == 1) {
if ((CPUIsets[CPU] & CPU_ISET_65SC02) != 0 && offs == 1) {
AddCodeLine ("lda sp");
AddCodeLine ("ldx sp+1");
AddCodeLine ("ina");
@ -3247,7 +3254,7 @@ void g_inc (unsigned flags, unsigned long val)
case CF_CHAR:
if (flags & CF_FORCECHAR) {
if (CPU == CPU_65C02 && val <= 2) {
if ((CPUIsets[CPU] & CPU_ISET_65SC02) != 0 && val <= 2) {
while (val--) {
AddCodeLine ("ina");
}
@ -3260,7 +3267,7 @@ void g_inc (unsigned flags, unsigned long val)
/* FALLTHROUGH */
case CF_INT:
if (CPU == CPU_65C02 && val == 1) {
if ((CPUIsets[CPU] & CPU_ISET_65SC02) != 0 && val == 1) {
unsigned L = GetLocalLabel();
AddCodeLine ("ina");
AddCodeLine ("bne %s", LocalLabelName (L));
@ -3341,7 +3348,7 @@ void g_dec (unsigned flags, unsigned long val)
case CF_CHAR:
if (flags & CF_FORCECHAR) {
if (CPU == CPU_65C02 && val <= 2) {
if ((CPUIsets[CPU] & CPU_ISET_65SC02) != 0 && val <= 2) {
while (val--) {
AddCodeLine ("dea");
}

4
src/cc65/codeopt.c
View File

@ -7,7 +7,7 @@
/* */
/* */
/* (C) 2001-2003 Ullrich von Bassewitz */
/* Römerstrasse 52 */
/* Römerstraße 52 */
/* D-70794 Filderstadt */
/* EMail: uz@cc65.org */
/* */
@ -1997,7 +1997,7 @@ static unsigned RunOptGroup4 (CodeSeg* S)
{
unsigned Changes = 0;
if (CPU >= CPU_65C02) {
if (CPUIsets[CPU] & CPU_ISET_65SC02) {
Changes += RunOptFunc (S, &DOpt65C02BitOps, 1);
Changes += RunOptFunc (S, &DOpt65C02Ind, 1);
Changes += RunOptFunc (S, &DOpt65C02Stores, 1);

6
src/cc65/coptind.c
View File

@ -1447,9 +1447,9 @@ unsigned OptBranchDist (CodeSeg* S)
}
} else if (CPU == CPU_65C02 &&
(E->Info & OF_UBRA) != 0 &&
E->JumpTo != 0 &&
} else if ((CPUIsets[CPU] & CPU_ISET_65SC02) != 0 &&
(E->Info & OF_UBRA) != 0 &&
E->JumpTo != 0 &&
IsShortDist (GetBranchDist (S, I, E->JumpTo->Owner))) {
/* The jump is short and may be replaced by a BRA on the 65C02 CPU */

8
src/cc65/coptsize.c
View File

@ -6,9 +6,9 @@
/* */
/* */
/* */
/* (C) 2002 Ullrich von Bassewitz */
/* Wacholderweg 14 */
/* D-70597 Stuttgart */
/* (C) 2002-2003 Ullrich von Bassewitz */
/* Römerstraße 52 */
/* D-70794 Filderstadt */
/* EMail: uz@cc65.org */
/* */
/* */
@ -297,7 +297,7 @@ unsigned OptSize2 (CodeSeg* S)
X = NewCodeEntry (OP65_TXA, AM65_IMP, 0, 0, E->LI);
} else if (Val == In->RegY) {
X = NewCodeEntry (OP65_TYA, AM65_IMP, 0, 0, E->LI);
} else if (RegValIsKnown (In->RegA) && CPU >= CPU_65C02) {
} else if (RegValIsKnown (In->RegA) && (CPUIsets[CPU] & CPU_ISET_65SC02) != 0) {
if (Val == ((In->RegA - 1) & 0xFF)) {
X = NewCodeEntry (OP65_DEA, AM65_IMP, 0, 0, E->LI);
} else if (Val == ((In->RegA + 1) & 0xFF)) {

8
src/cc65/main.c
View File

@ -393,7 +393,8 @@ static void OptCPU (const char* Opt, const char* Arg)
{
/* Find the CPU from the given name */
CPU = FindCPU (Arg);
if (CPU != CPU_6502 && CPU != CPU_65C02) {
if (CPU != CPU_6502 && CPU != CPU_65SC02 &&
CPU != CPU_65C02 && CPU != CPU_65816) {
AbEnd ("Invalid argument for %s: `%s'", Opt, Arg);
}
}
@ -853,6 +854,11 @@ int main (int argc, char* argv[])
}
}
/* If no memory model was given, use the default */
if (MemoryModel == MMODEL_UNKNOWN) {
SetMemoryModel (MMODEL_NEAR);
}
/* Go! */
Compile (InputFile);

10
src/cc65/opcodes.c
View File

@ -6,9 +6,9 @@
/* */
/* */
/* */
/* (C) 2001-2002 Ullrich von Bassewitz */
/* Wacholderweg 14 */
/* D-70597 Stuttgart */
/* (C) 2001-2003 Ullrich von Bassewitz */
/* Römerstraße 52 */
/* D-70794 Filderstadt */
/* EMail: uz@cc65.org */
/* */
/* */
@ -449,7 +449,7 @@ const OPCDesc OPCTable[OPCODE_COUNT] = {
REG_NONE, /* use */
REG_NONE, /* chg */
OF_SETF /* flags */
},
},
/* Mark RTI as "uses all registers but doesn't change them", so the
* optimizer won't remove preceeding loads.
*/
@ -726,7 +726,7 @@ opc_t MakeShortBranch (opc_t OPC)
case OP65_BVS:
case OP65_JVS: return OP65_BVS;
case OP65_BRA:
case OP65_JMP: return (CPU == CPU_65C02)? OP65_BRA : OP65_JMP;
case OP65_JMP: return (CPUIsets[CPU] & CPU_ISET_65SC02)? OP65_BRA : OP65_JMP;
default:
Internal ("MakeShortBranch: Invalid opcode: %d", OPC);
return 0;