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More register tracking
git-svn-id: svn://svn.cc65.org/cc65/trunk@815 b7a2c559-68d2-44c3-8de9-860c34a00d81
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@ -317,7 +317,7 @@ void CE_GenRegInfo (CodeEntry* E, RegContents* InputRegs)
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} else {
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RC_Invalidate (&E->RI->In);
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}
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E->RI->Out = E->RI->In;
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E->RI->Out2 = E->RI->Out = E->RI->In;
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}
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/* Get pointers to the register contents */
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@ -130,8 +130,17 @@ static const FuncInfo FuncInfoTable[] = {
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{ "shreax3", REG_AX, REG_AX },
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{ "staspidx", REG_A | REG_Y, REG_Y },
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{ "tosicmp", REG_AX, REG_AXY },
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{ "tosdiva0", REG_AX, REG_AXY },
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{ "tosdivax", REG_AX, REG_AXY },
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{ "tosdiveax", REG_AX, REG_AXY },
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{ "tosmula0", REG_AX, REG_AXY },
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{ "tosmulax", REG_AX, REG_AXY },
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{ "tosmuleax", REG_AX, REG_AXY },
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{ "tosshreax", REG_AX, REG_AXY },
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};
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{ "tosumula0", REG_AX, REG_AXY },
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{ "tosumulax", REG_AX, REG_AXY },
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{ "tosumuleax", REG_AX, REG_AXY },
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};
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#define FuncInfoCount (sizeof(FuncInfoTable) / sizeof(FuncInfoTable[0]))
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/* Table with names of zero page locations used by the compiler */
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@ -586,6 +586,22 @@ void CS_MoveEntries (CodeSeg* S, unsigned Start, unsigned Count, unsigned NewPos
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struct CodeEntry* CS_GetPrevEntry (CodeSeg* S, unsigned Index)
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/* Get the code entry preceeding the one with the index Index. If there is no
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* preceeding code entry, return NULL.
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*/
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{
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if (Index == 0) {
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/* This is the first entry */
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return 0;
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} else {
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/* Previous entry available */
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return CollAtUnchecked (&S->Entries, Index-1);
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}
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}
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struct CodeEntry* CS_GetNextEntry (CodeSeg* S, unsigned Index)
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/* Get the code entry following the one with the index Index. If there is no
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* following code entry, return NULL.
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@ -1032,6 +1048,8 @@ void CS_GenRegInfo (CodeSeg* S)
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WasJump = 0;
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for (I = 0; I < CS_GetEntryCount (S); ++I) {
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CodeEntry* P;
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/* Get the next instruction */
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CodeEntry* E = CollAtUnchecked (&S->Entries, I);
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@ -1053,7 +1071,7 @@ void CS_GenRegInfo (CodeSeg* S)
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/* Preceeding insn was an unconditional branch */
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CodeEntry* J = CL_GetRef(Label, 0);
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if (J->RI) {
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Regs = J->RI->Out;
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Regs = J->RI->Out2;
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} else {
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RC_Invalidate (&Regs);
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}
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@ -1071,13 +1089,13 @@ void CS_GenRegInfo (CodeSeg* S)
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RC_Invalidate (&Regs);
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break;
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}
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if (J->RI->Out.RegA != Regs.RegA) {
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if (J->RI->Out2.RegA != Regs.RegA) {
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Regs.RegA = -1;
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}
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if (J->RI->Out.RegX != Regs.RegX) {
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if (J->RI->Out2.RegX != Regs.RegX) {
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Regs.RegX = -1;
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}
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if (J->RI->Out.RegY != Regs.RegY) {
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if (J->RI->Out2.RegY != Regs.RegY) {
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Regs.RegY = -1;
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}
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++Entry;
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@ -1091,11 +1109,135 @@ void CS_GenRegInfo (CodeSeg* S)
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/* Generate register info for this instruction */
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CE_GenRegInfo (E, CurrentRegs);
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/* Remember for the next insn if this insn was an uncondition branch */
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WasJump = (E->Info & OF_UBRA) != 0;
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/* Output registers for this insn are input for the next */
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CurrentRegs = &E->RI->Out;
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/* Remember for the next insn if this insn was an uncondition branch */
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WasJump = (E->Info & OF_UBRA) != 0;
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/* If this insn is a branch on zero flag, we may have more info on
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* register contents for one of both flow directions, but only if
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* there is a previous instruction.
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*/
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if ((E->Info & OF_ZBRA) != 0 && (P = CS_GetPrevEntry (S, I)) != 0) {
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/* Get the branch condition */
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bc_t BC = GetBranchCond (E->OPC);
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/* Check the previous instruction */
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switch (P->OPC) {
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case OP65_ADC:
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case OP65_AND:
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case OP65_DEA:
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case OP65_EOR:
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case OP65_INA:
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case OP65_LDA:
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case OP65_ORA:
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case OP65_PLA:
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case OP65_SBC:
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/* A is zero in one execution flow direction */
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if (BC == BC_EQ) {
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E->RI->Out2.RegA = 0;
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} else {
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E->RI->Out.RegA = 0;
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}
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break;
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case OP65_CMP:
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/* If this is an immidiate compare, the A register has
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* the value of the compare later.
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*/
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if (CE_KnownImm (P)) {
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if (BC == BC_EQ) {
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E->RI->Out2.RegA = (unsigned char)P->Num;
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} else {
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E->RI->Out.RegA = (unsigned char)P->Num;
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}
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}
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break;
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case OP65_CPX:
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/* If this is an immidiate compare, the X register has
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* the value of the compare later.
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*/
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if (CE_KnownImm (P)) {
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if (BC == BC_EQ) {
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E->RI->Out2.RegX = (unsigned char)P->Num;
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} else {
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E->RI->Out.RegX = (unsigned char)P->Num;
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}
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}
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break;
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case OP65_CPY:
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/* If this is an immidiate compare, the Y register has
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* the value of the compare later.
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*/
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if (CE_KnownImm (P)) {
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if (BC == BC_EQ) {
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E->RI->Out2.RegY = (unsigned char)P->Num;
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} else {
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E->RI->Out.RegY = (unsigned char)P->Num;
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}
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}
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break;
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case OP65_DEX:
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case OP65_INX:
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case OP65_LDX:
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case OP65_PLX:
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/* X is zero in one execution flow direction */
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if (BC == BC_EQ) {
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E->RI->Out2.RegX = 0;
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} else {
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E->RI->Out.RegX = 0;
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}
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break;
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case OP65_DEY:
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case OP65_INY:
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case OP65_LDY:
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case OP65_PLY:
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/* X is zero in one execution flow direction */
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if (BC == BC_EQ) {
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E->RI->Out2.RegY = 0;
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} else {
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E->RI->Out.RegY = 0;
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}
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break;
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case OP65_TAX:
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case OP65_TXA:
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/* If the branch is a beq, both A and X are zero at the
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* branch target, otherwise they are zero at the next
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* insn.
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*/
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if (BC == BC_EQ) {
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E->RI->Out2.RegA = E->RI->Out2.RegX = 0;
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} else {
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E->RI->Out.RegA = E->RI->Out.RegX = 0;
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}
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break;
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case OP65_TAY:
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case OP65_TYA:
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/* If the branch is a beq, both A and Y are zero at the
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* branch target, otherwise they are zero at the next
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* insn.
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*/
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if (BC == BC_EQ) {
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E->RI->Out2.RegA = E->RI->Out2.RegY = 0;
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} else {
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E->RI->Out.RegA = E->RI->Out.RegY = 0;
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}
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break;
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default:
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break;
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}
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}
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}
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}
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@ -149,6 +149,11 @@ INLINE struct CodeEntry* CS_GetEntry (CodeSeg* S, unsigned Index)
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# define CS_GetEntry(S, Index) CollAt(&(S)->Entries, (Index))
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#endif
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struct CodeEntry* CS_GetPrevEntry (CodeSeg* S, unsigned Index);
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/* Get the code entry preceeding the one with the index Index. If there is no
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* preceeding code entry, return NULL.
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*/
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struct CodeEntry* CS_GetNextEntry (CodeSeg* S, unsigned Index);
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/* Get the code entry following the one with the index Index. If there is no
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* following code entry, return NULL.
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@ -70,11 +70,13 @@ RegInfo* NewRegInfo (const RegContents* RC)
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/* Initialize the registers */
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if (RC) {
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RI->In = *RC;
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RI->Out = *RC;
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RI->In = *RC;
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RI->Out = *RC;
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RI->Out2 = *RC;
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} else {
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RC_Invalidate (&RI->In);
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RC_Invalidate (&RI->Out);
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RC_Invalidate (&RI->Out2);
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}
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/* Return the new struct */
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@ -62,8 +62,9 @@ struct RegContents {
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/* Register change info */
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typedef struct RegInfo RegInfo;
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struct RegInfo {
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RegContents In; /* Incoming register values */
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RegContents Out; /* Outgoing register values */
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RegContents In; /* Incoming register values */
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RegContents Out; /* Outgoing register values */
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RegContents Out2; /* Alternative outgoing reg values for branches */
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};
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