6502/cc65
1
0
Fork 0
mirror of https://github.com/cc65/cc65.git synced 2024-06-17 00:29:31 +00:00
Code Issues Projects Releases Wiki Activity

Added missing VIA registers. Register names from the COMPUTE!'s book 'Mapping the VIC'

Browse Source
This commit is contained in:
Olli Savia 2018-04-11 22:38:23 +03:00
parent 60b9ea3222
commit 165b98bba5
1 changed files with 36 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

45
asminc/vic20.inc
View File

@ -66,16 +66,43 @@ VIC_COLOR := $900F ; Border and background color
; ---------------------------------------------------------------------------
; I/O: 6522 VIA1
VIA1 := $9110
VIA1_JOY := $9111
VIA1_DDRB := $9112
VIA1_DDRA := $9113
VIA1 := $9110 ; *** Deprecated ***
VIA1_JOY := $9111 ; *** Deprecated ***
VIA1_PB := $9110 ; Port register B
VIA1_PA1 := $9111 ; Port register A
VIA1_DDRB := $9112 ; Data direction register B
VIA1_DDRA := $9113 ; Data direction register A
VIA1_T1CL := $9114 ; Timer 1, low byte
VIA1_T1CH := $9115 ; Timer 1, high byte
VIA1_T1LL := $9116 ; Timer 1 latch, low byte
VIA1_T1LH := $9117 ; Timer 1 latch, high byte
VIA1_T2CL := $9118 ; Timer 2, low byte
VIA1_T2CH := $9119 ; Timer 2, high byte
VIA1_SR := $911A ; Shift register
VIA1_CR := $911B ; Auxiliary control register
VIA1_PCR := $911C ; Peripheral control register
VIA1_IFR := $911D ; Interrupt flag register
VIA1_IER := $911E ; Interrupt enable register
VIA1_PA2 := $911F ; Port register A w/o handshake
; ---------------------------------------------------------------------------
; I/O: 6522 VIA2
VIA2 := $9120
VIA2_JOY := $9120
VIA2_DDRB := $9122
VIA2_DDRA := $9123
VIA2 := $9120 ; *** Deprecated ***
VIA2_JOY := $9120 ; *** Deprecated ***
VIA2_PB := $9120 ; Port register B
VIA2_PA1 := $9121 ; Port register A
VIA2_DDRB := $9122 ; Data direction register B
VIA2_DDRA := $9123 ; Data direction register A
VIA2_T1CL := $9124 ; Timer 1, low byte
VIA2_T1CH := $9125 ; Timer 1, high byte
VIA2_T1LL := $9126 ; Timer 1 latch, low byte
VIA2_T1LH := $9127 ; Timer 1 latch, high byte
VIA2_T2CL := $9128 ; Timer 2, low byte
VIA2_T2CH := $9129 ; Timer 2, high byte
VIA2_SR := $912A ; Shift register
VIA2_CR := $912B ; Auxiliary control register
VIA2_PCR := $912C ; Peripheral control register
VIA2_IFR := $912D ; Interrupt flag register
VIA2_IER := $912E ; Interrupt enable register
VIA2_PA2 := $912F ; Port register A w/o handshake