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Added missing VIA registers. Register names from the COMPUTE!'s book 'Mapping the VIC'
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@ -66,16 +66,43 @@ VIC_COLOR := $900F ; Border and background color
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; ---------------------------------------------------------------------------
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; I/O: 6522 VIA1
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VIA1 := $9110
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VIA1_JOY := $9111
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VIA1_DDRB := $9112
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VIA1_DDRA := $9113
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VIA1 := $9110 ; *** Deprecated ***
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VIA1_JOY := $9111 ; *** Deprecated ***
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VIA1_PB := $9110 ; Port register B
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VIA1_PA1 := $9111 ; Port register A
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VIA1_DDRB := $9112 ; Data direction register B
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VIA1_DDRA := $9113 ; Data direction register A
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VIA1_T1CL := $9114 ; Timer 1, low byte
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VIA1_T1CH := $9115 ; Timer 1, high byte
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VIA1_T1LL := $9116 ; Timer 1 latch, low byte
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VIA1_T1LH := $9117 ; Timer 1 latch, high byte
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VIA1_T2CL := $9118 ; Timer 2, low byte
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VIA1_T2CH := $9119 ; Timer 2, high byte
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VIA1_SR := $911A ; Shift register
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VIA1_CR := $911B ; Auxiliary control register
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VIA1_PCR := $911C ; Peripheral control register
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VIA1_IFR := $911D ; Interrupt flag register
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VIA1_IER := $911E ; Interrupt enable register
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VIA1_PA2 := $911F ; Port register A w/o handshake
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; ---------------------------------------------------------------------------
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; I/O: 6522 VIA2
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VIA2 := $9120
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VIA2_JOY := $9120
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VIA2_DDRB := $9122
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VIA2_DDRA := $9123
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VIA2 := $9120 ; *** Deprecated ***
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VIA2_JOY := $9120 ; *** Deprecated ***
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VIA2_PB := $9120 ; Port register B
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VIA2_PA1 := $9121 ; Port register A
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VIA2_DDRB := $9122 ; Data direction register B
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VIA2_DDRA := $9123 ; Data direction register A
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VIA2_T1CL := $9124 ; Timer 1, low byte
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VIA2_T1CH := $9125 ; Timer 1, high byte
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VIA2_T1LL := $9126 ; Timer 1 latch, low byte
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VIA2_T1LH := $9127 ; Timer 1 latch, high byte
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VIA2_T2CL := $9128 ; Timer 2, low byte
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VIA2_T2CH := $9129 ; Timer 2, high byte
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VIA2_SR := $912A ; Shift register
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VIA2_CR := $912B ; Auxiliary control register
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VIA2_PCR := $912C ; Peripheral control register
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VIA2_IFR := $912D ; Interrupt flag register
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VIA2_IER := $912E ; Interrupt enable register
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VIA2_PA2 := $912F ; Port register A w/o handshake
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