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https://github.com/cc65/cc65.git
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Merge pull request #2478 from alexthissen/lynx-include
Lynx cc65 and ca65 include file improvements for Mikey and Suzy
This commit is contained in:
Bob Andrews
GitHub
commit
36132a437b
227
asminc/lynx.inc
227
asminc/lynx.inc
@ -79,7 +79,7 @@ MATHL = $FC6D
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MATHK = $FC6E
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MATHK = $FC6E
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MATHJ = $FC6F
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MATHJ = $FC6F
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; Suzy Misc
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; Suzy sprite engine
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SPRCTL0 = $FC80
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SPRCTL0 = $FC80
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; Sprite bits-per-pixel definitions
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; Sprite bits-per-pixel definitions
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@ -122,10 +122,48 @@ SPRINIT = $FC83
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SUZYHREV = $FC88
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SUZYHREV = $FC88
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SUZYSREV = $FC89
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SUZYSREV = $FC89
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SUZYBUSEN = $FC90
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SUZYBUSEN = $FC90
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SPRGO = $FC91
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SPRGO = $FC91
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; SPRGO bit definitions
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SPRITE_GO = %00000001 ; sprite process start bit
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EVER_ON = %00000100 ; everon detector enable
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SPRSYS = $FC92
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SPRSYS = $FC92
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; SPRSYS bit definitions for write operations
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SIGNMATH = %10000000 ; signed math
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ACCUMULATE = %01000000 ; accumulate multiplication results
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NO_COLLIDE = %00100000 ; do not collide with any sprites (also SPRCOLL bit definition)
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VSTRETCH = %00010000 ; stretch v
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LEFTHAND = %00001000
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CLR_UNSAFE = %00000100 ; unsafe access reset
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SPRITESTOP = %00000010 ; request to stop sprite process
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; SPRSYS bit definitions for read operations
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MATHWORKING = %10000000 ; math operation in progress
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MATHWARNING = %01000000 ; accumulator overflow on multiple or divide by zero
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MATHCARRY = %00100000 ; last carry bit
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VSTRETCHING = %00010000
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LEFTHANDED = %00001000
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UNSAFE_ACCESS = %00000100 ; unsafe access performed
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SPRITETOSTOP = %00000010 ; requested to stop
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SPRITEWORKING = %00000001 ; sprite process is active
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JOYSTICK = $FCB0
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JOYSTICK = $FCB0
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; JOYSTICK bit definitions
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JOYPAD_UP = %10000000
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JOYPAD_DOWN = %01000000
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JOYPAD_LEFT = %00100000
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JOYPAD_RIGHT = %00010000
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BUTTON_OPTION1 = %00001000
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BUTTON_OPTION2 = %00000100
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BUTTON_INNER = %00000010
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BUTTON_OUTER = %00000001
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SWITCHES = $FCB1
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SWITCHES = $FCB1
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; SWITCHES bit definitions
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CART1_IO_INACTIVE = %00000100
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CART0_IO_INACTIVE = %00000010
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BUTTON_PAUSE = %00000001
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RCART0 = $FCB2
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RCART0 = $FCB2
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RCART1 = $FCB3
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RCART1 = $FCB3
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LEDS = $FCC0
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LEDS = $FCC0
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@ -133,13 +171,13 @@ PARSTATUS = $FCC2
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PARDATA = $FCC3
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PARDATA = $FCC3
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HOWIE = $FCC4
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HOWIE = $FCC4
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;
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; ***
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; *** Mikey Addresses
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; *** Mikey Addresses
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; ***
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; ***
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; Mikey Timers
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; Mikey timers
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; Logical timer names
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TIMER0 = $FD00
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TIMER0 = $FD00
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TIMER1 = $FD04
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TIMER1 = $FD04
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TIMER2 = $FD08
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TIMER2 = $FD08
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@ -148,9 +186,9 @@ TIMER4 = $FD10
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TIMER5 = $FD14
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TIMER5 = $FD14
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TIMER6 = $FD18
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TIMER6 = $FD18
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TIMER7 = $FD1C
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TIMER7 = $FD1C
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HTIMER = $FD00 ; horizontal line timer (timer 0)
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HTIMER = TIMER0 ; horizontal line timer (timer 0)
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VTIMER = $FD08 ; vertical blank timer (timer 2)
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VTIMER = TIMER2 ; vertical blank timer (timer 2)
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STIMER = $FD1C ; sound timer (timer 7)
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STIMER = TIMER7 ; sound timer (timer 7)
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HTIMBKUP = $FD00 ; horizontal line timer (timer 0)
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HTIMBKUP = $FD00 ; horizontal line timer (timer 0)
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HTIMCTLA = $FD01
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HTIMCTLA = $FD01
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@ -199,6 +237,34 @@ TIM7CTLA = $FD1D
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TIM7CNT = $FD1E
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TIM7CNT = $FD1E
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TIM7CTLB = $FD1F
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TIM7CTLB = $FD1F
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; Timer offsets
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TIM_BACKUP = 0
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TIM_CONTROLA = 1
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TIM_COUNT = 2
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TIM_CONTROLB = 3
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; TIM_CONTROLA control bits
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ENABLE_INT = %10000000
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RESET_DONE = %01000000
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ENABLE_RELOAD = %00010000
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ENABLE_COUNT = %00001000
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AUD_CLOCK_MASK = %00000111
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; Clock settings
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AUD_LINKING = %00000111
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AUD_64 = %00000110
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AUD_32 = %00000101
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AUD_16 = %00000100
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AUD_8 = %00000011
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AUD_4 = %00000010
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AUD_2 = %00000001
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AUD_1 = %00000000
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; TIM_CONTROLB control bits
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TIMER_DONE = %00001000
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LAST_CLOCK = %00000100
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BORROW_IN = %00000010
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BORROW_OUT = %00000001
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; Mikey Audio
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; Mikey Audio
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AUDIO0 = $FD20 ; audio channel 0
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AUDIO0 = $FD20 ; audio channel 0
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@ -238,85 +304,153 @@ AUD3BKUP = $FD3C
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AUD3CTLA = $FD3D
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AUD3CTLA = $FD3D
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AUD3CNT = $FD3E
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AUD3CNT = $FD3E
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AUD3CTLB = $FD3F
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AUD3CTLB = $FD3F
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MSTEREO = $FD50
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; Mikey Misc
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; AUD_CONTROL bits are almost identical to TIM_CONTROLA bits.
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; See TIM_CONTROLA above for the other definitions
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FEEDBACK_7 = %10000000
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ENABLE_INTEGRATE = %00100000
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; Stereo control registers follow
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; Stereo capability does not exist in all Lynxes
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; Left and right may be reversed, and if so will be corrected in a later
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; release
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ATTENREG0 = $FD40 ; Stereo attenuation registers
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ATTENREG1 = $FD41
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ATTENREG2 = $FD42
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ATTENREG3 = $FD43
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MPAN = $FD44
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MSTEREO = $FD50
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; Bit definitions for MPAN and MSTEREO registers
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LEFT_ATTENMASK = %11110000
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RIGHT_ATTENMASK = %00001111
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LEFT3_SELECT = %10000000
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LEFT2_SELECT = %01000000
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LEFT1_SELECT = %00100000
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LEFT0_SELECT = %00010000
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RIGHT3_SELECT = %00001000
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RIGHT2_SELECT = %00000100
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RIGHT1_SELECT = %00000010
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RIGHT0_SELECT = %00000001
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; Mikey interrupts
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INTRST = $FD80
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INTSET = $FD81
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; Interrupt bits in INTRST and INTSET
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; Interrupt bits in INTRST and INTSET
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TIMER0_INTERRUPT = $01
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TIMER0_INTERRUPT = %00000001
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TIMER1_INTERRUPT = $02
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TIMER1_INTERRUPT = %00000010
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TIMER2_INTERRUPT = $04
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TIMER2_INTERRUPT = %00000100
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TIMER3_INTERRUPT = $08
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TIMER3_INTERRUPT = %00001000
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TIMER4_INTERRUPT = $10
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TIMER4_INTERRUPT = %00010000
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TIMER5_INTERRUPT = $20
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TIMER5_INTERRUPT = %00100000
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TIMER6_INTERRUPT = $40
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TIMER6_INTERRUPT = %01000000
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TIMER7_INTERRUPT = $80
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TIMER7_INTERRUPT = %10000000
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HBL_INTERRUPT = TIMER0_INTERRUPT
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HBL_INTERRUPT = TIMER0_INTERRUPT
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VBL_INTERRUPT = TIMER2_INTERRUPT
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VBL_INTERRUPT = TIMER2_INTERRUPT
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SERIAL_INTERRUPT = TIMER4_INTERRUPT
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SERIAL_INTERRUPT = TIMER4_INTERRUPT
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SND_INTERRUPT = TIMER7_INTERRUPT
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SND_INTERRUPT = TIMER7_INTERRUPT
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INTRST = $FD80
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INTSET = $FD81
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MAGRDY0 = $FD84
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MAGRDY0 = $FD84
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MAGRDY1 = $FD85
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MAGRDY1 = $FD85
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AUDIN = $FD86
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AUDIN = $FD86
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SYSCTL1 = $FD87
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SYSCTL1 = $FD87
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; SYSCTL1 bit definitions
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POWERON = %00000010
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CART_ADDR_STROBE = %00000001
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MIKEYHREV = $FD88
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MIKEYHREV = $FD88
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MIKEYSREV = $FD89
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MIKEYSREV = $FD89
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IODIR = $FD8A
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IODIR = $FD8A
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IODAT = $FD8B
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IODAT = $FD8B
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; IODIR and IODAT bit definitions
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; IODIR and IODAT bit definitions
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AUDIN_BIT = $10 ; Note that there is also the address AUDIN
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AUDIN_BIT = %00010000 ; Note that there is also the address AUDIN
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READ_ENABLE = $10 ; Same bit for AUDIN_BIT
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READ_ENABLE = %00010000 ; Same bit for AUDIN_BIT
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RESTLESS = $08
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RESTLESS = %00001000
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NOEXP = $04 ; If set, redeye is not connected
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NOEXP = %00000100 ; If set, redeye is not connected
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CART_ADDR_DATA = $02
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CART_ADDR_DATA = %00000010
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CART_POWER_OFF = $02 ; Same bit for CART_ADDR_DATA
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CART_POWER_OFF = %00000010 ; Same bit for CART_ADDR_DATA
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EXTERNAL_POWER = $01
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EXTERNAL_POWER = %00000001
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SERCTL = $FD8C
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SERCTL = $FD8C
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; SERCTL bit definitions for write operations
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; SERCTL bit definitions for write operations
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TXINTEN = $80
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TXINTEN = %10000000
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RXINTEN = $40
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RXINTEN = %01000000
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PAREN = $10
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PAREN = %00010000
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RESETERR = $08
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RESETERR = %00001000
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TXOPEN = $04
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TXOPEN = %00000100
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TXBRK = $02
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TXBRK = %00000010
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PAREVEN = $01
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PAREVEN = %00000001
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; SERCTL bit definitions for read operations
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; SERCTL bit definitions for read operations
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TXRDY = $80
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TXRDY = %10000000
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RXRDY = $40
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RXRDY = %01000000
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TXEMPTY = $20
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TXEMPTY = %00100000
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PARERR = $10
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PARERR = %00010000
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OVERRUN = $08
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OVERRUN = %00001000
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FRAMERR = $04
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FRAMERR = %00000100
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RXBRK = $02
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RXBRK = %00000010
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PARBIT = $01
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PARBIT = %00000001
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SERDAT = $FD8D
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SERDAT = $FD8D
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SDONEACK = $FD90
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SDONEACK = $FD90
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CPUSLEEP = $FD91
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CPUSLEEP = $FD91
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DISPCTL = $FD92
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DISPCTL = $FD92
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; DISPCTL bit definitions
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DISP_COLOR = %10000000 ; must be set to 1
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DISP_FOURBIT = %01000000 ; must be set to 1
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DISP_FLIP = %00100000
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DMA_ENABLE = %00010000 ; must be set to 1
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PBKUP = $FD93
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PBKUP = $FD93
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DISPADRL = $FD94
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DISPADRL = $FD94
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DISPADRH = $FD95
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DISPADRH = $FD95
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MTEST0 = $FD9C
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MTEST0 = $FD9C
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; MTEST0 bit definitions
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AT_CNT16 = %10000000
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AT_TEST = %01000000
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XCLKEN = %00100000
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UART_TURBO = %00010000
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ROM_SEL = %00001000
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ROM_TEST = %00000100
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M_TEST = %00000010
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CPU_TEST = %00000001
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MTEST1 = $FD9D
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MTEST1 = $FD9D
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; MTEST1 bit definitions
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P_CNT16 = %01000000
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REF_CNT16 = %00100000
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VID_TRIG = %00010000
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REF_TRIG = %00001000
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VID_DMA_DIS = %00000100
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REF_FAST = %00000010
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REF_DIS = %00000001
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MTEST2 = $FD9E
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MTEST2 = $FD9E
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; MTEST2 bit definitions
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V_STROBE = %00010000
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V_ZERO = %00001000
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H_120 = %00000100
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H_ZERO = %00000010
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V_BLANKEF = %00000001
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PALETTE = $FDA0 ; hardware rgb palette
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PALETTE = $FDA0 ; hardware rgb palette
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GCOLMAP = $FDA0 ; hardware rgb palette (green)
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GCOLMAP = $FDA0 ; hardware rgb palette (green)
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RBCOLMAP = $FDB0 ; hardware rgb palette (red-blue)
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RBCOLMAP = $FDB0 ; hardware rgb palette (red-blue)
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; Memory mapping control and 6502 vectors
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; ***
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; *** Misc Hardware + 6502 vectors
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; ***
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MAPCTL = $FFF9
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MAPCTL = $FFF9
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; MAPCTL bit definitions
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TURBO_DISABLE = %10000000
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VECTOR_SPACE = %00001000 ; 1 maps RAM into specified space
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ROM_SPACE = %00000100
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MIKEY_SPACE = %00000010
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SUZY_SPACE = %00000001
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VECTORS = $FFFB
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VECTORS = $FFFB
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INTVECTL = $FFFE
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INTVECTL = $FFFE
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INTVECTH = $FFFF
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INTVECTH = $FFFF
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@ -324,4 +458,3 @@ RSTVECTL = $FFFC
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RSTVECTH = $FFFD
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RSTVECTH = $FFFD
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NMIVECTL = $FFFA
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NMIVECTL = $FFFA
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NMIVECTH = $FFFB
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NMIVECTH = $FFFB
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256
include/_mikey.h
256
include/_mikey.h
@ -27,7 +27,7 @@
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#ifndef __MIKEY_H
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#ifndef __MIKEY_H
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#define __MIKEY_H
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#define __MIKEY_H
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/* timer structure */
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/* Timer structure */
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typedef struct _mikey_timer {
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typedef struct _mikey_timer {
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unsigned char reload;
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unsigned char reload;
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unsigned char control;
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unsigned char control;
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@ -39,7 +39,7 @@ typedef struct _mikey_all_timers {
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struct _mikey_timer timer[8];
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struct _mikey_timer timer[8];
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} _mikey_all_timers;
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} _mikey_all_timers;
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/* audio channel structure */
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/* Audio channel structure */
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typedef struct _mikey_audio {
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typedef struct _mikey_audio {
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unsigned char volume;
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unsigned char volume;
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unsigned char feedback;
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unsigned char feedback;
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@ -53,54 +53,212 @@ typedef struct _mikey_audio {
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/* Define a structure with the mikey register offsets */
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/* Define a structure with the mikey register offsets */
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struct __mikey {
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struct __mikey {
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struct _mikey_timer timer0; // 0xFD00
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struct _mikey_timer timer0; /* 0xFD00 */
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struct _mikey_timer timer1; // 0xFD04
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struct _mikey_timer timer1; /* 0xFD04 */
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struct _mikey_timer timer2; // 0xFD08
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struct _mikey_timer timer2; /* 0xFD08 */
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struct _mikey_timer timer3; // 0xFD0C
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struct _mikey_timer timer3; /* 0xFD0C */
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struct _mikey_timer timer4; // 0xFD10
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struct _mikey_timer timer4; /* 0xFD10 */
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struct _mikey_timer timer5; // 0xFD14
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struct _mikey_timer timer5; /* 0xFD14 */
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struct _mikey_timer timer6; // 0xFD18
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struct _mikey_timer timer6; /* 0xFD18 */
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struct _mikey_timer timer7; // 0xFD1C
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struct _mikey_timer timer7; /* 0xFD1C */
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struct _mikey_audio channel_a; // 0xFD20
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struct _mikey_audio channel_a; /* 0xFD20 */
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struct _mikey_audio channel_b; // 0xFD28
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struct _mikey_audio channel_b; /* 0xFD28 */
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struct _mikey_audio channel_c; // 0xFD30
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struct _mikey_audio channel_c; /* 0xFD30 */
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struct _mikey_audio channel_d; // 0xFD38
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struct _mikey_audio channel_d; /* 0xFD38 */
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unsigned char attena; // 0xFD40 ?? not yet allocated?
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unsigned char attena; /* 0xFD40 ?? not yet allocated? */
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unsigned char attenb; // 0xFD41 |
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unsigned char attenb; /* 0xFD41 | */
|
||||||
unsigned char attenc; // 0xFD42 |
|
unsigned char attenc; /* 0xFD42 | */
|
||||||
unsigned char attend; // 0xFD43 |
|
unsigned char attend; /* 0xFD43 | */
|
||||||
unsigned char panning; // 0xFD44 |
|
unsigned char panning; /* 0xFD44 | */
|
||||||
unsigned char unused0[11]; // 0xFD45 - 0xFD4F not used
|
unsigned char unused0[11]; /* 0xFD45 - 0xFD4F not used */
|
||||||
unsigned char mstereo; // 0xFD50 stereo control bits
|
unsigned char mstereo; /* 0xFD50 stereo control bits */
|
||||||
unsigned char unused1[47]; // 0xFD51 - 0xFD7F not used
|
unsigned char unused1[47]; /* 0xFD51 - 0xFD7F not used */
|
||||||
unsigned char intrst; // 0xFD80 interrupt poll 0
|
unsigned char intrst; /* 0xFD80 interrupt poll 0 */
|
||||||
unsigned char intset; // 0xFD81 interrupt poll 1
|
unsigned char intset; /* 0xFD81 interrupt poll 1 */
|
||||||
unsigned char unused2[2]; // 0xFD82 - 0xFD83 not used
|
unsigned char unused2[2]; /* 0xFD82 - 0xFD83 not used */
|
||||||
unsigned char magrdy0; // 0xFD84 mag tape channel0 ready bit
|
unsigned char magrdy0; /* 0xFD84 mag tape channel0 ready bit */
|
||||||
unsigned char magrdy1; // 0xFD85 mag tape channel1 ready bit
|
unsigned char magrdy1; /* 0xFD85 mag tape channel1 ready bit */
|
||||||
unsigned char audin; // 0xFD86 audio in
|
unsigned char audin; /* 0xFD86 audio in */
|
||||||
unsigned char sysctl1; // 0xFD87 control bits
|
unsigned char sysctl1; /* 0xFD87 control bits */
|
||||||
unsigned char mikeyrev; // 0xFD88 mikey hardware rev
|
unsigned char mikeyrev; /* 0xFD88 mikey hardware rev */
|
||||||
unsigned char mikeysrev; // 0xFD89 mikey software rev
|
unsigned char mikeysrev; /* 0xFD89 mikey software rev */
|
||||||
unsigned char iodir; // 0xFD8A parallel i/o data dir
|
unsigned char iodir; /* 0xFD8A parallel i/o data dir */
|
||||||
unsigned char iodat; // 0xFD8B parallel data
|
unsigned char iodat; /* 0xFD8B parallel data */
|
||||||
unsigned char serctl; // 0xFD8C serial control register
|
unsigned char serctl; /* 0xFD8C serial control register */
|
||||||
unsigned char serdat; // 0xFD8D serial data
|
unsigned char serdat; /* 0xFD8D serial data */
|
||||||
unsigned char unused3[2]; // 0xFD8E - 0xFD8F not used
|
unsigned char unused3[2]; /* 0xFD8E - 0xFD8F not used */
|
||||||
unsigned char sdoneack; // 0xFD90 suzy done acknowledge
|
unsigned char sdoneack; /* 0xFD90 suzy done acknowledge */
|
||||||
unsigned char cpusleep; // 0xFD91 cpu bus request disable
|
unsigned char cpusleep; /* 0xFD91 cpu bus request disable */
|
||||||
unsigned char dispctl; // 0xFD92 video bus request enable, viddma
|
unsigned char dispctl; /* 0xFD92 video bus request enable, viddma */
|
||||||
unsigned char pkbkup; // 0xFD93 magic 'P' count
|
unsigned char pkbkup; /* 0xFD93 magic 'P' count */
|
||||||
unsigned char *scrbase; // 0xFD94 start address of video display
|
unsigned char *scrbase; /* 0xFD94 start address of video display */
|
||||||
unsigned char unused4[6]; // 0xFD96 - 0xFD9B not used
|
unsigned char unused4[6]; /* 0xFD96 - 0xFD9B not used */
|
||||||
unsigned char mtest0; // 0xFD9C
|
unsigned char mtest0; /* 0xFD9C */
|
||||||
unsigned char mtest1; // 0xFD9D
|
unsigned char mtest1; /* 0xFD9D */
|
||||||
unsigned char mtest2; // 0xFD9E
|
unsigned char mtest2; /* 0xFD9E */
|
||||||
unsigned char unused5; // 0xFD9F not used
|
unsigned char unused5; /* 0xFD9F not used */
|
||||||
unsigned char palette[32]; // 0xFDA0 - 0xFDBF palette 32 bytes
|
unsigned char palette[32]; /* 0xFDA0 - 0xFDBF palette 32 bytes */
|
||||||
// 0xFDC0 - 0xFDFF not used
|
unsigned char unused6[64]; /* 0xFDC0 - 0xFDFF not used */
|
||||||
|
unsigned char bootrom[504]; /* 0xFE00 - 0xFFD8 boot rom */
|
||||||
|
unsigned char reserved; /* 0xFFD8 reserved for future hardware */
|
||||||
|
unsigned char mapctl; /* 0xFFF9 map control register */
|
||||||
|
struct {
|
||||||
|
unsigned char *nmi; /* 0xFFFA NMI vector */
|
||||||
|
unsigned char *reset; /* 0xFFFB reset vector */
|
||||||
|
unsigned char *irq; /* 0xFFFC IRQ vector */
|
||||||
|
} vectors;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
/* TIM_CONTROLA control bit definitions */
|
||||||
|
enum {
|
||||||
|
ENABLE_INT = 0x80,
|
||||||
|
RESET_DONE = 0x40,
|
||||||
|
ENABLE_RELOAD = 0x10,
|
||||||
|
ENABLE_COUNT = 0x08
|
||||||
|
};
|
||||||
|
|
||||||
|
/* AUD_CONTROL control bit definitions */
|
||||||
|
enum {
|
||||||
|
FEEDBACK_7 = 0x80,
|
||||||
|
ENABLE_INTEGRATE = 0x20
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Audio and timer clock settings for source period */
|
||||||
|
enum {
|
||||||
|
AUD_LINKING = 0x07,
|
||||||
|
AUD_64 = 0x06,
|
||||||
|
AUD_32 = 0x05,
|
||||||
|
AUD_16 = 0x04,
|
||||||
|
AUD_8 = 0x03,
|
||||||
|
AUD_4 = 0x02,
|
||||||
|
AUD_2 = 0x01,
|
||||||
|
AUD_1 = 0x00
|
||||||
|
};
|
||||||
|
|
||||||
|
/* TIM_CONTROLB control bit definitions */
|
||||||
|
enum {
|
||||||
|
TIMER_DONE = 0x08,
|
||||||
|
LAST_CLOCK = 0x04,
|
||||||
|
BORROW_IN = 0x02,
|
||||||
|
BORROW_OUT = 0x01
|
||||||
|
};
|
||||||
|
|
||||||
|
/* MPAN and MSTEREO registers bit definitions */
|
||||||
|
enum {
|
||||||
|
LEFT3_SELECT = 0x80,
|
||||||
|
LEFT2_SELECT = 0x40,
|
||||||
|
LEFT1_SELECT = 0x20,
|
||||||
|
LEFT0_SELECT = 0x10,
|
||||||
|
RIGHT3_SELECT = 0x08,
|
||||||
|
RIGHT2_SELECT = 0x04,
|
||||||
|
RIGHT1_SELECT = 0x02,
|
||||||
|
RIGHT0_SELECT = 0x01,
|
||||||
|
LEFT_ATTENMASK = 0xF0,
|
||||||
|
RIGHT_ATTENMASK = 0x0F
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Interrupt Reset and Set bit definitions */
|
||||||
|
enum {
|
||||||
|
TIMER7_INT = 0x80,
|
||||||
|
TIMER6_INT = 0x40,
|
||||||
|
TIMER5_INT = 0x20,
|
||||||
|
TIMER4_INT = 0x10,
|
||||||
|
TIMER3_INT = 0x08,
|
||||||
|
TIMER2_INT = 0x04,
|
||||||
|
TIMER1_INT = 0x02,
|
||||||
|
TIMER0_INT = 0x01,
|
||||||
|
SERIAL_INT = TIMER4_INT,
|
||||||
|
VERTICAL_INT = TIMER2_INT,
|
||||||
|
HORIZONTAL_INT = TIMER0_INT
|
||||||
|
};
|
||||||
|
|
||||||
|
/* SYSCTL1 bit definitions */
|
||||||
|
enum {
|
||||||
|
POWERON = 0x02,
|
||||||
|
CART_ADDR_STROBE = 0x01
|
||||||
|
};
|
||||||
|
|
||||||
|
/* IODIR and IODAT bit definitions */
|
||||||
|
enum {
|
||||||
|
AUDIN_BIT = 0x10, /* different from AUDIN address */
|
||||||
|
READ_ENABLE = 0x10, /* same bit for AUDIN_BIT */
|
||||||
|
RESTLESS = 0x08,
|
||||||
|
NOEXP = 0x04, /* if set, redeye is not connected */
|
||||||
|
CART_ADDR_DATA = 0x02,
|
||||||
|
CART_POWER_OFF = 0x02, /* same bit for CART_ADDR_DATA */
|
||||||
|
EXTERNAL_POWER = 0x01
|
||||||
|
};
|
||||||
|
|
||||||
|
/* SERCTL bit definitions for write operations */
|
||||||
|
enum {
|
||||||
|
TXINTEN = 0x80,
|
||||||
|
RXINTEN = 0x40,
|
||||||
|
PAREN = 0x10,
|
||||||
|
RESETERR = 0x08,
|
||||||
|
TXOPEN = 0x04,
|
||||||
|
TXBRK = 0x02,
|
||||||
|
PAREVEN = 0x01
|
||||||
|
};
|
||||||
|
|
||||||
|
/* SERCTL bit definitions for read operations */
|
||||||
|
enum {
|
||||||
|
TXRDY = 0x80,
|
||||||
|
RXRDY = 0x40,
|
||||||
|
TXEMPTY = 0x20,
|
||||||
|
PARERR = 0x10,
|
||||||
|
OVERRUN = 0x08,
|
||||||
|
FRAMERR = 0x04,
|
||||||
|
RXBRK = 0x02,
|
||||||
|
PARBIT = 0x01
|
||||||
|
};
|
||||||
|
|
||||||
|
/* DISPCTL bit definitions */
|
||||||
|
enum {
|
||||||
|
DISP_COLOR = 0x08, /* must be set to 1 */
|
||||||
|
DISP_FOURBIT = 0x04, /* must be set to 1 */
|
||||||
|
DISP_FLIP = 0x02,
|
||||||
|
DMA_ENABLE = 0x01 /* must be set to 1 */
|
||||||
|
};
|
||||||
|
|
||||||
|
/* MTEST0 bit definitions */
|
||||||
|
enum {
|
||||||
|
AT_CNT16 = 0x80,
|
||||||
|
AT_TEST = 0x40,
|
||||||
|
XCLKEN = 0x20,
|
||||||
|
UART_TURBO = 0x10,
|
||||||
|
ROM_SEL = 0x08,
|
||||||
|
ROM_TEST = 0x04,
|
||||||
|
M_TEST = 0x02,
|
||||||
|
CPU_TEST = 0x01
|
||||||
|
};
|
||||||
|
|
||||||
|
/* MTEST1 bit definitions */
|
||||||
|
enum {
|
||||||
|
P_CNT16 = 0x40,
|
||||||
|
REF_CNT16 = 0x20,
|
||||||
|
VID_TRIG = 0x10,
|
||||||
|
REF_TRIG = 0x08,
|
||||||
|
VID_DMA_DIS = 0x04,
|
||||||
|
REF_FAST = 0x02,
|
||||||
|
REF_DIS = 0x01
|
||||||
|
};
|
||||||
|
|
||||||
|
/* MTEST2 bit definitions */
|
||||||
|
enum {
|
||||||
|
V_STROBE = 0x10,
|
||||||
|
V_ZERO = 0x08,
|
||||||
|
H_120 = 0x04,
|
||||||
|
H_ZERO = 0x02,
|
||||||
|
V_BLANKEF = 0x01
|
||||||
|
};
|
||||||
|
|
||||||
|
/* MAPCTL bit definitions */
|
||||||
|
enum {
|
||||||
|
TURBO_DISABLE = 0x80,
|
||||||
|
VECTOR_SPACE = 0x08,
|
||||||
|
ROM_SPACE = 0x04,
|
||||||
|
MIKEY_SPACE = 0x02,
|
||||||
|
SUZY_SPACE = 0x01
|
||||||
|
};
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|||||||
342
include/_suzy.h
342
include/_suzy.h
@ -24,75 +24,65 @@
|
|||||||
/* */
|
/* */
|
||||||
/*****************************************************************************/
|
/*****************************************************************************/
|
||||||
|
|
||||||
|
|
||||||
#ifndef __SUZY_H
|
#ifndef __SUZY_H
|
||||||
#define __SUZY_H
|
#define __SUZY_H
|
||||||
|
|
||||||
/* Joypad $FCB0 */
|
/* JOYSTICK bit definitions */
|
||||||
#define JOYPAD_RIGHT 0x10
|
enum {
|
||||||
#define JOYPAD_LEFT 0x20
|
JOYPAD_RIGHT = 0x10,
|
||||||
#define JOYPAD_DOWN 0x40
|
JOYPAD_LEFT = 0x20,
|
||||||
#define JOYPAD_UP 0x80
|
JOYPAD_DOWN = 0x40,
|
||||||
#define BUTTON_OPTION1 0x08
|
JOYPAD_UP = 0x80,
|
||||||
#define BUTTON_OPTION2 0x04
|
BUTTON_OPTION1 = 0x08,
|
||||||
#define BUTTON_INNER 0x02
|
BUTTON_OPTION2 = 0x04,
|
||||||
#define BUTTON_OUTER 0x01
|
BUTTON_INNER = 0x02,
|
||||||
|
BUTTON_OUTER = 0x01
|
||||||
|
};
|
||||||
|
|
||||||
/* Switches $FCB1 */
|
/* SWITCHES bit definitions */
|
||||||
#define BUTTON_PAUSE 0x01
|
enum {
|
||||||
|
CART1_IO_INACTIVE = 0x04,
|
||||||
|
CART0_IO_INACTIVE = 0x02,
|
||||||
|
BUTTON_PAUSE = 0x01
|
||||||
|
};
|
||||||
|
|
||||||
|
/* SPRCTL0 bit definitions */
|
||||||
|
enum {
|
||||||
|
BPP_4 = 0xC0,
|
||||||
|
BPP_3 = 0x80,
|
||||||
|
BPP_2 = 0x40,
|
||||||
|
BPP_1 = 0x00,
|
||||||
|
HFLIP = 0x20,
|
||||||
|
VFLIP = 0x10,
|
||||||
|
TYPE_SHADOW = 0x07,
|
||||||
|
TYPE_XOR = 0x06,
|
||||||
|
TYPE_NONCOLL = 0x05,
|
||||||
|
TYPE_NORMAL = 0x04,
|
||||||
|
TYPE_BOUNDARY = 0x03,
|
||||||
|
TYPE_BSHADOW = 0x02,
|
||||||
|
TYPE_BACKNONCOLL = 0x01,
|
||||||
|
TYPE_BACKGROUND = 0x00
|
||||||
|
};
|
||||||
|
|
||||||
/* Hardware Math */
|
/* SPRCTL1 bit definitions */
|
||||||
#define FACTOR_A *(unsigned int *) 0xFC54
|
enum {
|
||||||
#define FACTOR_B *(unsigned int *) 0xFC52
|
LITERAL = 0x80,
|
||||||
#define PRODUCT0 *(unsigned int *) 0xFC60
|
PACKED = 0x00,
|
||||||
#define PRODUCT1 *(unsigned int *) 0xFC62
|
ALGO3 = 0x40,
|
||||||
#define PRODUCT *(long *) 0xFC60
|
RENONE = 0x00,
|
||||||
|
REHV = 0x10,
|
||||||
|
REHVS = 0x20,
|
||||||
|
REHVST = 0x30,
|
||||||
|
REUSEPAL = 0x08,
|
||||||
|
SKIP = 0x04,
|
||||||
|
DRAWUP = 0x02,
|
||||||
|
DRAWLEFT = 0x01
|
||||||
|
};
|
||||||
|
|
||||||
#define DIVIDEND0 *(unsigned int *) 0xFC60
|
/* Sprite control block (SCB) definitions */
|
||||||
#define DIVIDEND1 *(unsigned int *) 0xFC62
|
|
||||||
#define DIVIDEND *(long *) 0xFC60
|
|
||||||
#define DIVISOR *(unsigned int *) 0xFC56
|
|
||||||
#define QUOTIENT0 *(unsigned int *) 0xFC52
|
|
||||||
#define QUOTIENT1 *(unsigned int *) 0xFC54
|
|
||||||
#define QUOTIENT *(long *) 0xFC52
|
|
||||||
#define REMAINDER0 *(unsigned int *) 0xFC6C
|
|
||||||
#define REMAINDER1 *(unsigned int *) 0xFC6E
|
|
||||||
#define REMAINDER *(long *) 0xFC6C
|
|
||||||
|
|
||||||
|
/* SCB with all attributes */
|
||||||
/* Sprite control block (SCB) defines */
|
typedef struct SCB_REHVST_PAL {
|
||||||
|
|
||||||
/* SPRCTL0 $FC80 */
|
|
||||||
#define BPP_4 0xC0
|
|
||||||
#define BPP_3 0x80
|
|
||||||
#define BPP_2 0x40
|
|
||||||
#define BPP_1 0x00
|
|
||||||
#define HFLIP 0x20
|
|
||||||
#define VFLIP 0x10
|
|
||||||
#define TYPE_SHADOW 0x07
|
|
||||||
#define TYPE_XOR 0x06
|
|
||||||
#define TYPE_NONCOLL 0x05
|
|
||||||
#define TYPE_NORMAL 0x04
|
|
||||||
#define TYPE_BOUNDARY 0x03
|
|
||||||
#define TYPE_BSHADOW 0x02
|
|
||||||
#define TYPE_BACKNONCOLL 0x01
|
|
||||||
#define TYPE_BACKGROUND 0x00
|
|
||||||
|
|
||||||
/* SPRCTL1 $FC81 */
|
|
||||||
#define LITERAL 0x80
|
|
||||||
#define PACKED 0x00
|
|
||||||
#define ALGO3 0x40
|
|
||||||
#define RENONE 0x00
|
|
||||||
#define REHV 0x10
|
|
||||||
#define REHVS 0x20
|
|
||||||
#define REHVST 0x30
|
|
||||||
#define REUSEPAL 0x08
|
|
||||||
#define SKIP 0x04
|
|
||||||
#define DRAWUP 0x02
|
|
||||||
#define DRAWLEFT 0x01
|
|
||||||
|
|
||||||
typedef struct SCB_REHVST_PAL { // SCB with all attributes
|
|
||||||
unsigned char sprctl0;
|
unsigned char sprctl0;
|
||||||
unsigned char sprctl1;
|
unsigned char sprctl1;
|
||||||
unsigned char sprcoll;
|
unsigned char sprcoll;
|
||||||
@ -107,7 +97,8 @@ typedef struct SCB_REHVST_PAL { // SCB with all attributes
|
|||||||
unsigned char penpal[8];
|
unsigned char penpal[8];
|
||||||
} SCB_REHVST_PAL;
|
} SCB_REHVST_PAL;
|
||||||
|
|
||||||
typedef struct SCB_REHVST { // SCB without pallette
|
/* SCB without pallette */
|
||||||
|
typedef struct SCB_REHVST {
|
||||||
unsigned char sprctl0;
|
unsigned char sprctl0;
|
||||||
unsigned char sprctl1;
|
unsigned char sprctl1;
|
||||||
unsigned char sprcoll;
|
unsigned char sprcoll;
|
||||||
@ -121,7 +112,8 @@ typedef struct SCB_REHVST { // SCB without pallette
|
|||||||
unsigned int tilt;
|
unsigned int tilt;
|
||||||
} SCB_REHVST;
|
} SCB_REHVST;
|
||||||
|
|
||||||
typedef struct SCB_REHV { // SCB without stretch/tilt
|
/* SCB without stretch/tilt */
|
||||||
|
typedef struct SCB_REHV {
|
||||||
unsigned char sprctl0;
|
unsigned char sprctl0;
|
||||||
unsigned char sprctl1;
|
unsigned char sprctl1;
|
||||||
unsigned char sprcoll;
|
unsigned char sprcoll;
|
||||||
@ -133,7 +125,8 @@ typedef struct SCB_REHV { // SCB without stretch/tilt
|
|||||||
unsigned int vsize;
|
unsigned int vsize;
|
||||||
} SCB_REHV;
|
} SCB_REHV;
|
||||||
|
|
||||||
typedef struct SCB_REHV_PAL { // SCB without str/tilt, w/ penpal
|
/* SCB without stretch/tilt, with penpal */
|
||||||
|
typedef struct SCB_REHV_PAL {
|
||||||
unsigned char sprctl0;
|
unsigned char sprctl0;
|
||||||
unsigned char sprctl1;
|
unsigned char sprctl1;
|
||||||
unsigned char sprcoll;
|
unsigned char sprcoll;
|
||||||
@ -146,7 +139,8 @@ typedef struct SCB_REHV_PAL { // SCB without str/tilt, w/ penpal
|
|||||||
unsigned char penpal[8];
|
unsigned char penpal[8];
|
||||||
} SCB_REHV_PAL;
|
} SCB_REHV_PAL;
|
||||||
|
|
||||||
typedef struct SCB_REHVS { // SCB w/o tilt & penpal
|
/* SCB without tilt/penpal */
|
||||||
|
typedef struct SCB_REHVS {
|
||||||
unsigned char sprctl0;
|
unsigned char sprctl0;
|
||||||
unsigned char sprctl1;
|
unsigned char sprctl1;
|
||||||
unsigned char sprcoll;
|
unsigned char sprcoll;
|
||||||
@ -159,7 +153,8 @@ typedef struct SCB_REHVS { // SCB w/o tilt & penpal
|
|||||||
unsigned int stretch;
|
unsigned int stretch;
|
||||||
} SCB_REHVS;
|
} SCB_REHVS;
|
||||||
|
|
||||||
typedef struct SCB_REHVS_PAL { // SCB w/o tilt w/penpal
|
/* SCB without tilt, with penpal */
|
||||||
|
typedef struct SCB_REHVS_PAL {
|
||||||
unsigned char sprctl0;
|
unsigned char sprctl0;
|
||||||
unsigned char sprctl1;
|
unsigned char sprctl1;
|
||||||
unsigned char sprcoll;
|
unsigned char sprcoll;
|
||||||
@ -173,7 +168,8 @@ typedef struct SCB_REHVS_PAL { // SCB w/o tilt w/penpal
|
|||||||
unsigned char penpal[8];
|
unsigned char penpal[8];
|
||||||
} SCB_REHVS_PAL;
|
} SCB_REHVS_PAL;
|
||||||
|
|
||||||
typedef struct SCB_RENONE { // SCB w/o size/stretch/tilt/pal
|
/* SCB without size/stretch/tilt/penpal */
|
||||||
|
typedef struct SCB_RENONE {
|
||||||
unsigned char sprctl0;
|
unsigned char sprctl0;
|
||||||
unsigned char sprctl1;
|
unsigned char sprctl1;
|
||||||
unsigned char sprcoll;
|
unsigned char sprcoll;
|
||||||
@ -183,7 +179,8 @@ typedef struct SCB_RENONE { // SCB w/o size/stretch/tilt/pal
|
|||||||
signed int vpos;
|
signed int vpos;
|
||||||
} SCB_RENONE;
|
} SCB_RENONE;
|
||||||
|
|
||||||
typedef struct SCB_RENONE_PAL { // SCB w/o size/str/tilt w/penpal
|
/* SCB without size/str/tilt, with penpal */
|
||||||
|
typedef struct SCB_RENONE_PAL {
|
||||||
unsigned char sprctl0;
|
unsigned char sprctl0;
|
||||||
unsigned char sprctl1;
|
unsigned char sprctl1;
|
||||||
unsigned char sprcoll;
|
unsigned char sprcoll;
|
||||||
@ -210,30 +207,124 @@ typedef struct PENPAL_1 {
|
|||||||
unsigned char penpal[1];
|
unsigned char penpal[1];
|
||||||
} PENPAL_1;
|
} PENPAL_1;
|
||||||
|
|
||||||
/* Misc system defines */
|
/* SPRGO bit definitions */
|
||||||
|
enum {
|
||||||
|
SPRITE_GO = 0x01, /* sprite process start bit */
|
||||||
|
EVER_ON = 0x04 /* everon detector enable */
|
||||||
|
};
|
||||||
|
|
||||||
/* SPRGO $FC91 */
|
/* SPRSYS bit definitions for write operations */
|
||||||
#define EVER_ON 0x04
|
enum {
|
||||||
#define SPRITE_GO 0x01
|
SIGNMATH = 0x80, /* signed math */
|
||||||
|
ACCUMULATE = 0x40, /* accumulate multiplication results */
|
||||||
|
NO_COLLIDE = 0x20, /* do not collide with any sprites (also SPRCOLL bit definition) */
|
||||||
|
VSTRETCH = 0x10, /* stretch v */
|
||||||
|
LEFTHAND = 0x08,
|
||||||
|
CLR_UNSAFE = 0x04, /* unsafe access reset */
|
||||||
|
SPRITESTOP = 0x02 /* request to stop sprite process */
|
||||||
|
};
|
||||||
|
|
||||||
/* SPRSYS (write) $FC92 */
|
/* SPRSYS bit definitions for read operations */
|
||||||
#define SIGNMATH 0x80
|
enum {
|
||||||
#define ACCUMULATE 0x40
|
MATHWORKING = 0x80, /* math operation in progress */
|
||||||
#define NO_COLLIDE 0x20
|
MATHWARNING = 0x40, /* accumulator overflow on multiple or divide by zero */
|
||||||
#define VSTRETCH 0x10
|
MATHCARRY = 0x20, /* last carry bit */
|
||||||
#define LEFTHAND 0x08
|
VSTRETCHING = 0x10,
|
||||||
#define CLR_UNSAFE 0x04
|
LEFTHANDED = 0x08,
|
||||||
#define SPRITESTOP 0x02
|
UNSAFE_ACCESS = 0x04, /* unsafe access performed */
|
||||||
|
SPRITETOSTOP = 0x02, /* requested to stop */
|
||||||
|
SPRITEWORKING = 0x01 /* sprite process is active */
|
||||||
|
};
|
||||||
|
|
||||||
/* SPRSYS (read) $FC92 */
|
/* Suzy hardware registers */
|
||||||
#define MATHWORKING 0x80
|
struct __suzy {
|
||||||
#define MATHWARNING 0x40
|
unsigned char *tmpadr; /* 0xFC00 Temporary address */
|
||||||
#define MATHCARRY 0x20
|
unsigned int tiltacc; /* 0xFC02 Tilt accumulator */
|
||||||
#define VSTRETCHING 0x10
|
unsigned int hoff; /* 0xFC04 Offset to H edge of screen */
|
||||||
#define LEFTHANDED 0x08
|
unsigned int voff; /* 0xFC06 Offset to V edge of screen */
|
||||||
#define UNSAFE_ACCESS 0x04
|
unsigned char *sprbase; /* 0xFC08 Base address of sprite */
|
||||||
#define SPRITETOSTOP 0x02
|
unsigned char *colbase; /* 0xFC0A Base address of collision buffer */
|
||||||
#define SPRITEWORKING 0x01
|
unsigned char *vidadr; /* 0xFC0C Current vid buffer address */
|
||||||
|
unsigned char *coladr; /* 0xFC0E Current col buffer address */
|
||||||
|
unsigned char *scbnext; /* 0xFC10 Address of next SCB */
|
||||||
|
unsigned char *sprdline; /* 0xFC12 start of sprite data line address */
|
||||||
|
unsigned int hposstrt; /* 0xFC14 start hpos */
|
||||||
|
unsigned int vposstrt; /* 0xFC16 start vpos */
|
||||||
|
unsigned int sprhsize; /* 0xFC18 sprite h size */
|
||||||
|
unsigned int sprvsize; /* 0xFC1A sprite v size */
|
||||||
|
unsigned int stretchl; /* 0xFC1C H size adder */
|
||||||
|
unsigned int tilt; /* 0xFC1E H pos adder */
|
||||||
|
unsigned int sprdoff; /* 0xFC20 offset to next sprite data line */
|
||||||
|
unsigned int sprvpos; /* 0xFC22 current vpos */
|
||||||
|
unsigned int colloff; /* 0xFC24 offset to collision depository */
|
||||||
|
unsigned int vsizeacc; /* 0xFC26 vertical size accumulator */
|
||||||
|
unsigned int hsizeoff; /* 0xFC28 horizontal size offset */
|
||||||
|
unsigned int vsizeoff; /* 0xFC2A vertical size offset */
|
||||||
|
unsigned char *scbaddr; /* 0xFC2C address of current SCB */
|
||||||
|
unsigned char *procaddr; /* 0xFC2E address of current spr data proc */
|
||||||
|
unsigned char unused0[32]; /* 0xFC30 - 0xFC4F reserved/unused */
|
||||||
|
unsigned char unused1[2]; /* 0xFC50 - 0xFC51 do not use */
|
||||||
|
unsigned char mathd; /* 0xFC52 */
|
||||||
|
unsigned char mathc; /* 0xFC53 */
|
||||||
|
unsigned char mathb; /* 0xFC54 */
|
||||||
|
unsigned char matha; /* 0xFC55 write starts a multiply operation */
|
||||||
|
unsigned char mathp; /* 0xFC56 */
|
||||||
|
unsigned char mathn; /* 0xFC57 */
|
||||||
|
unsigned char unused2[8]; /* 0xFC58 - 0xFC5F do not use */
|
||||||
|
unsigned char mathh; /* 0xFC60 */
|
||||||
|
unsigned char mathg; /* 0xFC61 */
|
||||||
|
unsigned char mathf; /* 0xFC62 */
|
||||||
|
unsigned char mathe; /* 0xFC63 write starts a divide operation */
|
||||||
|
unsigned char unused3[8]; /* 0xFC64 - 0xFC6B do not use */
|
||||||
|
unsigned char mathm; /* 0xFC6C */
|
||||||
|
unsigned char mathl; /* 0xFC6D */
|
||||||
|
unsigned char mathk; /* 0xFC6E */
|
||||||
|
unsigned char mathj; /* 0xFC6F */
|
||||||
|
unsigned char unused4[16]; /* 0xFC70 - 0xFC7F do not use */
|
||||||
|
unsigned char sprctl0; /* 0xFC80 sprite control bits 0 */
|
||||||
|
unsigned char sprctl1; /* 0xFC81 sprite control bits 1 */
|
||||||
|
unsigned char sprcoll; /* 0xFC82 sprite collision number */
|
||||||
|
unsigned char sprinit; /* 0xFC83 sprite initialization bits */
|
||||||
|
unsigned char unused5[4]; /* 0xFC84 - 0xFC87 unused */
|
||||||
|
unsigned char suzyhrev; /* 0xFC88 suzy hardware rev */
|
||||||
|
unsigned char suzysrev; /* 0xFC89 suzy software rev */
|
||||||
|
unsigned char unused6[6]; /* 0xFC8A - 0xFC8F unused */
|
||||||
|
unsigned char suzybusen; /* 0xFC90 suzy bus enable */
|
||||||
|
unsigned char sprgo; /* 0xFC91 sprite process start bit */
|
||||||
|
unsigned char sprsys; /* 0xFC92 sprite system control bits */
|
||||||
|
unsigned char unused7[29]; /* 0xFC93 - 0xFCAF unused */
|
||||||
|
unsigned char joystick; /* 0xFCB0 joystick and buttons */
|
||||||
|
unsigned char switches; /* 0xFCB1 other switches */
|
||||||
|
unsigned char cart0; /* 0xFCB2 cart0 r/w */
|
||||||
|
unsigned char cart1; /* 0xFCB3 cart1 r/w */
|
||||||
|
unsigned char unused8[8]; /* 0xFCB4 - 0xFCBF unused */
|
||||||
|
unsigned char leds; /* 0xFCC0 leds */
|
||||||
|
unsigned char unused9; /* 0xFCC1 unused */
|
||||||
|
unsigned char parstat; /* 0xFCC2 parallel port status */
|
||||||
|
unsigned char pardata; /* 0xFCC3 parallel port data */
|
||||||
|
unsigned char howie; /* 0xFCC4 howie (?) */
|
||||||
|
/* 0xFCC5 - 0xFCFF unused */
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Hardware math registers */
|
||||||
|
#define FACTOR_A *(unsigned int *) 0xFC54
|
||||||
|
#define FACTOR_B *(unsigned int *) 0xFC52
|
||||||
|
#define PRODUCT0 *(unsigned int *) 0xFC60
|
||||||
|
#define PRODUCT1 *(unsigned int *) 0xFC62
|
||||||
|
#define PRODUCT *(long *) 0xFC60
|
||||||
|
|
||||||
|
#define DIVIDEND0 *(unsigned int *) 0xFC60
|
||||||
|
#define DIVIDEND1 *(unsigned int *) 0xFC62
|
||||||
|
#define DIVIDEND *(long *) 0xFC60
|
||||||
|
#define DIVISOR *(unsigned int *) 0xFC56
|
||||||
|
#define QUOTIENT0 *(unsigned int *) 0xFC52
|
||||||
|
#define QUOTIENT1 *(unsigned int *) 0xFC54
|
||||||
|
#define QUOTIENT *(long *) 0xFC52
|
||||||
|
#define REMAINDER0 *(unsigned int *) 0xFC6C
|
||||||
|
#define REMAINDER1 *(unsigned int *) 0xFC6E
|
||||||
|
#define REMAINDER *(long *) 0xFC6C
|
||||||
|
|
||||||
|
/* Deprecated definitions */
|
||||||
|
|
||||||
/* MAPCTL $FFF9 */
|
/* MAPCTL $FFF9 */
|
||||||
#define HIGHSPEED 0x80
|
#define HIGHSPEED 0x80
|
||||||
@ -242,77 +333,4 @@ typedef struct PENPAL_1 {
|
|||||||
#define MIKEYSPACE 0x02
|
#define MIKEYSPACE 0x02
|
||||||
#define SUZYSPACE 0x01
|
#define SUZYSPACE 0x01
|
||||||
|
|
||||||
|
|
||||||
/* Suzy Hardware Registers */
|
|
||||||
struct __suzy {
|
|
||||||
unsigned int tmpadr; // 0xFC00 Temporary address
|
|
||||||
unsigned int tiltacc; // 0xFC02 Tilt accumulator
|
|
||||||
unsigned int hoff; // 0xFC04 Offset to H edge of screen
|
|
||||||
unsigned int voff; // 0xFC06 Offset to V edge of screen
|
|
||||||
unsigned char *sprbase; // 0xFC08 Base address of sprite
|
|
||||||
unsigned char *colbase; // 0xFC0A Base address of collision buffer
|
|
||||||
unsigned char *vidadr; // 0xFC0C Current vid buffer address
|
|
||||||
unsigned char *coladr; // 0xFC0E Current col buffer address
|
|
||||||
unsigned char *scbnext; // 0xFC10 Address of next SCB
|
|
||||||
unsigned char *sprdline; // 0xFC12 start of sprite data line address
|
|
||||||
unsigned char *hposstrt; // 0xFC14 start hpos
|
|
||||||
unsigned char *vposstrt; // 0xFC16 start vpos
|
|
||||||
unsigned char *sprhsize; // 0xFC18 sprite h size
|
|
||||||
unsigned char *sprvsize; // 0xFC1A sprite v size
|
|
||||||
unsigned int stretchl; // 0xFC1C H size adder
|
|
||||||
unsigned int tilt; // 0xFC1E H pos adder
|
|
||||||
unsigned int sprdoff; // 0xFC20 offset to next sprite data line
|
|
||||||
unsigned int sprvpos; // 0xFC22 current vpos
|
|
||||||
unsigned int colloff; // 0xFC24 offset to collision depository
|
|
||||||
unsigned int vsizeacc; // 0xFC26 vertical size accumulator
|
|
||||||
unsigned int hsizeoff; // 0xFC28 horizontal size offset
|
|
||||||
unsigned int vsizeoff; // 0xFC2A vertical size offset
|
|
||||||
unsigned char *scbaddr; // 0xFC2C address of current SCB
|
|
||||||
unsigned char *procaddr; // 0xFC2E address of current spr data proc
|
|
||||||
unsigned char unused0[32]; // 0xFC30 - 0xFC4F reserved/unused
|
|
||||||
unsigned char unused1[2]; // 0xFC50 - 0xFC51 do not use
|
|
||||||
unsigned char mathd; // 0xFC52
|
|
||||||
unsigned char mathc; // 0xFC53
|
|
||||||
unsigned char mathb; // 0xFC54
|
|
||||||
unsigned char matha; // 0xFC55
|
|
||||||
unsigned char mathp; // 0xFC56
|
|
||||||
unsigned char mathn; // 0xFC57
|
|
||||||
unsigned char unused2[8]; // 0xFC58 - 0xFC5F do not use
|
|
||||||
unsigned char mathh; // 0xFC60
|
|
||||||
unsigned char mathg; // 0xFC61
|
|
||||||
unsigned char mathf; // 0xFC62
|
|
||||||
unsigned char mathe; // 0xFC63
|
|
||||||
unsigned char unused3[8]; // 0xFC64 - 0xFC6B do not use
|
|
||||||
unsigned char mathm; // 0xFC6C
|
|
||||||
unsigned char mathl; // 0xFC6D
|
|
||||||
unsigned char mathk; // 0xFC6E
|
|
||||||
unsigned char mathj; // 0xFC6F
|
|
||||||
unsigned char unused4[16]; // 0xFC70 - 0xFC7F do not use
|
|
||||||
unsigned char sprctl0; // 0xFC80 sprite control bits 0
|
|
||||||
unsigned char sprctl1; // 0xFC81 sprite control bits 1
|
|
||||||
unsigned char sprcoll; // 0xFC82 sprite collision number
|
|
||||||
unsigned char sprinit; // 0xFC83 sprite initialization bits
|
|
||||||
unsigned char unused5[4]; // 0xFC84 - 0xFC87 unused
|
|
||||||
unsigned char suzyhrev; // 0xFC88 suzy hardware rev
|
|
||||||
unsigned char suzysrev; // 0xFC89 suzy software rev
|
|
||||||
unsigned char unused6[6]; // 0xFC8A - 0xFC8F unused
|
|
||||||
unsigned char suzybusen; // 0xFC90 suzy bus enable
|
|
||||||
unsigned char sprgo; // 0xFC91 sprite process start bit
|
|
||||||
unsigned char sprsys; // 0xFC92 sprite system control bits
|
|
||||||
unsigned char unused7[29]; // 0xFC93 - 0xFCAF unused
|
|
||||||
unsigned char joystick; // 0xFCB0 joystick and buttons
|
|
||||||
unsigned char switches; // 0xFCB1 other switches
|
|
||||||
unsigned char cart0; // 0xFCB2 cart0 r/w
|
|
||||||
unsigned char cart1; // 0xFCB3 cart1 r/w
|
|
||||||
unsigned char unused8[8]; // 0xFCB4 - 0xFCBF unused
|
|
||||||
unsigned char leds; // 0xFCC0 leds
|
|
||||||
unsigned char unused9; // 0xFCC1 unused
|
|
||||||
unsigned char parstat; // 0xFCC2 parallel port status
|
|
||||||
unsigned char pardata; // 0xFCC3 parallel port data
|
|
||||||
unsigned char howie; // 0xFCC4 howie (?)
|
|
||||||
// 0xFCC5 - 0xFCFF unused
|
|
||||||
};
|
|
||||||
|
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|||||||
177
include/lynx.h
177
include/lynx.h
@ -31,27 +31,15 @@
|
|||||||
/* */
|
/* */
|
||||||
/*****************************************************************************/
|
/*****************************************************************************/
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
#ifndef _LYNX_H
|
#ifndef _LYNX_H
|
||||||
#define _LYNX_H
|
#define _LYNX_H
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/* Check for errors */
|
/* Check for errors */
|
||||||
#if !defined(__LYNX__)
|
#if !defined(__LYNX__)
|
||||||
# error This module may only be used when compiling for the Lynx game console!
|
# error This module may only be used when compiling for the Lynx game console!
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
/* Color definitions */
|
||||||
|
|
||||||
/*****************************************************************************/
|
|
||||||
/* Data */
|
|
||||||
/*****************************************************************************/
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/* Color defines */
|
|
||||||
#define COLOR_TRANSPARENT 0x00
|
#define COLOR_TRANSPARENT 0x00
|
||||||
#define COLOR_BLACK 0x01
|
#define COLOR_BLACK 0x01
|
||||||
#define COLOR_RED 0x02
|
#define COLOR_RED 0x02
|
||||||
@ -88,6 +76,56 @@
|
|||||||
#define TGI_COLOR_LIGHTBLUE COLOR_LIGHTBLUE
|
#define TGI_COLOR_LIGHTBLUE COLOR_LIGHTBLUE
|
||||||
#define TGI_COLOR_WHITE COLOR_WHITE
|
#define TGI_COLOR_WHITE COLOR_WHITE
|
||||||
|
|
||||||
|
/* No support for dynamically loadable drivers */
|
||||||
|
#define DYN_DRV 0
|
||||||
|
|
||||||
|
/* Addresses of static drivers */
|
||||||
|
extern void lynx_stdjoy_joy[]; /* Referred to by joy_static_stddrv[] */
|
||||||
|
extern void lynx_comlynx_ser[]; /* Referred to by ser_static_stddrv[] */
|
||||||
|
extern void lynx_160_102_16_tgi[]; /* Referred to by tgi_static_stddrv[] */
|
||||||
|
|
||||||
|
/* Sound support */
|
||||||
|
void lynx_snd_init (void); /* Initialize the sound driver */
|
||||||
|
void lynx_snd_pause (void); /* Pause sound */
|
||||||
|
void lynx_snd_continue (void); /* Continue sound after pause */
|
||||||
|
void __fastcall__ lynx_snd_play (unsigned char channel, unsigned char *music); /* Play tune on channel */
|
||||||
|
void lynx_snd_stop (void); /* Stop sound on all channels */
|
||||||
|
void __fastcall__ lynx_snd_stop_channel (unsigned char channel); /* Stop sound on all channels */
|
||||||
|
unsigned char lynx_snd_active(void); /* Show which channels are active */
|
||||||
|
|
||||||
|
/* Cartridge access */
|
||||||
|
void __fastcall__ lynx_load (int file_number); /* Load a file into RAM using a zero-based index */
|
||||||
|
void __fastcall__ lynx_exec (int file_number); /* Load a file into ram and execute it */
|
||||||
|
|
||||||
|
/* EEPROM access */
|
||||||
|
unsigned __fastcall__ lynx_eeprom_read (unsigned char cell); /* Read a 16 bit word from the given address */
|
||||||
|
unsigned __fastcall__ lynx_eeprom_write (unsigned char cell, unsigned val); /* Write the word at the given address */
|
||||||
|
void __fastcall__ lynx_eeprom_erase (unsigned char cell); /* Clear the word at the given address */
|
||||||
|
unsigned __fastcall__ lynx_eeread (unsigned cell); /* Read a 16 bit word from the given address 93C46, 93C66 or 93C86 */
|
||||||
|
unsigned __fastcall__ lynx_eewrite (unsigned cell, unsigned val); /* Write the word at the given address 93C46, 93C66 or 93C86 */
|
||||||
|
|
||||||
|
/* TGI extras */
|
||||||
|
#define tgi_sprite(spr) tgi_ioctl(0, spr)
|
||||||
|
#define tgi_flip() tgi_ioctl(1, (void*)0)
|
||||||
|
#define tgi_setbgcolor(bgcol) tgi_ioctl(2, (void*)(bgcol))
|
||||||
|
#define tgi_setframerate(rate) tgi_ioctl(3, (void*)(rate))
|
||||||
|
#define tgi_busy() tgi_ioctl(4, (void*)0)
|
||||||
|
#define tgi_updatedisplay() tgi_ioctl(4, (void*)1)
|
||||||
|
#define tgi_setcollisiondetection(active) tgi_ioctl(5, (void*)(active))
|
||||||
|
|
||||||
|
/* Hardware definitions */
|
||||||
|
#include <_mikey.h>
|
||||||
|
#define MIKEY (*(struct __mikey *)0xFD00)
|
||||||
|
|
||||||
|
#define _MIKEY_TIMERS (*(struct _mikey_all_timers *) 0xFD00) /* mikey_timers[8] */
|
||||||
|
#define _HBL_TIMER (*(struct _mikey_timer *) 0xFD00) /* timer0 (HBL) */
|
||||||
|
#define _VBL_TIMER (*(struct _mikey_timer *) 0xFD08) /* timer2 (VBL) */
|
||||||
|
#define _UART_TIMER (*(struct _mikey_timer *) 0xFD14) /* timer4 (UART) */
|
||||||
|
#define _VIDDMA (*(unsigned int *) 0xFD92) /* DISPCTL/VIDDMA */
|
||||||
|
|
||||||
|
#include <_suzy.h>
|
||||||
|
#define SUZY (*(volatile struct __suzy*)0xFC00)
|
||||||
|
|
||||||
/* Masks for joy_read */
|
/* Masks for joy_read */
|
||||||
#define JOY_UP_MASK 0x80
|
#define JOY_UP_MASK 0x80
|
||||||
#define JOY_DOWN_MASK 0x40
|
#define JOY_DOWN_MASK 0x40
|
||||||
@ -102,118 +140,5 @@
|
|||||||
#define JOY_BTN_A(v) ((v) & JOY_BTN_A_MASK)
|
#define JOY_BTN_A(v) ((v) & JOY_BTN_A_MASK)
|
||||||
#define JOY_BTN_B(v) ((v) & JOY_BTN_B_MASK)
|
#define JOY_BTN_B(v) ((v) & JOY_BTN_B_MASK)
|
||||||
|
|
||||||
/* No support for dynamically loadable drivers */
|
|
||||||
#define DYN_DRV 0
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/*****************************************************************************/
|
|
||||||
/* Variables */
|
|
||||||
/*****************************************************************************/
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/* The addresses of the static drivers */
|
|
||||||
extern void lynx_stdjoy_joy[]; /* Referred to by joy_static_stddrv[] */
|
|
||||||
extern void lynx_comlynx_ser[]; /* Referred to by ser_static_stddrv[] */
|
|
||||||
extern void lynx_160_102_16_tgi[]; /* Referred to by tgi_static_stddrv[] */
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/*****************************************************************************/
|
|
||||||
/* Sound support */
|
|
||||||
/*****************************************************************************/
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
void lynx_snd_init (void);
|
|
||||||
/* Initialize the sound driver */
|
|
||||||
|
|
||||||
void lynx_snd_pause (void);
|
|
||||||
/* Pause sound */
|
|
||||||
|
|
||||||
void lynx_snd_continue (void);
|
|
||||||
/* Continue sound after pause */
|
|
||||||
|
|
||||||
void __fastcall__ lynx_snd_play (unsigned char channel, unsigned char *music);
|
|
||||||
/* Play tune on channel */
|
|
||||||
|
|
||||||
void lynx_snd_stop (void);
|
|
||||||
/* Stop sound on all channels */
|
|
||||||
|
|
||||||
void __fastcall__ lynx_snd_stop_channel (unsigned char channel);
|
|
||||||
/* Stop sound on all channels */
|
|
||||||
|
|
||||||
unsigned char lynx_snd_active(void);
|
|
||||||
/* Show which channels are active */
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/*****************************************************************************/
|
|
||||||
/* Accessing the cart */
|
|
||||||
/*****************************************************************************/
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
void __fastcall__ lynx_load (int fileno);
|
|
||||||
/* Load a file into ram. The first entry is fileno=0. */
|
|
||||||
|
|
||||||
void __fastcall__ lynx_exec (int fileno);
|
|
||||||
/* Load a file into ram and execute it. */
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/*****************************************************************************/
|
|
||||||
/* Accessing the EEPROM */
|
|
||||||
/*****************************************************************************/
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
unsigned __fastcall__ lynx_eeprom_read (unsigned char cell);
|
|
||||||
/* Read a 16 bit word from the given address */
|
|
||||||
|
|
||||||
unsigned __fastcall__ lynx_eeprom_write (unsigned char cell, unsigned val);
|
|
||||||
/* Write the word at the given address */
|
|
||||||
|
|
||||||
void __fastcall__ lynx_eeprom_erase (unsigned char cell);
|
|
||||||
/* Clear the word at the given address */
|
|
||||||
|
|
||||||
unsigned __fastcall__ lynx_eeread (unsigned cell);
|
|
||||||
/* Read a 16 bit word from the given address 93C46 93C66 or 93C86*/
|
|
||||||
|
|
||||||
unsigned __fastcall__ lynx_eewrite (unsigned cell, unsigned val);
|
|
||||||
/* Write the word at the given address 93C46 93C66 or 93C86*/
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/*****************************************************************************/
|
|
||||||
/* TGI extras */
|
|
||||||
/*****************************************************************************/
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
#define tgi_sprite(spr) tgi_ioctl(0, spr)
|
|
||||||
#define tgi_flip() tgi_ioctl(1, (void*)0)
|
|
||||||
#define tgi_setbgcolor(bgcol) tgi_ioctl(2, (void*)(bgcol))
|
|
||||||
#define tgi_setframerate(rate) tgi_ioctl(3, (void*)(rate))
|
|
||||||
#define tgi_busy() tgi_ioctl(4, (void*)0)
|
|
||||||
#define tgi_updatedisplay() tgi_ioctl(4, (void*)1)
|
|
||||||
#define tgi_setcollisiondetection(active) tgi_ioctl(5, (void*)(active))
|
|
||||||
|
|
||||||
/* Define Hardware */
|
|
||||||
#include <_mikey.h>
|
|
||||||
#define MIKEY (*(struct __mikey *)0xFD00)
|
|
||||||
|
|
||||||
#define _MIKEY_TIMERS (*(struct _mikey_all_timers *) 0xFD00) // mikey_timers[8]
|
|
||||||
#define _HBL_TIMER (*(struct _mikey_timer *) 0xFD00) // timer0 (HBL)
|
|
||||||
#define _VBL_TIMER (*(struct _mikey_timer *) 0xFD08) // timer2 (VBL)
|
|
||||||
#define _UART_TIMER (*(struct _mikey_timer *) 0xFD14) // timer4 (UART)
|
|
||||||
#define _VIDDMA (*(unsigned int *) 0xFD92) // dispctl/viddma
|
|
||||||
|
|
||||||
#include <_suzy.h>
|
|
||||||
#define SUZY (*(struct __suzy*)0xFC00)
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
/* End of lynx.h */
|
/* End of lynx.h */
|
||||||
#endif
|
#endif
|
||||||
|
|||||||
Loading…
x
Reference in New Issue
Block a user