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Prepare VIC20 startup for different start addresses

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git-svn-id: svn://svn.cc65.org/cc65/trunk@1390 b7a2c559-68d2-44c3-8de9-860c34a00d81
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cuz 2002-08-11 15:11:31 +00:00
parent 4db7198ade
commit 4b805447b6
2 changed files with 13 additions and 8 deletions
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20
libsrc/vic20/crt0.s
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@ -8,29 +8,33 @@
.import initlib, donelib
.import zerobss, push0
.import _main
.import __RAM_START__, __RAM_SIZE__ ; Linker generated
.import __RAM_START__, __RAM_SIZE__ ; Linker generated
.include "zeropage.inc"
.include "vic20.inc"
.include "../cbm/cbm.inc"
.code
.include "vic20.inc"
.include "../cbm/cbm.inc"
; ------------------------------------------------------------------------
; BASIC header with a SYS call
.org $FFF
.segment "EXEHDR"
.word Head ; Load address
Head: .word @Next
.word 1000 ; Line number
.byte $9E,"4109" ; SYS 4109
.byte $9E ; SYS token
.byte <(((@Start / 1000) .mod 10) + $30)
.byte <(((@Start / 100) .mod 10) + $30)
.byte <(((@Start / 10) .mod 10) + $30)
.byte <(((@Start / 1) .mod 10) + $30)
.byte $00 ; End of BASIC line
@Next: .word 0 ; BASIC end marker
.reloc
@Start:
; ------------------------------------------------------------------------
; Actual code
.code
ldx #zpspace-1
L1: lda sp,x
sta zpsave,x ; Save the zero page locations we need

1
src/ld65/cfg/vic20.cfg
View File

@ -3,6 +3,7 @@ MEMORY {
RAM: start = $FFF, size = $0E01, define = yes, file = %O;
}
SEGMENTS {
EXEHDR: load = RAM , type = wprot;
CODE: load = RAM, type = wprot;
RODATA: load = RAM, type = wprot;
DATA: load = RAM, type = rw;