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some comment alignment
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0837f9c25f
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@ -248,7 +248,7 @@ CLEAR:
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; set cache writes
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lda #$40
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tsb $9f29 ;VERA_FX_CTRL
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tsb $9F29 ;VERA_FX_CTRL
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; set FX cache to all zeroes
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lda #(6 << 1)
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@ -260,9 +260,9 @@ CLEAR:
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lda #$ff
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ahead:
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sta VERA::DISP::VIDEO
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sta VERA::DISP::HSCALE ;$9f2a
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sta VERA::DISP::VSCALE ;$9f2b
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sta VERA::DISP::FRAME ;$9f2c
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sta VERA::DISP::HSCALE
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sta VERA::DISP::VSCALE
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sta VERA::DISP::FRAME
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stz VERA::CTRL
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; set address and increment for bitmap area
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@ -271,13 +271,13 @@ ahead:
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lda #$30 ; increment +4
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sta VERA::ADDR + 2
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ldy #240 ; number of rows
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ldy #$F0
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blank_outer:
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ldx #10 ; 10 iterations of 32 = one line of 640
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ldx #$0A
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blank_loop:
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.repeat 8
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stz VERA::DATA0 ; $9f23 each `stz` writes four zeroes to VRAM (cache contents) for a total of 32 pixels when repeated 8x
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stz VERA::DATA0
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.endrep
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dex
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@ -287,10 +287,10 @@ blank_loop:
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; set up DCSEL=2
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lda #(2 << 1)
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sta VERA::CTRL ; $9f25
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sta VERA::CTRL
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; set FX off (cache write bit 1 -> 0)
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stz $9f29 ;VERA_FX_CTRL
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stz $9F29 ;VERA_FX_CTRL
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stz VERA::CTRL
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.endscope
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