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https://github.com/cc65/cc65.git
synced 2024-06-07 23:29:39 +00:00
added a testprogram to check for some of the edge cases
This commit is contained in:
mrdudz
parent
501da2de2b
commit
623d763457
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@ -12,7 +12,7 @@ endif
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WORKDIR = ../testwrk/asm
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SUBDIRS = cpudetect opcodes listing
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SUBDIRS = cpudetect opcodes listing val
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.PHONY: all continue mostlyclean clean
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@ -17,3 +17,10 @@ Overall tests:
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--------------
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These go into listing/. Refer to listing/readme.txt
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Val:
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----
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Works very much like the /val directory used to test the compiler - individual
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tests are run in the simulator and should exit with an exit code of 0 when they
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pass, or either -1 or a number indicating what part of the test failed on error.
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58
test/asm/val/Makefile
Normal file
58
test/asm/val/Makefile
Normal file
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@ -0,0 +1,58 @@
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# Makefile for the regression tests that return an error code on failure
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ifneq ($(shell echo),)
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CMD_EXE = 1
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endif
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ifdef CMD_EXE
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S = $(subst /,\,/)
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NULLDEV = nul:
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MKDIR = mkdir $(subst /,\,$1)
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RMDIR = -rmdir /s /q $(subst /,\,$1)
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else
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S = /
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NULLDEV = /dev/null
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MKDIR = mkdir -p $1
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RMDIR = $(RM) -r $1
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endif
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ifdef QUIET
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.SILENT:
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NULLOUT = >$(NULLDEV)
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NULLERR = 2>$(NULLDEV)
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endif
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SIM65FLAGS = -x 5000000000
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CA65 := $(if $(wildcard ../../../bin/ca65*),..$S..$S..$Sbin$Sca65,ca65)
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LD65 := $(if $(wildcard ../../../bin/ld65*),..$S..$S..$Sbin$Sld65,ld65)
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SIM65 := $(if $(wildcard ../../../bin/sim65*),..$S..$S..$Sbin$Ssim65,sim65)
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WORKDIR = ../../testwrk/asm/val
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.PHONY: all clean
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SOURCES := $(wildcard *.s)
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TESTS = $(SOURCES:%.s=$(WORKDIR)/%.6502.prg)
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TESTS += $(SOURCES:%.s=$(WORKDIR)/%.65c02.prg)
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all: $(TESTS)
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$(WORKDIR):
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$(call MKDIR,$(WORKDIR))
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define PRG_template
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$(WORKDIR)/%.$1.prg: %.s | $(WORKDIR)
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$(if $(QUIET),echo asm/val/$$*.$1.prg)
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$(CA65) -t sim$1 -o $$(@:.prg=.o) $$< $(NULLERR)
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$(LD65) -C sim6502-asmtest.cfg -o $$@ $$(@:.prg=.o) sim$1.lib $(NULLERR)
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$(SIM65) $(SIM65FLAGS) $$@ $(NULLOUT)
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endef # PRG_template
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$(eval $(call PRG_template,6502))
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$(eval $(call PRG_template,65c02))
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clean:
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@$(call RMDIR,$(WORKDIR))
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99
test/asm/val/bug1538.s
Normal file
99
test/asm/val/bug1538.s
Normal file
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@ -0,0 +1,99 @@
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.macpack longbranch
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.import _exit
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.export _main
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offset1 = ($123456 + ((.bank(_main)) * $2345)) ; should produce $123456 + ($23 * $2345) = 1706c5
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_main:
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ldx #1 ; test counter
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;---------------------------------------------------------------------
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; first check if we can still force an 16bit address although we are
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; ANDing with a 8bit value
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test1:
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test1a: bit a:$1234 & $ff ; should produce 00 34
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lda test1a+1
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cmp #$34
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jne exiterror
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inx
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lda test1a+2
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cmp #$00
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jne exiterror
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inx
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test1b: bit a:$34 & $ff ; should produce 00 34
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lda test1b+1
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cmp #$34
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jne exiterror
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inx
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lda test1b+2
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cmp #$00
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jne exiterror
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;---------------------------------------------------------------------
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; the original bug report, use an expression that contains a non constant
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; part (.bank(_main)) and limit it to 8bit size by ANDing with $ff
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test2:
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inx
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lda #(offset1 >> 0) & $ff
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cmp #$c5
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jne exiterror
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inx
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lda #(offset1 >> 8) & $ff
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cmp #$06
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jne exiterror
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inx
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lda #(offset1 >> 16) & $ff
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cmp #$17
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jne exiterror
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;---------------------------------------------------------------------
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; import a zeropage symbol (1 byte size) and then AND with a constant
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; 16bit value - it should not turn into a 16bit address
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test3:
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jmp test3chk
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.importzp tmp1
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test3a: .byte tmp1 ; verify its 8bit
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test3b: .byte tmp1 & $ff ; AND with $ff should work of course
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test3c: .byte tmp1 & $ffff ; AND with $ffff should not change size
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test3d: .word tmp1 & $ffffff ; AND with $ffffff should not change size
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test3chk:
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inx
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lda test3a
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cmp #tmp1
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jne exiterror
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inx
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lda test3b
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cmp #tmp1
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jne exiterror
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inx
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lda test3c
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cmp #tmp1
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jne exiterror
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inx
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lda test3d
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cmp #tmp1
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jne exiterror
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inx
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lda test3d+1
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cmp #$00
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jne exiterror
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;---------------------------------------------------------------------
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; exit OK
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ldx #0
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exiterror:
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txa
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ldx #0
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jmp _exit
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35
test/asm/val/sim6502-asmtest.cfg
Normal file
35
test/asm/val/sim6502-asmtest.cfg
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@ -0,0 +1,35 @@
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SYMBOLS {
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__EXEHDR__: type = import;
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__STACKSIZE__: type = weak, value = $0800; # 2k stack
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}
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MEMORY {
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ZP: file = "", start = $0000, size = $0100;
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HEADER: file = %O, start = $0000, size = $000C;
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MAIN: file = %O, define = yes, start = $0200, size = $FDF0 - __STACKSIZE__, BANK = $23;
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}
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SEGMENTS {
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ZEROPAGE: load = ZP, type = zp;
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EXEHDR: load = HEADER, type = ro;
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STARTUP: load = MAIN, type = ro;
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LOWCODE: load = MAIN, type = ro, optional = yes;
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ONCE: load = MAIN, type = ro, optional = yes;
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CODE: load = MAIN, type = ro;
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RODATA: load = MAIN, type = ro;
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DATA: load = MAIN, type = rw;
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BSS: load = MAIN, type = bss, define = yes;
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}
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FEATURES {
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CONDES: type = constructor,
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label = __CONSTRUCTOR_TABLE__,
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count = __CONSTRUCTOR_COUNT__,
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segment = ONCE;
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CONDES: type = destructor,
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label = __DESTRUCTOR_TABLE__,
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count = __DESTRUCTOR_COUNT__,
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segment = RODATA;
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CONDES: type = interruptor,
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label = __INTERRUPTOR_TABLE__,
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count = __INTERRUPTOR_COUNT__,
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segment = RODATA,
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import = __CALLIRQ__;
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}
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