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Changed the startup module and the linker config for the Commodore VIC to use

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the common loadaddr and exehdr modules.


git-svn-id: svn://svn.cc65.org/cc65/trunk@4874 b7a2c559-68d2-44c3-8de9-860c34a00d81
This commit is contained in:
uz 2010-11-17 13:35:43 +00:00
parent 9a9cea5a61
commit 81cfbe06c6
3 changed files with 34 additions and 43 deletions
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16
libsrc/vic20/crt0.s
View File

@ -15,22 +15,6 @@
.include "zeropage.inc"
.include "vic20.inc"
; ------------------------------------------------------------------------
; BASIC header with a SYS call
.segment "EXEHDR"
.word Head ; Load address
Head: .word @Next
.word .version ; Line number
.byte $9E ; SYS token
.byte <(((Start / 1000) .mod 10) + '0')
.byte <(((Start / 100) .mod 10) + '0')
.byte <(((Start / 10) .mod 10) + '0')
.byte <(((Start / 1) .mod 10) + '0')
.byte $00 ; End of BASIC line
@Next: .word 0 ; BASIC end marker
; ------------------------------------------------------------------------
; Startup code

31
src/ld65/cfg/vic20-32k.cfg
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@ -1,25 +1,28 @@
# Memory configuration for the VIC-20 with 32K RAM Cartridge
# Contributed by Stefan Haubenthal
SYMBOLS {
__LOADADDR__: type = import;
__EXEHDR__: type = import;
__STACKSIZE__: type = weak, value = $0400; # 1k stack
}
MEMORY {
ZP: file = "", define = yes, start = $0002, size = $001A;
HEADER: file = %O, start = $11FF, size = $000E;
RAM: file = %O, define = yes, start = $120D, size = $6DF3 - __STACKSIZE__;
ZP: file = "", define = yes, start = $0002, size = $001A;
LOADADDR: file = %O, start = $11FF, size = $0002;
HEADER: file = %O, start = $1201, size = $000C;
RAM: file = %O, define = yes, start = $120D, size = $6DF3 - __STACKSIZE__;
}
SEGMENTS {
EXEHDR: load = HEADER, type = ro;
STARTUP: load = RAM, type = ro;
LOWCODE: load = RAM, type = ro, optional = yes;
INIT: load = RAM, type = ro, define = yes, optional = yes;
CODE: load = RAM, type = ro;
RODATA: load = RAM, type = ro;
DATA: load = RAM, type = rw;
ZPSAVE: load = RAM, type = bss;
BSS: load = RAM, type = bss, define = yes;
ZEROPAGE: load = ZP, type = zp;
LOADADDR: load = LOADADDR, type = ro;
EXEHDR: load = HEADER, type = ro;
STARTUP: load = RAM, type = ro;
LOWCODE: load = RAM, type = ro, optional = yes;
INIT: load = RAM, type = ro, define = yes, optional = yes;
CODE: load = RAM, type = ro;
RODATA: load = RAM, type = ro;
DATA: load = RAM, type = rw;
ZPSAVE: load = RAM, type = bss;
BSS: load = RAM, type = bss, define = yes;
ZEROPAGE: load = ZP, type = zp;
}
FEATURES {
CONDES: segment = INIT,

30
src/ld65/cfg/vic20.cfg
View File

@ -1,22 +1,26 @@
SYMBOLS {
__LOADADDR__: type = import;
__EXEHDR__: type = import;
__STACKSIZE__: type = weak, value = $0400; # 1k stack
}
MEMORY {
ZP: file = "", define = yes, start = $0002, size = $001A;
HEADER: file = %O, start = $0FFF, size = $000E;
RAM: file = %O, define = yes, start = $100D, size = $0DF3 - __STACKSIZE__;
ZP: file = "", define = yes, start = $0002, size = $001A;
LOADADDR: file = %O, start = $0FFF, size = $0002;
HEADER: file = %O, start = $1001, size = $000C;
RAM: file = %O, define = yes, start = $100D, size = $0DF3 - __STACKSIZE__;
}
SEGMENTS {
EXEHDR: load = HEADER, type = ro;
STARTUP: load = RAM, type = ro;
LOWCODE: load = RAM, type = ro, optional = yes;
INIT: load = RAM, type = ro, define = yes, optional = yes;
CODE: load = RAM, type = ro;
RODATA: load = RAM, type = ro;
DATA: load = RAM, type = rw;
ZPSAVE: load = RAM, type = bss;
BSS: load = RAM, type = bss, define = yes;
ZEROPAGE: load = ZP, type = zp;
LOADADDR: load = LOADADDR, type = ro;
EXEHDR: load = HEADER, type = ro;
STARTUP: load = RAM, type = ro;
LOWCODE: load = RAM, type = ro, optional = yes;
INIT: load = RAM, type = ro, define = yes, optional = yes;
CODE: load = RAM, type = ro;
RODATA: load = RAM, type = ro;
DATA: load = RAM, type = rw;
ZPSAVE: load = RAM, type = bss;
BSS: load = RAM, type = bss, define = yes;
ZEROPAGE: load = ZP, type = zp;
}
FEATURES {
CONDES: segment = INIT,