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Merge pull request #2181 from bbbradsmith/init-revert
change INIT back to rw for configurations that needed it
This commit is contained in:
commit
84a01816fd
@ -27,7 +27,7 @@ SEGMENTS {
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CODE: load = MAIN, type = ro start = $4000;
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RODATA: load = MAIN, type = ro;
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DATA: load = MAIN, type = rw;
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INIT: load = MAIN, type = bss;
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INIT: load = MAIN, type = rw; # uninitialized, but reserves output space
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ONCE: load = MAIN, type = ro, define = yes;
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LC: load = MAIN, run = LC, type = ro, optional = yes;
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BSS: load = BSS, type = bss, define = yes;
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@ -43,7 +43,7 @@ SEGMENTS {
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CODE: load = MAIN, type = ro;
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RODATA: load = MAIN, type = ro;
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DATA: load = MAIN, type = rw;
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INIT: load = MAIN, type = bss;
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INIT: load = MAIN, type = rw; # uninitialized, but reserves output space
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ONCE: load = MAIN, type = ro, define = yes;
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LC: load = MAIN, run = LC, type = ro, optional = yes;
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BSS: load = BSS, type = bss, define = yes;
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@ -22,7 +22,7 @@ SEGMENTS {
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CODE: load = MAIN, type = ro;
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RODATA: load = MAIN, type = ro;
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DATA: load = MAIN, type = rw;
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INIT: load = MAIN, type = bss;
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INIT: load = MAIN, type = rw; # uninitialized, but reserves output space
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ONCE: load = MAIN, type = ro, define = yes;
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LC: load = MAIN, run = LC, type = ro, optional = yes;
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BSS: load = BSS, type = bss, define = yes;
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@ -26,7 +26,7 @@ SEGMENTS {
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CODE: load = MAIN, type = ro;
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RODATA: load = MAIN, type = ro;
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DATA: load = MAIN, type = rw;
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INIT: load = MAIN, type = bss;
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INIT: load = MAIN, type = rw; # uninitialized, but reserves output space
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ONCE: load = MAIN, type = ro, define = yes;
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LC: load = MAIN, run = LC, type = ro, optional = yes;
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BSS: load = BSS, type = bss, define = yes;
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@ -27,7 +27,7 @@ SEGMENTS {
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CODE: load = MAIN, type = ro start = $4000;
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RODATA: load = MAIN, type = ro;
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DATA: load = MAIN, type = rw;
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INIT: load = MAIN, type = bss;
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INIT: load = MAIN, type = rw; # uninitialized, but reserves output space
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ONCE: load = MAIN, type = ro, define = yes;
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LC: load = MAIN, run = LC, type = ro, optional = yes;
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BSS: load = BSS, type = bss, define = yes;
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@ -43,7 +43,7 @@ SEGMENTS {
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CODE: load = MAIN, type = ro;
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RODATA: load = MAIN, type = ro;
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DATA: load = MAIN, type = rw;
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INIT: load = MAIN, type = bss;
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INIT: load = MAIN, type = rw; # uninitialized, but reserves output space
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ONCE: load = MAIN, type = ro, define = yes;
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LC: load = MAIN, run = LC, type = ro, optional = yes;
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BSS: load = BSS, type = bss, define = yes;
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@ -22,7 +22,7 @@ SEGMENTS {
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CODE: load = MAIN, type = ro;
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RODATA: load = MAIN, type = ro;
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DATA: load = MAIN, type = rw;
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INIT: load = MAIN, type = bss;
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INIT: load = MAIN, type = rw; # uninitialized, but reserves output space
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ONCE: load = MAIN, type = ro, define = yes;
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LC: load = MAIN, run = LC, type = ro, optional = yes;
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BSS: load = BSS, type = bss, define = yes;
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@ -26,7 +26,7 @@ SEGMENTS {
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CODE: load = MAIN, type = ro;
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RODATA: load = MAIN, type = ro;
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DATA: load = MAIN, type = rw;
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INIT: load = MAIN, type = bss;
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INIT: load = MAIN, type = rw; # uninitialized, but reserves output space
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ONCE: load = MAIN, type = ro, define = yes;
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LC: load = MAIN, run = LC, type = ro, optional = yes;
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BSS: load = BSS, type = bss, define = yes;
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@ -23,7 +23,7 @@ SEGMENTS {
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CODE: load = MAIN, type = ro;
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RODATA: load = MAIN, type = ro;
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DATA: load = MAIN, type = rw;
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INIT: load = MAIN, type = bss;
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INIT: load = MAIN, type = rw; # uninitialized, but reserves output space
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ONCE: load = MAIN, type = ro, define = yes;
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BASTAIL: load = MAIN, type = ro, optional = yes;
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BSS: load = BSS, type = bss, define = yes;
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@ -44,7 +44,7 @@ SEGMENTS {
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CODE: load = MAIN, type = ro;
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RODATA: load = MAIN, type = ro;
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DATA: load = MAIN, type = rw;
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INIT: load = MAIN, type = bss;
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INIT: load = MAIN, type = rw; # uninitialized, but reserves output space
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ONCE: load = MAIN, type = ro, define = yes;
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BSS: load = BSS, type = bss, define = yes;
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OVL1ADDR: load = OVL1ADDR, type = ro;
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@ -23,7 +23,7 @@ SEGMENTS {
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CODE: load = MAIN, type = ro;
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RODATA: load = MAIN, type = ro;
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DATA: load = MAIN, type = rw;
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INIT: load = MAIN, type = bss;
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INIT: load = MAIN, type = rw; # uninitialized, but reserves output space
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ONCE: load = MAIN, type = ro, define = yes;
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BSS: load = BSS, type = bss, define = yes;
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}
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@ -57,7 +57,7 @@ SEGMENTS {
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CODE: load = MAIN, type = ro;
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RODATA: load = MAIN, type = ro;
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DATA: load = MAIN, type = rw;
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INIT: load = MAIN, type = bss,optional = yes;
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INIT: load = MAIN, type = rw, optional = yes; # uninitialized, but reserves output space
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ONCE: load = MAIN, type = ro, define = yes;
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BSS: load = BSS, type = bss, define = yes;
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BRAM01ADDR: load = BRAM01ADDR, type = ro, optional = yes;
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@ -24,7 +24,7 @@ SEGMENTS {
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CODE: load = MAIN, type = ro;
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RODATA: load = MAIN, type = ro;
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DATA: load = MAIN, type = rw;
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INIT: load = MAIN, type = bss,optional = yes;
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INIT: load = MAIN, type = rw, optional = yes; # uninitialized, but reserves output space
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ONCE: load = MAIN, type = ro, define = yes;
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BSS: load = BSS, type = bss, define = yes;
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}
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@ -22,7 +22,7 @@ SEGMENTS {
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CODE: load = MAIN, type = ro;
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RODATA: load = MAIN, type = ro;
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DATA: load = MAIN, type = rw;
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INIT: load = MAIN, type = bss;
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INIT: load = MAIN, type = rw; # uninitialized, but reserves output space
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ONCE: load = MAIN, type = ro, define = yes;
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BASTAIL: load = MAIN, type = ro, optional = yes;
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BSS: load = BSS, type = bss, define = yes;
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