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Merge pull request #663 from IrgendwerA8/more_popptr1_adaptations
Adapted div & mod for popptr1.
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95223be101
@ -1,16 +0,0 @@
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;
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; Ullrich von Bassewitz, 17.06.1998
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;
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; int abs (int x);
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;
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.export _abs
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.import negax
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_abs: cpx #$00 ; test hi byte
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bpl L1
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jmp negax ; Negate if negative
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L1: rts
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@ -5,18 +5,18 @@
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;
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; When negating values, we will ignore the possibility here, that one of the
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; values if $8000, in which case the negate will fail.
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; values is $8000, in which case the negate will fail.
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.export tosdiva0, tosdivax
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.import popsargs, udiv16, negax
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.importzp sreg, tmp1, tmp2
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.import popsargsudiv16, negax
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.importzp ptr1, tmp1, tmp2
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tosdiva0:
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ldx #0
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tosdivax:
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jsr popsargs ; Get arguments from stack, adjust sign
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jsr udiv16 ; Do the division
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ldx sreg+1 ; Load high byte of result
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jsr popsargsudiv16 ; Get arguments from stack, adjust sign
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; and do the division
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ldx ptr1+1 ; Load high byte of result
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; Adjust the sign of the result. tmp1 contains the high byte of the left
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; operand, tmp2 contains the high byte of the right operand.
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@ -27,11 +27,11 @@ tosdivax:
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; Result is negative
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lda sreg ; Load low byte of result
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lda ptr1 ; Load low byte of result
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jmp negax ; Adjust the sign
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; Result is positive
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Pos: lda sreg
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Pos: lda ptr1 ; Load low byte of result
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rts
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@ -5,19 +5,19 @@
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;
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; When negating values, we will ignore the possibility here, that one of the
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; values if $8000, in which case the negate will fail.
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; values is $8000, in which case the negate will fail.
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.export tosmoda0, tosmodax
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.import popsargs, udiv16, negax
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.importzp ptr1, tmp1
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.import popsargsudiv16, negax
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.importzp sreg, tmp1
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tosmoda0:
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ldx #0
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tosmodax:
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jsr popsargs ; Get arguments from stack, adjust sign
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jsr udiv16 ; Do the division
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lda ptr1 ; Load low byte of result
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ldx ptr1+1 ; Load high byte of result
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jsr popsargsudiv16 ; Get arguments from stack, adjust sign
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; and do the division
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lda sreg ; Load low byte of result
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ldx sreg+1 ; Load high byte of result
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; Adjust the sign of the result. tmp1 contains the high byte of the left
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; operand, tmp2 contains the high byte of the right operand. The sign of
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@ -3,6 +3,7 @@
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;
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; CC65 runtime: Multiply the primary register by 3
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;
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; Don't touch the Y-register here, the optimizer relies on it!
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.export mulax3
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.importzp ptr1
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@ -1,11 +1,16 @@
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;
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; Ullrich von Bassewitz, 05.08.1998
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;
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; int abs (int x);
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; and
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; CC65 runtime: negation on ints
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;
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.export negax
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.export _abs
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_abs: cpx #$00 ; Test hi byte
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bpl L1 ; Don't touch if positive
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negax: clc
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eor #$FF
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adc #1
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@ -15,7 +20,7 @@ negax: clc
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adc #0
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tax
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pla
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rts
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L1: rts
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@ -1,17 +1,17 @@
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;
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; Ullrich von Bassewitz, 07.08.1998
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;
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; CC65 runtime: helper stuff for mod/div/mul with signed ints
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; CC65 runtime: helper stuff for mod/div with signed ints
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;
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; When negating values, we will ignore the possibility here, that one of the
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; values if $8000, in which case the negate will fail.
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; values is $8000, in which case the negate will fail.
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.export popsargs
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.import negax, popax
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.importzp sreg, tmp1, tmp2, ptr4
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.export popsargsudiv16
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.import negax, popax, udiv16
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.importzp tmp1, tmp2, ptr1, ptr4
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popsargs:
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popsargsudiv16:
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stx tmp2 ; Remember sign
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cpx #0
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bpl L1
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@ -24,7 +24,6 @@ L1: sta ptr4
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cpx #0
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bpl L2
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jsr negax
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L2: sta sreg
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stx sreg+1
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rts
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L2: sta ptr1
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stx ptr1+1
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jmp udiv16 ; Call the division
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@ -3,9 +3,10 @@
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;
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; CC65 runtime: division for unsigned ints
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;
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; Don't use tmp1 here, the signed division tunnels data with it!
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.export tosudiva0, tosudivax, udiv16
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.import popsreg
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.import popptr1
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.importzp sreg, ptr1, ptr4
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@ -14,50 +15,50 @@ tosudiva0:
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tosudivax:
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sta ptr4
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stx ptr4+1 ; Save right operand
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jsr popsreg ; Get left operand
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jsr popptr1 ; Get left operand
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; Do the division
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jsr udiv16
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; Result is in sreg, remainder in ptr1
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; Result is in ptr1, remainder in sreg
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lda sreg
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ldx sreg+1
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lda ptr1
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ldx ptr1+1
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rts
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;---------------------------------------------------------------------------
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; 16by16 division. Divide sreg by ptr4. Result is in sreg, remainder in ptr1
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; 16by16 division. Divide ptr1 by ptr4. Result is in ptr1, remainder in sreg
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; (see mult-div.s from "The Fridge").
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; This is also the entry point for the signed division
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udiv16: lda #0
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sta ptr1+1
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sta sreg+1
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ldy #16
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ldx ptr4+1
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beq udiv16by8a
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L0: asl sreg
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rol sreg+1
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rol a
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L0: asl ptr1
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rol ptr1+1
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rol a
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rol sreg+1
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pha
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tax
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cmp ptr4
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lda ptr1+1
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lda sreg+1
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sbc ptr4+1
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bcc L1
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sta ptr1+1
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pla
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sta sreg+1
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txa
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sbc ptr4
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pha
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inc sreg
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tax
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inc ptr1
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L1: pla
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L1: txa
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dey
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bne L0
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sta ptr1
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sta sreg
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rts
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@ -65,18 +66,18 @@ L1: pla
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; 16by8 division
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udiv16by8a:
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@L0: asl sreg
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rol sreg+1
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@L0: asl ptr1
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rol ptr1+1
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rol a
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bcs @L1
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cmp ptr4
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bcc @L2
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@L1: sbc ptr4
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inc sreg
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inc ptr1
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@L2: dey
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bne @L0
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sta ptr1
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sta sreg
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rts
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@ -5,24 +5,24 @@
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;
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.export tosumoda0, tosumodax
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.import popsreg, udiv16
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.importzp ptr1, ptr4
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.import popptr1, udiv16
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.importzp sreg, ptr4
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tosumoda0:
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ldx #0
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tosumodax:
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sta ptr4
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stx ptr4+1 ; Save right operand
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jsr popsreg ; Get right operand
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jsr popptr1 ; Get right operand
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; Do the division
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jsr udiv16
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; Result is in sreg, remainder in ptr1
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; Result is in ptr1, remainder in sreg
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lda ptr1
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ldx ptr1+1
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lda sreg
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ldx sreg+1
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rts
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