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Serial: Micro-optimisation for apple2enh

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On 65C02 we can spare one cycle on sta (abs); we also
not have to care about the 6502 false reads
This commit is contained in:
Colin Leroy-Mira 2023-08-30 20:51:48 +02:00
parent e8f5ad2471
commit a89a311abf
1 changed files with 12 additions and 1 deletions
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13
libsrc/apple2/ser/a2.ssc.s
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@ -26,6 +26,7 @@
.include "ser-error.inc" .include "ser-error.inc"
.macpack module .macpack module
.macpack cpu
; ------------------------------------------------------------------------ ; ------------------------------------------------------------------------
; Header. Includes jump table ; Header. Includes jump table
@ -57,9 +58,13 @@
;---------------------------------------------------------------------------- ;----------------------------------------------------------------------------
; I/O definitions ; I/O definitions
.if (.cpu .bitand CPU_ISET_65C02)
ACIA = $C088
.else
Offset = $8F ; Move 6502 false read out of I/O to page $BF Offset = $8F ; Move 6502 false read out of I/O to page $BF
ACIA = $C088-Offset ACIA = $C088-Offset
.endif
ACIA_DATA = ACIA+0 ; Data register ACIA_DATA = ACIA+0 ; Data register
ACIA_STATUS = ACIA+1 ; Status register ACIA_STATUS = ACIA+1 ; Status register
ACIA_CMD = ACIA+2 ; Command register ACIA_CMD = ACIA+2 ; Command register
@ -200,7 +205,9 @@ SER_OPEN:
asl asl
asl asl
asl asl
.if .not (.cpu .bitand CPU_ISET_65C02)
adc #Offset ; Assume carry to be clear adc #Offset ; Assume carry to be clear
.endif
tax tax
; Check if the handshake setting is valid ; Check if the handshake setting is valid
@ -315,7 +322,11 @@ SER_GET:
inc RecvHead inc RecvHead
inc RecvFreeCnt inc RecvFreeCnt
ldx #$00 ; (59) ldx #$00 ; (59)
.if (.cpu .bitand CPU_ISET_65C02)
sta (ptr1)
.else
sta (ptr1,x) sta (ptr1,x)
.endif
txa ; Return code = 0 txa ; Return code = 0
rts rts