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Bit definitions for Suzy

This commit is contained in:
Alex Thissen
2024-08-09 15:10:30 +02:00
committed by Alex Thissen
parent 7150fdf4b9
commit abcb073a5a

View File

@@ -79,7 +79,7 @@ MATHL = $FC6D
MATHK = $FC6E
MATHJ = $FC6F
; Suzy Misc
; Suzy sprite engine
SPRCTL0 = $FC80
; Sprite bits-per-pixel definitions
@@ -122,10 +122,48 @@ SPRINIT = $FC83
SUZYHREV = $FC88
SUZYSREV = $FC89
SUZYBUSEN = $FC90
SPRGO = $FC91
; SPRGO bit definitions
SPRITE_GO = %00000001 ; sprite process start bit
EVER_ON = %00000100 ; everon detector enable
SPRSYS = $FC92
; SPRSYS bit definitions for write operations
SIGNMATH = 0x80 ; signed math
ACCUMULATE = 0x40 ; accumulate multiplication results
NO_COLLIDE = 0x20 ; do not collide with any sprites (also SPRCOLL bit definition)
VSTRETCH = 0x10 ; stretch v
LEFTHAND = 0x08
CLR_UNSAFE = 0x04 ; unsafe access reset
SPRITESTOP = 0x02 ; request to stop sprite process
; SPRSYS bit definitions for read operations
MATHWORKING = 0x80 ; math operation in progress
MATHWARNING = 0x40 ; accumulator overflow on multiple or divide by zero
MATHCARRY = 0x20 ; last carry bit
VSTRETCHING = 0x10
LEFTHANDED = 0x08
UNSAFE_ACCESS = 0x04 ; unsafe access performed
SPRITETOSTOP = 0x02 ; requested to stop
SPRITEWORKING = 0x01 ; sprite process is active
JOYSTICK = $FCB0
; JOYSTICK bit definitions
JOYPAD_UP = 0x80
JOYPAD_DOWN = 0x40
JOYPAD_LEFT = 0x20
JOYPAD_RIGHT = 0x10
BUTTON_OPTION1 = 0x08
BUTTON_OPTION2 = 0x04
BUTTON_INNER = 0x02
BUTTON_OUTER = 0x01
SWITCHES = $FCB1
; SWITCHES bit definitions
CART1_IO_INACTIVE = 0x04
CART0_IO_INACTIVE = 0x02
BUTTON_PAUSE = 0x01
RCART0 = $FCB2
RCART1 = $FCB3
LEDS = $FCC0
@@ -133,8 +171,7 @@ PARSTATUS = $FCC2
PARDATA = $FCC3
HOWIE = $FCC4
; ***
;
; *** Mikey Addresses
; ***
@@ -212,7 +249,6 @@ RESET_DONE = %01000000
ENABLE_RELOAD = %00010000
ENABLE_COUNT = %00001000
AUD_CLOCK_MASK = %00000111
; Clock settings
AUD_LINKING = %00000111
AUD_64 = %00000110
@@ -278,15 +314,16 @@ ENABLE_INTEGRATE = %00100000
; Stereo capability does not exist in all Lynxes
; Left and right may be reversed, and if so will be corrected in a later
; release
ATTENREG0 = $FD40 ; Stereo attenuation registers
ATTENREG1 = $FD41
ATTENREG2 = $FD42
ATTENREG3 = $FD43
MPAN = $FD44
MSTEREO = $FD50
; Bit definitions for MPAN and MSTEREO registers
LEFT_ATTENMASK = %11110000
RIGHT_ATTENMASK = %00001111
; Bit definitions for MPAN and MSTEREO registers
LEFT3_SELECT = %10000000
LEFT2_SELECT = %01000000
LEFT1_SELECT = %00100000
@@ -296,9 +333,6 @@ RIGHT2_SELECT = %00000100
RIGHT1_SELECT = %00000010
RIGHT0_SELECT = %00000001
MPAN = $FD44
MSTEREO = $FD50
; Mikey interrupts
INTRST = $FD80