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Added assembler pseudo commands .P4510 and .IFP4510 together with docs and testcase

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This commit is contained in:
Sven Oliver Moll 2016-09-07 19:21:24 +02:00
parent 05279f8302
commit ae3f9bbd77
14 changed files with 109 additions and 23 deletions
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37
doc/ca65.sgml
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@ -424,8 +424,10 @@ The assembler accepts
<tt><ref id=".PSC02" name=".PSC02"></tt> command was given).
<item>all valid 65C02 mnemonics when in 65C02 mode (after the
<tt><ref id=".PC02" name=".PC02"></tt> command was given).
<item>all valid 65618 mnemonics when in 65816 mode (after the
<item>all valid 65816 mnemonics when in 65816 mode (after the
<tt><ref id=".P816" name=".P816"></tt> command was given).
<item>all valid 4510 mnemonics when in 4510 mode (after the
<tt><ref id=".P4510" name=".P4510"></tt> command was given).
</itemize>
@ -3103,6 +3105,12 @@ Here's a list of all control commands and a description, what they do:
(see <tt><ref id=".P02" name=".P02"></tt> command).
<sect1><tt>.IFP4510</tt><label id=".IFP4510"><p>
Conditional assembly: Check if the assembler is currently in 4510 mode
(see <tt><ref id=".P4510" name=".P4510"></tt> command).
<sect1><tt>.IFP816</tt><label id=".IFP816"><p>
Conditional assembly: Check if the assembler is currently in 65816 mode
@ -3494,7 +3502,18 @@ Here's a list of all control commands and a description, what they do:
<tt><ref id="option--cpu" name="--cpu"></tt> command line option.
See: <tt><ref id=".PC02" name=".PC02"></tt>, <tt><ref id=".PSC02"
name=".PSC02"></tt> and <tt><ref id=".P816" name=".P816"></tt>
name=".PSC02"></tt>, <tt><ref id=".P816" name=".P816"></tt> and
<tt><ref id=".P4510" name=".P4510"></tt>
<sect1><tt>.P4510</tt><label id=".P4510"><p>
Enable the 4510 instruction set. This is a superset of the 65C02 and
6502 instruction sets.
See: <tt><ref id=".P02" name=".P02"></tt>, <tt><ref id=".PSC02"
name=".PSC02"></tt>, <tt><ref id=".PC02" name=".PC02"></tt> and
<tt><ref id=".P816" name=".P816"></tt>
<sect1><tt>.P816</tt><label id=".P816"><p>
@ -3503,7 +3522,8 @@ Here's a list of all control commands and a description, what they do:
6502 instruction sets.
See: <tt><ref id=".P02" name=".P02"></tt>, <tt><ref id=".PSC02"
name=".PSC02"></tt> and <tt><ref id=".PC02" name=".PC02"></tt>
name=".PSC02"></tt>, <tt><ref id=".PC02" name=".PC02"></tt> and
<tt><ref id=".P4510" name=".P4510"></tt>
<sect1><tt>.PAGELEN, .PAGELENGTH</tt><label id=".PAGELENGTH"><p>
@ -3531,7 +3551,8 @@ Here's a list of all control commands and a description, what they do:
6502 and 65SC02 instructions.
See: <tt><ref id=".P02" name=".P02"></tt>, <tt><ref id=".PSC02"
name=".PSC02"></tt> and <tt><ref id=".P816" name=".P816"></tt>
name=".PSC02"></tt>, <tt><ref id=".P816" name=".P816"></tt> and
<ref id=".P4510" name=".P4510">4510</tt>
<sect1><tt>.POPCPU</tt><label id=".POPCPU"><p>
@ -3604,7 +3625,8 @@ Here's a list of all control commands and a description, what they do:
6502 instructions.
See: <tt><ref id=".P02" name=".P02"></tt>, <tt><ref id=".PC02"
name=".PC02"></tt> and <tt><ref id=".P816" name=".P816"></tt>
name=".PC02"></tt>, <tt><ref id=".P816" name=".P816"></tt> and
<tt><ref id=".P4510" name=".P4510"></tt>
<sect1><tt>.PUSHCPU</tt><label id=".PUSHCPU"><p>
@ -3796,7 +3818,7 @@ Here's a list of all control commands and a description, what they do:
Switch the CPU instruction set. The command is followed by a string that
specifies the CPU. Possible values are those that can also be supplied to
the <tt><ref id="option--cpu" name="--cpu"></tt> command line option,
namely: 6502, 6502X, 65SC02, 65C02, 65816 and HuC6280.
namely: 6502, 6502X, 65SC02, 65C02, 65816, 4510 and HuC6280.
See: <tt><ref id=".CPU" name=".CPU"></tt>,
<tt><ref id=".IFP02" name=".IFP02"></tt>,
@ -3805,6 +3827,7 @@ Here's a list of all control commands and a description, what they do:
<tt><ref id=".IFPSC02" name=".IFPSC02"></tt>,
<tt><ref id=".P02" name=".P02"></tt>,
<tt><ref id=".P816" name=".P816"></tt>,
<tt><ref id=".P4510" name=".P4510"></tt>
<tt><ref id=".PC02" name=".PC02"></tt>,
<tt><ref id=".PSC02" name=".PSC02"></tt>
@ -4501,6 +4524,7 @@ each supported CPU a constant similar to
CPU_65816
CPU_SWEET16
CPU_HUC6280
CPU_4510
</verb></tscreen>
is defined. These constants may be used to determine the exact type of the
@ -4514,6 +4538,7 @@ another constant is defined:
CPU_ISET_65816
CPU_ISET_SWEET16
CPU_ISET_HUC6280
CPU_ISET_4510
</verb></tscreen>
The value read from the <tt/<ref id=".CPU" name=".CPU">/ pseudo variable may

11
src/ca65/condasm.c
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@ -386,6 +386,16 @@ void DoConditionals (void)
CalcOverallIfCond ();
break;
case TOK_IFP4510:
D = AllocIf (".IFP4510", 1);
NextTok ();
if (IfCond) {
SetIfCond (D, GetCPU() == CPU_4510);
}
ExpectSep ();
CalcOverallIfCond ();
break;
case TOK_IFP816:
D = AllocIf (".IFP816", 1);
NextTok ();
@ -457,6 +467,7 @@ int CheckConditionals (void)
case TOK_IFNDEF:
case TOK_IFNREF:
case TOK_IFP02:
case TOK_IFP4510:
case TOK_IFP816:
case TOK_IFPC02:
case TOK_IFPSC02:

10
src/ca65/pseudo.c
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@ -1530,6 +1530,14 @@ static void DoP816 (void)
static void DoP4510 (void)
/* Switch to 4510 CPU */
{
SetCPU (CPU_4510);
}
static void DoPageLength (void)
/* Set the page length for the listing */
{
@ -2033,6 +2041,7 @@ static CtrlDesc CtrlCmdTab [] = {
{ ccKeepToken, DoConditionals }, /* .IFNDEF */
{ ccKeepToken, DoConditionals }, /* .IFNREF */
{ ccKeepToken, DoConditionals }, /* .IFP02 */
{ ccKeepToken, DoConditionals }, /* .IFP4510 */
{ ccKeepToken, DoConditionals }, /* .IFP816 */
{ ccKeepToken, DoConditionals }, /* .IFPC02 */
{ ccKeepToken, DoConditionals }, /* .IFPSC02 */
@ -2063,6 +2072,7 @@ static CtrlDesc CtrlCmdTab [] = {
{ ccNone, DoOrg },
{ ccNone, DoOut },
{ ccNone, DoP02 },
{ ccNone, DoP4510 },
{ ccNone, DoP816 },
{ ccNone, DoPageLength },
{ ccNone, DoUnexpected }, /* .PARAMCOUNT */

2
src/ca65/scanner.c
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@ -216,6 +216,7 @@ struct DotKeyword {
{ ".IFNDEF", TOK_IFNDEF },
{ ".IFNREF", TOK_IFNREF },
{ ".IFP02", TOK_IFP02 },
{ ".IFP4510", TOK_IFP4510 },
{ ".IFP816", TOK_IFP816 },
{ ".IFPC02", TOK_IFPC02 },
{ ".IFPSC02", TOK_IFPSC02 },
@ -251,6 +252,7 @@ struct DotKeyword {
{ ".ORG", TOK_ORG },
{ ".OUT", TOK_OUT },
{ ".P02", TOK_P02 },
{ ".P4510", TOK_P4510 },
{ ".P816", TOK_P816 },
{ ".PAGELEN", TOK_PAGELENGTH },
{ ".PAGELENGTH", TOK_PAGELENGTH },

2
src/ca65/token.h
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@ -193,6 +193,7 @@ typedef enum token_t {
TOK_IFNDEF,
TOK_IFNREF,
TOK_IFP02,
TOK_IFP4510,
TOK_IFP816,
TOK_IFPC02,
TOK_IFPSC02,
@ -223,6 +224,7 @@ typedef enum token_t {
TOK_ORG,
TOK_OUT,
TOK_P02,
TOK_P4510,
TOK_P816,
TOK_PAGELENGTH,
TOK_PARAMCOUNT,

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49
test/assembler/Makefile
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@ -5,26 +5,43 @@ BINDIR = ../../bin
#WORKDIR := ../../testwrk
WORKDIR := .
TARGETS = 6502 6502x 65sc02 65c02
#TARGETS += 65816
TARGETS += 4510
TARGETS += huc6280
#TARGETS += m740
BASE_TARGETS = 6502 6502x 65sc02 65c02
BASE_TARGETS += 4510 huc6280
all: $(addprefix $(WORKDIR)/, $(addsuffix -opcodes.bin, $(TARGETS)))
OPCODE_TARGETS = $(BASE_TARGETS)
CPUDETECT_TARGETS = $(BASE_TARGETS)
CPUDETECT_TARGETS += 65816
# default target defined later
all:
# generate opcode targets and expand target list
define opcode
OPCODE_TARGETLIST += $(1)-opcodes.bin
$$(WORKDIR)/$(1)-opcodes.bin: $(1)-opcodes.s
@$$(BINDIR)/cl65 --cpu $(1) -t none -l $$(WORKDIR)/$(1)-opcodes.lst --obj-path $$(WORKDIR) -o $$@ $$<
@diff -q $(1)-opcodes.ref $$@ || (cat $$(WORKDIR)/$(1)-opcodes.lst ; exit 1)
@echo ca65 --cpu $(1) opcodes ok
endef
$(foreach target,$(OPCODE_TARGETS),$(eval $(call opcode,$(target))))
# generate cpudetect targets and expand target list
define cpudetect
CPUDETECT_TARGETLIST += $(1)-cpudetect.bin
$$(WORKDIR)/$(1)-cpudetect.bin: cpudetect.s
@$$(BINDIR)/cl65 --cpu $(1) -t none -l $$(WORKDIR)/$(1)-cpudetect.lst --obj-path $$(WORKDIR) -o $$@ $$<
@diff -q $(1)-cpudetect.ref $$@ || (cat $$(WORKDIR)/$(1)-cpudetect.lst ; exit 1)
@echo ca65 --cpu $(1) cpudetect ok
endef
$(foreach target,$(CPUDETECT_TARGETS),$(eval $(call cpudetect,$(target))))
# now that all targets have been generated, get to the manual ones
all: $(OPCODE_TARGETLIST) $(CPUDETECT_TARGETLIST)
@#
.PHONY: all clean $(addprefix $(WORKDIR)/, $(addsuffix -opcodes.bin, $(TARGETS)))
clean:
rm -f *.o *.bin *.lst
define build
$$(WORKDIR)/$(1)-opcodes.bin: $(1)-opcodes.s
@$$(BINDIR)/cl65 --cpu $(1) -t none -l $$(WORKDIR)/$(1)-opcodes.lst --obj-path $$(WORKDIR) -o $$@ $$<
@diff -q $(1)-opcodes.ref $$@ || (cat $$(WORKDIR)/$(1)-opcodes.lst ; exit 1)
@echo ca65 --cpu $(1) ok
endef
$(foreach target,$(TARGETS),$(eval $(call build,$(target))))
.PHONY: all clean $(OPCODE_TARGETLIST) $(CPUDETECT_TARGETLIST)

21
test/assembler/README
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@ -2,6 +2,9 @@
Assembler Testcases
===================
Opcode Tests:
-------------
These testcases are inspired by the ones now removed from test/assembler.
The main purpose is to have each possible opcode generated at least once,
either by an assembly instruction or a ".byte"-placeholder. Typically
@ -23,7 +26,23 @@ The testcases for 6502, 6502x, 65sc02, 65c02, 4510, and huc6280 have been
put together by Sven Oliver ("SvOlli") Moll, as well as a template for the
m740 instructions set.
Still to do is to find a way to implement a testcase for the 65816
Still to do is to find a way to implement an opcode testcase for the 65816
processor, since it's capable of executing instructions with an 8-bit and
a 16-bit operator alike, only distinguished by one processor flag.
CPU detect Tests
----------------
These tests all assemble the same file "cpudetect.s" which contains several
conditionals for several CPUs, only using every option known to the "--cpu"
commandline switch of ca65/cl65.
Reference (".ref") Files
------------------------
A hint on creating these files: when running the test, it will fail due to
the missing ".ref" file. Review the output of the ".lst" very pedantic, then
copy the ".bin" to the ".ref" file.

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