mirror of
https://github.com/cc65/cc65.git
synced 2024-06-26 20:29:34 +00:00
More cleanup.
git-svn-id: svn://svn.cc65.org/cc65/trunk@5647 b7a2c559-68d2-44c3-8de9-860c34a00d81
This commit is contained in:
uz
parent
b0ed819891
commit
b0c4678ad2
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@ -113,6 +113,10 @@ struct CPURegs {
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#define OF 0x40 /* Overflow flag */
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#define SF 0x80 /* Sign flag */
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/* Type of an opcode handler function */
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struct CPUInstance;
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typedef void (*OPFunc) (struct CPUInstance* D);
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/* Control data passed to the main program */
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@ -152,7 +156,7 @@ static const struct CPUData CData[] = {
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/* CPU instance data */
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typedef struct CPUInstance CPUInstance;
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struct CPUInstance {
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unsigned Type; /* CPU type */
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const OPFunc* Handlers; /* Table with opcode handlers */
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CPURegs Regs; /* The CPU registers */
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@ -421,20 +425,57 @@ struct CPUInstance {
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static unsigned char MemReadByte (unsigned Addr)
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/* Read a byte from a memory location */
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{
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return Sim->Read (Addr);
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}
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static unsigned MemReadWord (unsigned Addr)
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/* Read a word from a memory location */
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{
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unsigned W = Sim->Read (Addr);
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return (W | (Sim->Read (Addr + 1) << 8));
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}
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static unsigned MemReadZPWord (unsigned Addr)
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/* Read a word from the zero page. This function differs from ReadMemW in that
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* the read will always be in the zero page, even in case of an address
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* overflow.
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*/
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{
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unsigned W = Sim->Read (Addr & 0xFF);
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return (W | (Sim->Read ((Addr + 1) & 0xFF) << 8));
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}
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static void MemWriteByte (unsigned Addr, unsigned char Val)
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/* Write a byte to a memory location */
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{
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Sim->Write (Addr, Val);
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}
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/*****************************************************************************/
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/* CPUInstance */
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/*****************************************************************************/
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static CPUInstance* NewCPUInstance (unsigned Type)
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static CPUInstance* NewCPUInstance (const OPFunc FuncTable[256], void* CfgInfo)
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/* Create and return a new CPU instance struct */
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{
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/* Allocate memory */
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CPUInstance* D = Sim->Malloc (sizeof (*D));
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/* Initialize the fields */
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D->Type = Type; /* CPU type */
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D->Handlers = FuncTable; /* Table with opcode handlers */
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D->StackPage = 0x100; /* Allows to move the stack page */
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D->HaveNMIRequest = 0; /* NMI request active */
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D->HaveIRQRequest = 0; /* IRQ request active */
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@ -446,16 +487,25 @@ static CPUInstance* NewCPUInstance (unsigned Type)
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static void DeleteCPUInstance (CPUInstance* Instance)
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/* Delete a CPU instance */
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{
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/* Just free the memory */
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Sim->Free (Instance);
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}
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/*****************************************************************************/
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/* Opcode stuff */
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/* Opcode handling functions */
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/*****************************************************************************/
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static void OPC_Illegal (CPUInstance* D)
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{
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Warning ("Illegal opcode $%02X at address $%04X\n",
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MemReadByte (D->Regs.PC), D->Regs.PC);
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Sim->Warning ("Illegal opcode $%02X at address $%04X\n",
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MemReadByte (D->Regs.PC), D->Regs.PC);
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}
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@ -1142,14 +1192,31 @@ static void OPC_6502_6A (CPUInstance* D)
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static void OPC_6502_6C (CPUInstance* D)
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/* Opcode $6C: JMP (ind) */
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{
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unsigned Addr;
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unsigned PC, Lo, Hi;
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D->Cycles = 5;
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Addr = MemReadWord (D->Regs.PC+1);
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PC = D->Regs.PC;
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Lo = MemReadWord (PC+1);
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/* Emulate the 6502 bug */
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D->Regs.PC = MemReadByte (Addr);
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Addr = (Addr & 0xFF00) | ((Addr + 1) & 0xFF);
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D->Regs.PC |= (MemReadByte (Addr) << 8);
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D->Regs.PC = MemReadByte (Lo);
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Hi = (Lo & 0xFF00) | ((Lo + 1) & 0xFF);
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D->Regs.PC |= (MemReadByte (Hi) << 8);
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/* Output a warning if the bug is triggered */
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if (Hi != Lo + 1) {
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Sim->Warning ("6502 indirect jump bug triggered at $%04X, ind addr = $%04X",
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PC, Lo);
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}
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}
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static void OPC_65C02_6C (CPUInstance* D)
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/* Opcode $6C: JMP (ind) */
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{
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/* 6502 bug fixed here */
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D->Cycles = 5;
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D->Regs.PC = MemReadWord (MemReadWord (D->Regs.PC+1));
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}
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@ -2312,14 +2379,13 @@ static void OPC_6502_FE (CPUInstance* D)
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/*****************************************************************************/
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/* Data */
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/* Opcode handler tables */
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/*****************************************************************************/
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/* Opcode handler table */
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typedef void (*OPCFunc) (CPUInstance* D);
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static const OPCFunc OPCTable[256] = {
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/* Opcode handler table for the 6502 */
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static const OPFunc OP6502Table[256] = {
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OPC_6502_00,
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OPC_6502_01,
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OPC_Illegal,
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@ -2580,6 +2646,268 @@ static const OPCFunc OPCTable[256] = {
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/* Opcode handler table for the 65C02 */
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static const OPFunc OP65C02Table[256] = {
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OPC_6502_00,
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OPC_6502_01,
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OPC_Illegal,
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OPC_Illegal,
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OPC_Illegal,
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OPC_6502_05,
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OPC_6502_06,
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OPC_Illegal,
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OPC_6502_08,
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OPC_6502_09,
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OPC_6502_0A,
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OPC_Illegal,
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OPC_Illegal,
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OPC_6502_0D,
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OPC_6502_0E,
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OPC_Illegal,
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OPC_6502_10,
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OPC_6502_11,
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OPC_Illegal,
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OPC_Illegal,
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OPC_Illegal,
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OPC_6502_15,
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OPC_6502_16,
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OPC_Illegal,
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OPC_6502_18,
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OPC_6502_19,
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OPC_Illegal,
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OPC_Illegal,
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OPC_Illegal,
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OPC_6502_1D,
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OPC_6502_1E,
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OPC_Illegal,
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OPC_6502_20,
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OPC_6502_21,
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OPC_Illegal,
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OPC_Illegal,
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OPC_6502_24,
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OPC_6502_25,
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OPC_6502_26,
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OPC_Illegal,
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OPC_6502_28,
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OPC_6502_29,
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OPC_6502_2A,
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OPC_Illegal,
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OPC_6502_2C,
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OPC_6502_2D,
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OPC_6502_2E,
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OPC_Illegal,
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OPC_6502_30,
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OPC_6502_31,
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OPC_Illegal,
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OPC_Illegal,
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OPC_Illegal,
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OPC_6502_35,
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OPC_6502_36,
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OPC_Illegal,
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OPC_6502_38,
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OPC_6502_39,
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OPC_Illegal,
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OPC_Illegal,
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OPC_Illegal,
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OPC_6502_3D,
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OPC_6502_3E,
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OPC_Illegal,
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OPC_6502_40,
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OPC_6502_41,
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OPC_Illegal,
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OPC_Illegal,
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OPC_Illegal,
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OPC_6502_45,
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OPC_6502_46,
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OPC_Illegal,
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OPC_6502_48,
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OPC_6502_49,
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OPC_6502_4A,
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OPC_Illegal,
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OPC_6502_4C,
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OPC_6502_4D,
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OPC_6502_4E,
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OPC_Illegal,
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OPC_6502_50,
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OPC_6502_51,
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OPC_Illegal,
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OPC_Illegal,
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OPC_Illegal,
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OPC_6502_55,
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OPC_6502_56,
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OPC_Illegal,
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OPC_6502_58,
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OPC_6502_59,
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OPC_Illegal,
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OPC_Illegal,
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OPC_Illegal,
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OPC_6502_5D,
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OPC_6502_5E,
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OPC_Illegal,
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OPC_6502_60,
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OPC_6502_61,
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OPC_Illegal,
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OPC_Illegal,
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OPC_Illegal,
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OPC_6502_65,
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OPC_6502_66,
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OPC_Illegal,
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OPC_6502_68,
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OPC_6502_69,
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OPC_6502_6A,
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OPC_Illegal,
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OPC_65C02_6C,
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OPC_6502_6D,
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OPC_6502_6E,
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OPC_Illegal,
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OPC_6502_70,
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OPC_6502_71,
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OPC_Illegal,
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OPC_Illegal,
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OPC_Illegal,
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OPC_6502_75,
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OPC_6502_76,
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OPC_Illegal,
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OPC_6502_78,
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OPC_6502_79,
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OPC_Illegal,
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OPC_Illegal,
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OPC_Illegal,
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OPC_6502_7D,
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OPC_6502_7E,
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OPC_Illegal,
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OPC_Illegal,
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OPC_6502_81,
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OPC_Illegal,
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OPC_Illegal,
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OPC_6502_84,
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OPC_6502_85,
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OPC_6502_86,
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OPC_Illegal,
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OPC_6502_88,
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OPC_Illegal,
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OPC_6502_8A,
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OPC_Illegal,
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OPC_6502_8C,
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OPC_6502_8D,
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OPC_6502_8E,
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OPC_Illegal,
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OPC_6502_90,
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OPC_6502_91,
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OPC_Illegal,
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OPC_Illegal,
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OPC_6502_94,
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OPC_6502_95,
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OPC_6502_96,
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OPC_Illegal,
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OPC_6502_98,
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OPC_6502_99,
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OPC_6502_9A,
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OPC_Illegal,
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OPC_Illegal,
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OPC_6502_9D,
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OPC_Illegal,
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OPC_Illegal,
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OPC_6502_A0,
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OPC_6502_A1,
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OPC_6502_A2,
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OPC_Illegal,
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OPC_6502_A4,
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OPC_6502_A5,
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OPC_6502_A6,
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OPC_Illegal,
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OPC_6502_A8,
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OPC_6502_A9,
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OPC_6502_AA,
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OPC_Illegal,
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OPC_6502_AC,
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OPC_6502_AD,
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OPC_6502_AE,
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OPC_Illegal,
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OPC_6502_B0,
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OPC_6502_B1,
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OPC_Illegal,
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OPC_Illegal,
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OPC_6502_B4,
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OPC_6502_B5,
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OPC_6502_B6,
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OPC_Illegal,
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OPC_6502_B8,
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OPC_6502_B9,
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OPC_6502_BA,
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OPC_Illegal,
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OPC_6502_BC,
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OPC_6502_BD,
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OPC_6502_BE,
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OPC_Illegal,
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OPC_6502_C0,
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OPC_6502_C1,
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OPC_Illegal,
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OPC_Illegal,
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OPC_6502_C4,
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OPC_6502_C5,
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OPC_6502_C6,
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OPC_Illegal,
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OPC_6502_C8,
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OPC_6502_C9,
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OPC_6502_CA,
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OPC_Illegal,
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OPC_6502_CC,
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OPC_6502_CD,
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OPC_6502_CE,
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OPC_Illegal,
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OPC_6502_D0,
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OPC_6502_D1,
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OPC_Illegal,
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OPC_Illegal,
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OPC_Illegal,
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OPC_6502_D5,
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OPC_6502_D6,
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OPC_Illegal,
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OPC_6502_D8,
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OPC_6502_D9,
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OPC_Illegal,
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OPC_Illegal,
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OPC_Illegal,
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OPC_6502_DD,
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OPC_6502_DE,
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OPC_Illegal,
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OPC_6502_E0,
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OPC_6502_E1,
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OPC_Illegal,
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OPC_Illegal,
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OPC_6502_E4,
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OPC_6502_E5,
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OPC_6502_E6,
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OPC_Illegal,
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OPC_6502_E8,
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OPC_6502_E9,
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OPC_6502_EA,
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OPC_Illegal,
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OPC_6502_EC,
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OPC_6502_ED,
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OPC_6502_EE,
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OPC_Illegal,
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OPC_6502_F0,
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OPC_6502_F1,
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OPC_Illegal,
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OPC_Illegal,
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OPC_Illegal,
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OPC_6502_F5,
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OPC_6502_F6,
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OPC_Illegal,
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OPC_6502_F8,
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OPC_6502_F9,
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OPC_Illegal,
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OPC_Illegal,
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OPC_Illegal,
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OPC_6502_FD,
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OPC_6502_FE,
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OPC_Illegal,
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};
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/*****************************************************************************/
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/* Code */
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/*****************************************************************************/
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@ -2598,6 +2926,7 @@ static void Init (const SimData* S)
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static void* Create6502Instance (void* CfgInfo)
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/* Create an instance of a 6502 CPU */
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{
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return NewCPUInstance (OP6502Table, CfgInfo);
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}
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@ -2605,6 +2934,7 @@ static void* Create6502Instance (void* CfgInfo)
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static void* Create65C02Instance (void* CfgInfo)
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/* Create an instance of a 65C02 CPU */
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{
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return NewCPUInstance (OP65C02Table, CfgInfo);
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}
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@ -2612,6 +2942,8 @@ static void* Create65C02Instance (void* CfgInfo)
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static void DestroyInstance (void* Instance)
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/* Destroy an instance of a CPU */
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{
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/* Free the instance */
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DeleteCPUInstance (Instance);
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}
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@ -2694,7 +3026,7 @@ static unsigned ExecuteInsn (void* Data)
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unsigned char OPC = MemReadByte (D->Regs.PC);
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/* Execute it */
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OPCTable[OPC] (D);
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D->Handlers[OPC] (D);
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}
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@ -1,5 +1,5 @@
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#
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# gcc Makefile for the sim65 chip plugins
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# gcc Makefile for the sim65 CPU plugins
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#
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# Include directories
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