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cbb2833c01
@ -39,6 +39,8 @@
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6502)
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* one cycle win for fetch-modify-write instructions ignored
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(e.g. ROL abs,x takes only 6 cycles if no page break occurs)
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* BRK, IRQ, NMI and RESET are not different from 6502 which they are in
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reality (e.g. D-flag handling)
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*/
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#include "memory.h"
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@ -2581,7 +2583,9 @@ static void OPC_6502_F6 (void)
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static void OPC_6502_F8 (void)
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/* Opcode $F8: SED */
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{
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Cycles = 2;
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SET_DF (1);
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Regs.PC += 1;
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}
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