12 Commits

Author	SHA1	Message	Date
Lauri Kasanen	3ea999f034	Correct mvn, mvp, pei	2022-11-03 08:17:51 +02:00
Lauri Kasanen	b90bf258e2	Implement far override	2022-11-03 08:17:51 +02:00
Lauri Kasanen	4b04f81d37	Fix jsl length	2022-11-03 08:17:51 +02:00
Lauri Kasanen	1294c1c253	Implement changing-size opcodes	2022-11-03 08:17:51 +02:00
AIDA Shinra	9283e9ca98	Support for "virtual operands" of subroutines like this: ... jsr SomeProc .byte $00, $01 ; argument to SomeProc ; return here from SomeProc bit $3F	2018-06-10 18:09:11 +09:00
Oliver Schmidt	4185caf855	Normalized code.	2014-03-04 01:11:19 +01:00
Oliver Schmidt	85885001b1	Removed (pretty inconsistently used) tab chars from source code base.	2013-05-09 13:57:12 +02:00
uz	3b9032a7c4	Added disassembler support for the NMOS 6502 with illegal opcodes. ... git-svn-id: svn://svn.cc65.org/cc65/trunk@4966 b7a2c559-68d2-44c3-8de9-860c34a00d81	2011-02-06 16:04:46 +00:00
cuz	cba152f777	An "absolute mode override modifier" is now added for instructions where ... the assembler will otherwise choose the cheaper zeropage addressing mode because of the size of the operand. git-svn-id: svn://svn.cc65.org/cc65/trunk@2590 b7a2c559-68d2-44c3-8de9-860c34a00d81	2003-10-31 16:28:56 +00:00
cuz	7496da8f93	Fixed a bug in the opcode tables ... git-svn-id: svn://svn.cc65.org/cc65/trunk@2588 b7a2c559-68d2-44c3-8de9-860c34a00d81	2003-10-30 20:35:07 +00:00
cuz	11328d8ea6	Added additional 65(S)C02 opcodes ... git-svn-id: svn://svn.cc65.org/cc65/trunk@2254 b7a2c559-68d2-44c3-8de9-860c34a00d81	2003-08-08 19:23:55 +00:00
cuz	897f3e9530	Base code for handling different CPUs, more improvements ... git-svn-id: svn://svn.cc65.org/cc65/trunk@2253 b7a2c559-68d2-44c3-8de9-860c34a00d81	2003-08-08 11:12:04 +00:00