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988260c699
This PR is the second of two PRs that replaces earlier PRs #2589 and #2590. Due to a git branching mishap it was decided to re-partition the new functionality in two sequential PRs that offer self-contained, new functionality to sim65. The functionality in this second and last PR provides the following things in relation to the new "peripheral" support: * C support: there is now an include/sim65.h that can be included from C. It provides access to the memory-mapped peripheral addresses. * Asm support: there is now an asminc/sim65.inc that can be included from assembly. It provides symbolic labels for the memory-mapped peripheral addresses. Note: the two items above are implemented by adding a "_peripherals" symbol to cfg/sim6502.cfg and cfg/sim65c02.cfg, with the fixed base address of the peripherals memory aperture (0xffc0). * Updated the sim65 documentation to describe the peripherals in some detail, with examples that show to use the new features from within C. * Some examples in the new samples/sim5/ directory. These are currently not integrated in the build system (in other words, there's no Makefile there), because I don't know how to do that. I will happily implement that after #2582 is taken care of. If that is not acceptable, the next best thing will be for somebody else (who understands how the Makefiles are set up) to take care of this. If that's not going to happen, and we don't want examples that are not properly integrated with the build system, there's always the option of removing these samples from the PR.
137 lines
6.7 KiB
C
137 lines
6.7 KiB
C
/*****************************************************************************/
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/* */
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/* sim65.h */
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/* */
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/* Definitions for the sim6502 and sim65c02 targets */
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/* */
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/* */
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/* */
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/* (C) 2025 Sidney Cadot */
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/* */
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/* */
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/* This software is provided 'as-is', without any expressed or implied */
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/* warranty. In no event will the authors be held liable for any damages */
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/* arising from the use of this software. */
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/* */
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/* Permission is granted to anyone to use this software for any purpose, */
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/* including commercial applications, and to alter it and redistribute it */
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/* freely, subject to the following restrictions: */
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/* */
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/* 1. The origin of this software must not be misrepresented; you must not */
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/* claim that you wrote the original software. If you use this software */
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/* in a product, an acknowledgment in the product documentation would be */
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/* appreciated but is not required. */
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/* 2. Altered source versions must be plainly marked as such, and must not */
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/* be misrepresented as being the original software. */
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/* 3. This notice may not be removed or altered from any source */
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/* distribution. */
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/* */
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/*****************************************************************************/
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#ifndef _SIM65_H
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#define _SIM65_H
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/* Check that we include this file while compiling to a compatible target. */
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#if !defined(__SIM6502__) && !defined(__SIM65C02__)
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# error This module may only be used when compiling for the sim6502 or sim65c02 targets!
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#endif
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#include <stdint.h>
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/* The sim65 targets (sim6502, sim65c02) have a peripheral memory aperture located at
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* address range 0xFFC0 .. 0xFFDF. Currently, the following peripherals are located
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* inside that memory apeture:
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*
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* $FFC0 .. $FFC9 "counter" peripheral
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* $FFCA .. $FFCB "sim65 control" peripheral
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* $FFCC .. $FFDF (currently unused)
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*
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* The "peripherals" structure below corresponds to the register layout of the currently
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* defined peripherals in this memory range. Combined with the fact that the sim6502 and
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* sim65c02 linker configuration files define the "peripherals" symbol to be fixed at
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* address $FFC0, this provides easy-to-use and efficient access to the peripheral registers.
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*
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* After including "sim65.h", it is possible for a C program to do things like:
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*
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* {
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* peripherals.counter.latch = 0;
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* peripherals.sim65.cpu_mode = SIM65_CPU_MODE_6502X;
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* peripherals.sim65.trace_mode = SIM65_TRACE_MODE_ENABLE_FULL;
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* }
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*
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* Note that "peripherals" variable is declared volatile. This instructs a C compiler to
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* forego optimizations on memory accesses to the variable. However, CC65 currently ignores
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* the volatile attribute. Fortunately, it is not smart with respect to optimizing
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* memory accesses, so accessing the "peripherals" fields works fine in practice.
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*/
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extern volatile struct {
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struct {
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uint8_t latch;
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uint8_t select;
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union {
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uint8_t value [8]; /* Access value as eight separate bytes. */
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uint16_t value16 [4]; /* Access value as four 16-bit words. */
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uint32_t value32 [2]; /* Access value as two 32-bit long words. */
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};
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} counter;
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struct {
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uint8_t cpu_mode;
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uint8_t trace_mode;
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} sim65;
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} peripherals;
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/* Values for the peripherals.counter.select field. */
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#define COUNTER_SELECT_CLOCKCYCLE_COUNTER 0x00
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#define COUNTER_SELECT_INSTRUCTION_COUNTER 0x01
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#define COUNTER_SELECT_IRQ_COUNTER 0x02
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#define COUNTER_SELECT_NMI_COUNTER 0x03
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#define COUNTER_SELECT_WALLCLOCK_TIME 0x80
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#define COUNTER_SELECT_WALLCLOCK_TIME_SPLIT 0x81
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/* Values for the peripherals.sim65.cpu_mode field. */
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#define SIM65_CPU_MODE_6502 0x00
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#define SIM65_CPU_MODE_65C02 0x01
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#define SIM65_CPU_MODE_6502X 0x02
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/* Bitfield values for the peripherals.sim65.trace_mode field. */
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#define SIM65_TRACE_MODE_FIELD_INSTR_COUNTER 0x40
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#define SIM65_TRACE_MODE_FIELD_CLOCK_COUNTER 0x20
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#define SIM65_TRACE_MODE_FIELD_PC 0x10
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#define SIM65_TRACE_MODE_FIELD_INSTR_BYTES 0x08
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#define SIM65_TRACE_MODE_FIELD_INSTR_ASSEMBLY 0x04
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#define SIM65_TRACE_MODE_FIELD_CPU_REGISTERS 0x02
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#define SIM65_TRACE_MODE_FIELD_CC65_SP 0x01
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/* Values for the peripherals.sim65.trace_mode field that fully disable / enable tracing. */
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#define SIM65_TRACE_MODE_DISABLE 0x00
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#define SIM65_TRACE_MODE_ENABLE_FULL 0x7F
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/* Convenience macros to enable / disable tracing at runtime. */
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#define TRACE_ON() do peripherals.sim65.trace_mode = SIM65_TRACE_MODE_ENABLE_FULL; while(0)
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#define TRACE_OFF() do peripherals.sim65.trace_mode = SIM65_TRACE_MODE_DISABLE; while(0)
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/* Convenience macro to query the CPU mode at runtime. */
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#define GET_CPU_MODE() peripherals.sim65.cpu_mode
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/* Convenience macro to set the CPU mode at runtime.
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*
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* Use SIM65_CPU_MODE_6502, SIM65_CPU_MODE_65C02, or SIM65_CPU_MODE_6502 as argument.
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*
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* Important Note:
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*
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* When running in a program compiled for the "sim6502" target, it is safe to switch to
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* 65C02 or 6502X mode, since the runtime library will only use plain 6502 opcodes, and
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* those work the same in 65C02 and 6502X mode.
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*
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* However, when running in a program compiled for the "sim65c02" target, it is NOT safe
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* to switch to 6502 or 6502X mode, since many routines in the runtime library use
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* 65C02-specific opcodes, and these will not work as expected when the CPU is switched
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* to 6502 or 6502X mode. When such an instruction is encountered, the program will
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* exhibit undefined behavior.
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*/
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#define SET_CPU_MODE(mode) do peripherals.sim65.cpu_mode = mode; while(0)
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/* End of sim65.h */
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#endif
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