mirror of https://github.com/cc65/cc65.git
823 lines
36 KiB
C
823 lines
36 KiB
C
/*****************************************************************************/
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/* */
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/* opcodes.c */
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/* */
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/* Opcode and addressing mode definitions */
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/* */
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/* */
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/* */
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/* (C) 2001-2004 Ullrich von Bassewitz */
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/* Roemerstrasse 52 */
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/* D-70794 Filderstadt */
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/* EMail: uz@cc65.org */
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/* */
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/* */
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/* This software is provided 'as-is', without any expressed or implied */
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/* warranty. In no event will the authors be held liable for any damages */
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/* arising from the use of this software. */
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/* */
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/* Permission is granted to anyone to use this software for any purpose, */
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/* including commercial applications, and to alter it and redistribute it */
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/* freely, subject to the following restrictions: */
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/* */
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/* 1. The origin of this software must not be misrepresented; you must not */
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/* claim that you wrote the original software. If you use this software */
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/* in a product, an acknowledgment in the product documentation would be */
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/* appreciated but is not required. */
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/* 2. Altered source versions must be plainly marked as such, and must not */
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/* be misrepresented as being the original software. */
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/* 3. This notice may not be removed or altered from any source */
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/* distribution. */
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/* */
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/*****************************************************************************/
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#include "stdlib.h"
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#include <string.h>
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#include <ctype.h>
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/* common */
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#include "check.h"
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#include "cpu.h"
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/* cc65 */
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#include "codeinfo.h"
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#include "error.h"
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#include "opcodes.h"
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/*****************************************************************************/
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/* Data */
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/*****************************************************************************/
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/* Opcode description table */
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const OPCDesc OPCTable[OP65_COUNT] = {
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/* 65XX opcodes */
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{ OP65_ADC, /* opcode */
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"adc", /* mnemonic */
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0, /* size */
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OF_SETF | OF_READ, /* flags */
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REG_A | PSTATE_C, /* use */
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REG_A | PSTATE_CZVN /* chg */
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},
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{ OP65_AND, /* opcode */
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"and", /* mnemonic */
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0, /* size */
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OF_SETF | OF_READ, /* flags */
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REG_A, /* use */
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REG_A | PSTATE_ZN /* chg */
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},
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{ OP65_ASL, /* opcode */
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"asl", /* mnemonic */
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0, /* size */
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OF_SETF | OF_NOIMP | OF_RMW, /* flags */
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REG_NONE, /* use */
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PSTATE_CZN /* chg */
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},
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{ OP65_BCC, /* opcode */
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"bcc", /* mnemonic */
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2, /* size */
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OF_CBRA, /* flags */
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PSTATE_C, /* use */
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REG_NONE /* chg */
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},
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{ OP65_BCS, /* opcode */
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"bcs", /* mnemonic */
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2, /* size */
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OF_CBRA, /* flags */
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PSTATE_C, /* use */
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REG_NONE /* chg */
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},
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{ OP65_BEQ, /* opcode */
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"beq", /* mnemonic */
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2, /* size */
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OF_CBRA | OF_ZBRA | OF_FBRA, /* flags */
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PSTATE_Z, /* use */
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REG_NONE /* chg */
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},
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{ OP65_BIT, /* opcode */
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"bit", /* mnemonic */
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0, /* size */
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OF_READ, /* flags */
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REG_A, /* use */
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PSTATE_ZVN /* chg */
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},
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{ OP65_BMI, /* opcode */
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"bmi", /* mnemonic */
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2, /* size */
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OF_CBRA | OF_FBRA, /* flags */
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PSTATE_N, /* use */
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REG_NONE /* chg */
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},
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{ OP65_BNE, /* opcode */
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"bne", /* mnemonic */
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2, /* size */
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OF_CBRA | OF_ZBRA | OF_FBRA, /* flags */
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PSTATE_Z, /* use */
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REG_NONE /* chg */
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},
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{ OP65_BPL, /* opcode */
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"bpl", /* mnemonic */
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2, /* size */
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OF_CBRA | OF_FBRA, /* flags */
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PSTATE_N, /* use */
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REG_NONE /* chg */
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},
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{ OP65_BRA, /* opcode */
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"bra", /* mnemonic */
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2, /* size */
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OF_UBRA, /* flags */
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REG_NONE, /* use */
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REG_NONE /* chg */
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},
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{ OP65_BRK, /* opcode */
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"brk", /* mnemonic */
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1, /* size */
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OF_NONE, /* flags */
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REG_NONE, /* use */
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PSTATE_B /* chg */
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},
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{ OP65_BVC, /* opcode */
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"bvc", /* mnemonic */
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2, /* size */
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OF_CBRA, /* flags */
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PSTATE_V, /* use */
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REG_NONE /* chg */
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},
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{ OP65_BVS, /* opcode */
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"bvs", /* mnemonic */
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2, /* size */
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OF_CBRA, /* flags */
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PSTATE_V, /* use */
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REG_NONE /* chg */
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},
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{ OP65_CLC, /* opcode */
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"clc", /* mnemonic */
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1, /* size */
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OF_NONE, /* flags */
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REG_NONE, /* use */
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PSTATE_C /* chg */
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},
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{ OP65_CLD, /* opcode */
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"cld", /* mnemonic */
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1, /* size */
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OF_NONE, /* flags */
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REG_NONE, /* use */
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PSTATE_D /* chg */
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},
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{ OP65_CLI, /* opcode */
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"cli", /* mnemonic */
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1, /* size */
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OF_NONE, /* flags */
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REG_NONE, /* use */
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PSTATE_I /* chg */
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},
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{ OP65_CLV, /* opcode */
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"clv", /* mnemonic */
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1, /* size */
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OF_NONE, /* flags */
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REG_NONE, /* use */
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PSTATE_V /* chg */
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},
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{ OP65_CMP, /* opcode */
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"cmp", /* mnemonic */
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0, /* size */
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OF_SETF | OF_CMP | OF_READ, /* flags */
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REG_A, /* use */
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PSTATE_CZN /* chg */
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},
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{ OP65_CPX, /* opcode */
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"cpx", /* mnemonic */
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0, /* size */
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OF_SETF | OF_CMP | OF_READ, /* flags */
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REG_X, /* use */
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PSTATE_CZN /* chg */
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},
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{ OP65_CPY, /* opcode */
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"cpy", /* mnemonic */
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0, /* size */
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OF_SETF | OF_CMP | OF_READ, /* flags */
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REG_Y, /* use */
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PSTATE_CZN /* chg */
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},
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{ OP65_DEA, /* opcode */
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"dea", /* mnemonic */
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1, /* size */
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OF_REG_INCDEC | OF_SETF, /* flags */
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REG_A, /* use */
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REG_A | PSTATE_ZN /* chg */
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},
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{ OP65_DEC, /* opcode */
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"dec", /* mnemonic */
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0, /* size */
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OF_SETF | OF_NOIMP | OF_RMW, /* flags */
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REG_NONE, /* use */
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PSTATE_ZN /* chg */
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},
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{ OP65_DEX, /* opcode */
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"dex", /* mnemonic */
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1, /* size */
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OF_REG_INCDEC | OF_SETF, /* flags */
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REG_X, /* use */
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REG_X | PSTATE_ZN /* chg */
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},
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{ OP65_DEY, /* opcode */
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"dey", /* mnemonic */
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1, /* size */
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OF_REG_INCDEC | OF_SETF, /* flags */
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REG_Y, /* use */
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REG_Y | PSTATE_ZN /* chg */
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},
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{ OP65_EOR, /* opcode */
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"eor", /* mnemonic */
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0, /* size */
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OF_SETF | OF_READ, /* flags */
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REG_A, /* use */
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REG_A | PSTATE_ZN /* chg */
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},
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{ OP65_INA, /* opcode */
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"ina", /* mnemonic */
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1, /* size */
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OF_REG_INCDEC | OF_SETF, /* flags */
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REG_A, /* use */
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REG_A | PSTATE_ZN /* chg */
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},
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{ OP65_INC, /* opcode */
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"inc", /* mnemonic */
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0, /* size */
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OF_SETF | OF_NOIMP | OF_RMW, /* flags */
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REG_NONE, /* use */
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PSTATE_ZN /* chg */
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},
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{ OP65_INX, /* opcode */
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"inx", /* mnemonic */
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1, /* size */
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OF_REG_INCDEC | OF_SETF, /* flags */
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REG_X, /* use */
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REG_X | PSTATE_ZN /* chg */
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},
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{ OP65_INY, /* opcode */
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"iny", /* mnemonic */
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1, /* size */
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OF_REG_INCDEC | OF_SETF, /* flags */
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REG_Y, /* use */
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REG_Y | PSTATE_ZN /* chg */
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},
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{ OP65_JCC, /* opcode */
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"jcc", /* mnemonic */
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5, /* size */
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OF_CBRA | OF_LBRA, /* flags */
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PSTATE_C, /* use */
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REG_NONE /* chg */
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},
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{ OP65_JCS, /* opcode */
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"jcs", /* mnemonic */
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5, /* size */
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OF_CBRA | OF_LBRA, /* flags */
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PSTATE_C, /* use */
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REG_NONE /* chg */
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},
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{ OP65_JEQ, /* opcode */
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"jeq", /* mnemonic */
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5, /* size */
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OF_CBRA | OF_LBRA | OF_ZBRA | OF_FBRA, /* flags */
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PSTATE_Z, /* use */
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REG_NONE /* chg */
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},
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{ OP65_JMI, /* opcode */
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"jmi", /* mnemonic */
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5, /* size */
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OF_CBRA | OF_LBRA | OF_FBRA, /* flags */
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PSTATE_N, /* use */
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REG_NONE /* chg */
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},
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{ OP65_JMP, /* opcode */
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"jmp", /* mnemonic */
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3, /* size */
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OF_UBRA | OF_LBRA | OF_READ, /* flags */
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REG_NONE, /* use */
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REG_NONE /* chg */
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},
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{ OP65_JNE, /* opcode */
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"jne", /* mnemonic */
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5, /* size */
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OF_CBRA | OF_LBRA | OF_ZBRA | OF_FBRA, /* flags */
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PSTATE_Z, /* use */
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REG_NONE /* chg */
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},
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{ OP65_JPL, /* opcode */
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"jpl", /* mnemonic */
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5, /* size */
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OF_CBRA | OF_LBRA | OF_FBRA, /* flags */
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PSTATE_N, /* use */
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REG_NONE /* chg */
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},
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{ OP65_JSR, /* opcode */
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"jsr", /* mnemonic */
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3, /* size */
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OF_CALL | OF_READ, /* flags */
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REG_NONE, /* use */
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REG_NONE /* chg */
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},
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{ OP65_JVC, /* opcode */
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"jvc", /* mnemonic */
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5, /* size */
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OF_CBRA | OF_LBRA, /* flags */
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PSTATE_V, /* use */
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REG_NONE /* chg */
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},
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{ OP65_JVS, /* opcode */
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"jvs", /* mnemonic */
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5, /* size */
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OF_CBRA | OF_LBRA, /* flags */
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PSTATE_V, /* use */
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REG_NONE /* chg */
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},
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{ OP65_LDA, /* opcode */
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"lda", /* mnemonic */
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0, /* size */
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OF_LOAD | OF_SETF | OF_READ, /* flags */
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REG_NONE, /* use */
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REG_A | PSTATE_ZN /* chg */
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},
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{ OP65_LDX, /* opcode */
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"ldx", /* mnemonic */
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0, /* size */
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OF_LOAD | OF_SETF | OF_READ, /* flags */
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REG_NONE, /* use */
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REG_X | PSTATE_ZN /* chg */
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},
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{ OP65_LDY, /* opcode */
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"ldy", /* mnemonic */
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0, /* size */
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OF_LOAD | OF_SETF | OF_READ, /* flags */
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REG_NONE, /* use */
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REG_Y | PSTATE_ZN /* chg */
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},
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{ OP65_LSR, /* opcode */
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"lsr", /* mnemonic */
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0, /* size */
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OF_SETF | OF_NOIMP | OF_RMW, /* flags */
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REG_NONE, /* use */
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PSTATE_CZN /* chg */
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},
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{ OP65_NOP, /* opcode */
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"nop", /* mnemonic */
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1, /* size */
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OF_NONE, /* flags */
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REG_NONE, /* use */
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REG_NONE /* chg */
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},
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{ OP65_ORA, /* opcode */
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"ora", /* mnemonic */
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0, /* size */
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OF_SETF | OF_READ, /* flags */
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REG_A, /* use */
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REG_A | PSTATE_ZN /* chg */
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},
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{ OP65_PHA, /* opcode */
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"pha", /* mnemonic */
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1, /* size */
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OF_NONE, /* flags */
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REG_A, /* use */
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REG_NONE /* chg */
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},
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{ OP65_PHP, /* opcode */
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"php", /* mnemonic */
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1, /* size */
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OF_NONE, /* flags */
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PSTATE_ALL, /* use */
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REG_NONE /* chg */
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},
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{ OP65_PHX, /* opcode */
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"phx", /* mnemonic */
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1, /* size */
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OF_NONE, /* flags */
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REG_X, /* use */
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REG_NONE /* chg */
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},
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{ OP65_PHY, /* opcode */
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"phy", /* mnemonic */
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1, /* size */
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OF_NONE, /* flags */
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REG_Y, /* use */
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REG_NONE /* chg */
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},
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{ OP65_PLA, /* opcode */
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"pla", /* mnemonic */
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1, /* size */
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OF_SETF, /* flags */
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REG_NONE, /* use */
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REG_A | PSTATE_ZN /* chg */
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},
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{ OP65_PLP, /* opcode */
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"plp", /* mnemonic */
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1, /* size */
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OF_NONE, /* flags */
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REG_NONE, /* use */
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PSTATE_ALL /* chg */
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},
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{ OP65_PLX, /* opcode */
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"plx", /* mnemonic */
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1, /* size */
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OF_SETF, /* flags */
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REG_NONE, /* use */
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REG_X | PSTATE_ZN /* chg */
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},
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{ OP65_PLY, /* opcode */
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"ply", /* mnemonic */
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1, /* size */
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OF_SETF, /* flags */
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REG_NONE, /* use */
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REG_Y | PSTATE_ZN /* chg */
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},
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{ OP65_ROL, /* opcode */
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"rol", /* mnemonic */
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0, /* size */
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OF_SETF | OF_NOIMP | OF_RMW, /* flags */
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PSTATE_C, /* use */
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PSTATE_CZN /* chg */
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},
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{ OP65_ROR, /* opcode */
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"ror", /* mnemonic */
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0, /* size */
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OF_SETF | OF_NOIMP | OF_RMW, /* flags */
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PSTATE_C, /* use */
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PSTATE_CZN /* chg */
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},
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|
/* Mark RTI as "uses all registers but doesn't change them", so the
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** optimizer won't remove preceeding loads.
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*/
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{ OP65_RTI, /* opcode */
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|
"rti", /* mnemonic */
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|
1, /* size */
|
|
OF_RET, /* flags */
|
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REG_AXY, /* use */
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PSTATE_ALL /* chg */
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},
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|
{ OP65_RTS, /* opcode */
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|
"rts", /* mnemonic */
|
|
1, /* size */
|
|
OF_RET, /* flags */
|
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REG_NONE, /* use */
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|
REG_NONE /* chg */
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},
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|
{ OP65_SBC, /* opcode */
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|
"sbc", /* mnemonic */
|
|
0, /* size */
|
|
OF_SETF | OF_READ, /* flags */
|
|
REG_A | PSTATE_C, /* use */
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|
REG_A | PSTATE_CZVN /* chg */
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},
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|
{ OP65_SEC, /* opcode */
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|
"sec", /* mnemonic */
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|
1, /* size */
|
|
OF_NONE, /* flags */
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|
REG_NONE, /* use */
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|
PSTATE_C /* chg */
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},
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|
{ OP65_SED, /* opcode */
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|
"sed", /* mnemonic */
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|
1, /* size */
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OF_NONE, /* flags */
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REG_NONE, /* use */
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PSTATE_D /* chg */
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},
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|
{ OP65_SEI, /* opcode */
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|
"sei", /* mnemonic */
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|
1, /* size */
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OF_NONE, /* flags */
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REG_NONE, /* use */
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PSTATE_I /* chg */
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},
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{ OP65_STA, /* opcode */
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|
"sta", /* mnemonic */
|
|
0, /* size */
|
|
OF_STORE | OF_WRITE, /* flags */
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REG_A, /* use */
|
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REG_NONE /* chg */
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},
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{ OP65_STP, /* opcode */
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|
"stp", /* mnemonic */
|
|
1, /* size */
|
|
OF_NONE, /* flags */
|
|
REG_NONE, /* use */
|
|
REG_NONE /* chg */
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},
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|
{ OP65_STX, /* opcode */
|
|
"stx", /* mnemonic */
|
|
0, /* size */
|
|
OF_STORE | OF_WRITE, /* flags */
|
|
REG_X, /* use */
|
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REG_NONE /* chg */
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},
|
|
{ OP65_STY, /* opcode */
|
|
"sty", /* mnemonic */
|
|
0, /* size */
|
|
OF_STORE | OF_WRITE, /* flags */
|
|
REG_Y, /* use */
|
|
REG_NONE /* chg */
|
|
},
|
|
{ OP65_STZ, /* opcode */
|
|
"stz", /* mnemonic */
|
|
0, /* size */
|
|
OF_STORE | OF_WRITE, /* flags */
|
|
REG_NONE, /* use */
|
|
REG_NONE /* chg */
|
|
},
|
|
{ OP65_TAX, /* opcode */
|
|
"tax", /* mnemonic */
|
|
1, /* size */
|
|
OF_XFR | OF_SETF, /* flags */
|
|
REG_A, /* use */
|
|
REG_X | PSTATE_ZN /* chg */
|
|
},
|
|
{ OP65_TAY, /* opcode */
|
|
"tay", /* mnemonic */
|
|
1, /* size */
|
|
OF_XFR | OF_SETF, /* flags */
|
|
REG_A, /* use */
|
|
REG_Y | PSTATE_ZN /* chg */
|
|
},
|
|
{ OP65_TRB, /* opcode */
|
|
"trb", /* mnemonic */
|
|
0, /* size */
|
|
OF_RMW, /* flags */
|
|
REG_A, /* use */
|
|
PSTATE_Z /* chg */
|
|
},
|
|
{ OP65_TSB, /* opcode */
|
|
"tsb", /* mnemonic */
|
|
0, /* size */
|
|
OF_RMW, /* flags */
|
|
REG_A, /* use */
|
|
PSTATE_Z /* chg */
|
|
},
|
|
{ OP65_TSX, /* opcode */
|
|
"tsx", /* mnemonic */
|
|
1, /* size */
|
|
OF_XFR | OF_SETF, /* flags */
|
|
REG_NONE, /* use */
|
|
REG_X | PSTATE_ZN /* chg */
|
|
},
|
|
{ OP65_TXA, /* opcode */
|
|
"txa", /* mnemonic */
|
|
1, /* size */
|
|
OF_XFR | OF_SETF, /* flags */
|
|
REG_X, /* use */
|
|
REG_A | PSTATE_ZN /* chg */
|
|
},
|
|
{ OP65_TXS, /* opcode */
|
|
"txs", /* mnemonic */
|
|
1, /* size */
|
|
OF_XFR, /* flags */
|
|
REG_X, /* use */
|
|
REG_NONE /* chg */
|
|
},
|
|
{ OP65_TYA, /* opcode */
|
|
"tya", /* mnemonic */
|
|
1, /* size */
|
|
OF_XFR | OF_SETF, /* flags */
|
|
REG_Y, /* use */
|
|
REG_A | PSTATE_ZN /* chg */
|
|
},
|
|
};
|
|
|
|
|
|
|
|
/*****************************************************************************/
|
|
/* Code */
|
|
/*****************************************************************************/
|
|
|
|
|
|
|
|
static int FindCmp (const void* Key, const void* Desc)
|
|
/* Compare function for FindOpcode */
|
|
{
|
|
return strcmp (Key, ((OPCDesc*)Desc)->Mnemo);
|
|
}
|
|
|
|
|
|
|
|
const OPCDesc* FindOP65 (const char* M)
|
|
/* Find the given opcode and return the opcode number. If the opcode was not
|
|
** found, return NULL.
|
|
*/
|
|
{
|
|
unsigned I;
|
|
unsigned Len;
|
|
|
|
/* Check the length of the given string, then copy it into local
|
|
** storage, converting it to upper case.
|
|
*/
|
|
char Mnemo[sizeof (OPCTable[0].Mnemo)];
|
|
Len = strlen (M);
|
|
if (Len >= sizeof (OPCTable[0].Mnemo)) {
|
|
/* Invalid length means invalid opcode */
|
|
return 0;
|
|
}
|
|
for (I = 0; I < Len; ++I) {
|
|
Mnemo[I] = tolower (M[I]);
|
|
}
|
|
Mnemo[I] = '\0';
|
|
|
|
/* Search for the mnemonic in the table and return the result */
|
|
return bsearch (Mnemo, OPCTable, OP65_COUNT,
|
|
sizeof (OPCTable[0]), FindCmp );
|
|
}
|
|
|
|
|
|
|
|
unsigned GetInsnSize (opc_t OPC, am_t AM)
|
|
/* Return the size of the given instruction */
|
|
{
|
|
/* Get the opcode desc and check the size given there */
|
|
const OPCDesc* D = &OPCTable[OPC];
|
|
if (D->Size != 0) {
|
|
return D->Size;
|
|
}
|
|
|
|
/* Check the addressing mode. */
|
|
switch (AM) {
|
|
case AM65_IMP: return 1;
|
|
case AM65_ACC: return 1;
|
|
case AM65_IMM: return 2;
|
|
case AM65_ZP: return 2;
|
|
case AM65_ZPX: return 2;
|
|
case AM65_ZPY: return 2;
|
|
case AM65_ABS: return 3;
|
|
case AM65_ABSX: return 3;
|
|
case AM65_ABSY: return 3;
|
|
case AM65_ZPX_IND: return 2;
|
|
case AM65_ZP_INDY: return 2;
|
|
case AM65_ZP_IND: return 2;
|
|
default:
|
|
Internal ("Invalid addressing mode");
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
|
|
|
|
unsigned char GetAMUseInfo (am_t AM)
|
|
/* Get usage info for the given addressing mode (addressing modes that use
|
|
** index registers return REG_r info for these registers).
|
|
*/
|
|
{
|
|
/* Check the addressing mode. */
|
|
switch (AM) {
|
|
case AM65_ACC: return REG_A;
|
|
case AM65_ZPX: return REG_X;
|
|
case AM65_ABSX: return REG_X;
|
|
case AM65_ABSY: return REG_Y;
|
|
case AM65_ZPX_IND: return REG_X;
|
|
case AM65_ZP_INDY: return REG_Y;
|
|
default: return REG_NONE;
|
|
}
|
|
}
|
|
|
|
|
|
|
|
opc_t GetInverseBranch (opc_t OPC)
|
|
/* Return a branch that reverse the condition of the branch given in OPC */
|
|
{
|
|
switch (OPC) {
|
|
case OP65_BCC: return OP65_BCS;
|
|
case OP65_BCS: return OP65_BCC;
|
|
case OP65_BEQ: return OP65_BNE;
|
|
case OP65_BMI: return OP65_BPL;
|
|
case OP65_BNE: return OP65_BEQ;
|
|
case OP65_BPL: return OP65_BMI;
|
|
case OP65_BVC: return OP65_BVS;
|
|
case OP65_BVS: return OP65_BVC;
|
|
case OP65_JCC: return OP65_JCS;
|
|
case OP65_JCS: return OP65_JCC;
|
|
case OP65_JEQ: return OP65_JNE;
|
|
case OP65_JMI: return OP65_JPL;
|
|
case OP65_JNE: return OP65_JEQ;
|
|
case OP65_JPL: return OP65_JMI;
|
|
case OP65_JVC: return OP65_JVS;
|
|
case OP65_JVS: return OP65_JVC;
|
|
default:
|
|
Internal ("GetInverseBranch: Invalid opcode: %d", OPC);
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
|
|
|
|
opc_t MakeShortBranch (opc_t OPC)
|
|
/* Return the short version of the given branch. If the branch is already
|
|
** a short branch, return the opcode unchanged.
|
|
*/
|
|
{
|
|
switch (OPC) {
|
|
case OP65_BCC:
|
|
case OP65_JCC: return OP65_BCC;
|
|
case OP65_BCS:
|
|
case OP65_JCS: return OP65_BCS;
|
|
case OP65_BEQ:
|
|
case OP65_JEQ: return OP65_BEQ;
|
|
case OP65_BMI:
|
|
case OP65_JMI: return OP65_BMI;
|
|
case OP65_BNE:
|
|
case OP65_JNE: return OP65_BNE;
|
|
case OP65_BPL:
|
|
case OP65_JPL: return OP65_BPL;
|
|
case OP65_BVC:
|
|
case OP65_JVC: return OP65_BVC;
|
|
case OP65_BVS:
|
|
case OP65_JVS: return OP65_BVS;
|
|
case OP65_BRA:
|
|
case OP65_JMP: return (CPUIsets[CPU] & (CPU_ISET_65SC02 | CPU_ISET_6502DTV)) ? OP65_BRA : OP65_JMP;
|
|
default:
|
|
Internal ("MakeShortBranch: Invalid opcode: %d", OPC);
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
|
|
|
|
opc_t MakeLongBranch (opc_t OPC)
|
|
/* Return the long version of the given branch. If the branch is already
|
|
** a long branch, return the opcode unchanged.
|
|
*/
|
|
{
|
|
switch (OPC) {
|
|
case OP65_BCC:
|
|
case OP65_JCC: return OP65_JCC;
|
|
case OP65_BCS:
|
|
case OP65_JCS: return OP65_JCS;
|
|
case OP65_BEQ:
|
|
case OP65_JEQ: return OP65_JEQ;
|
|
case OP65_BMI:
|
|
case OP65_JMI: return OP65_JMI;
|
|
case OP65_BNE:
|
|
case OP65_JNE: return OP65_JNE;
|
|
case OP65_BPL:
|
|
case OP65_JPL: return OP65_JPL;
|
|
case OP65_BVC:
|
|
case OP65_JVC: return OP65_JVC;
|
|
case OP65_BVS:
|
|
case OP65_JVS: return OP65_JVS;
|
|
case OP65_BRA:
|
|
case OP65_JMP: return OP65_JMP;
|
|
default:
|
|
Internal ("MakeLongBranch: Invalid opcode: %d", OPC);
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
|
|
|
|
bc_t GetBranchCond (opc_t OPC)
|
|
/* Get the condition for the conditional branch in OPC */
|
|
{
|
|
switch (OPC) {
|
|
case OP65_BCC: return BC_CC;
|
|
case OP65_BCS: return BC_CS;
|
|
case OP65_BEQ: return BC_EQ;
|
|
case OP65_BMI: return BC_MI;
|
|
case OP65_BNE: return BC_NE;
|
|
case OP65_BPL: return BC_PL;
|
|
case OP65_BVC: return BC_VC;
|
|
case OP65_BVS: return BC_VS;
|
|
case OP65_JCC: return BC_CC;
|
|
case OP65_JCS: return BC_CS;
|
|
case OP65_JEQ: return BC_EQ;
|
|
case OP65_JMI: return BC_MI;
|
|
case OP65_JNE: return BC_NE;
|
|
case OP65_JPL: return BC_PL;
|
|
case OP65_JVC: return BC_VC;
|
|
case OP65_JVS: return BC_VS;
|
|
default:
|
|
Internal ("GetBranchCond: Invalid opcode: %d", OPC);
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
|
|
|
|
bc_t GetInverseCond (bc_t BC)
|
|
/* Return the inverse condition of the given one */
|
|
{
|
|
switch (BC) {
|
|
case BC_CC: return BC_CS;
|
|
case BC_CS: return BC_CC;
|
|
case BC_EQ: return BC_NE;
|
|
case BC_MI: return BC_PL;
|
|
case BC_NE: return BC_EQ;
|
|
case BC_PL: return BC_MI;
|
|
case BC_VC: return BC_VS;
|
|
case BC_VS: return BC_VC;
|
|
default:
|
|
Internal ("GetInverseCond: Invalid condition: %d", BC);
|
|
return 0;
|
|
}
|
|
}
|