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30 lines
1.0 KiB
Plaintext
30 lines
1.0 KiB
Plaintext
Opcode Tests:
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-------------
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These testcases are inspired by the ones now removed from test/assembler.
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The main purpose is to have each possible opcode generated at least once,
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either by an Assembly instruction or a ".byte"-placeholder. Typically
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generated by disassembling a binary dump that contains data in the form
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of the pattern that each opcode is stated once in order followed by easy
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to recognise:
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00 00 EA 00
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01 00 EA 00
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02 00 EA 00
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[...]
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fe 00 EA 00
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ff 00 EA 00
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The disassembly is then put in a better readable form by replacing the
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leftover dummy opcode parameters with something more recognizable.
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The testcases for 6502, 6502x, 65sc02, 65c02, 4510, and huc6280 have been
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put together by Sven Oliver ("SvOlli") Moll, as well as a template for the
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m740 instructions set. Later 6502dtv support was also added.
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Still to do is to find a way to implement an opcode testcase for the 65816
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processor, since it's capable of executing instructions with an 8-bit and
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a 16-bit operator alike, distinguished by only one processor flag.
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