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mirror of https://github.com/cc65/cc65.git synced 2024-06-26 05:29:30 +00:00
cc65/src/ld65/cfg/apple2enh.cfg
uz 7b34609930 Have the callirq module export __CALLIRQ__ and changed all config files so
this symbol is a forced import for all interruptors.


git-svn-id: svn://svn.cc65.org/cc65/trunk@5902 b7a2c559-68d2-44c3-8de9-860c34a00d81
2012-11-03 21:59:15 +00:00

51 lines
2.1 KiB
INI

# Default configuration built into ld65 (allowing for 3KB in LC)
FEATURES {
STARTADDRESS: default = $0803;
}
SYMBOLS {
__EXEHDR__: type = import;
__HIMEM__: type = weak, value = $9600; # Presumed RAM end
__LCADDR__: type = weak, value = $D400; # Behind quit code
__LCSIZE__: type = weak, value = $0C00; # Rest of bank two
__STACKSIZE__: type = weak, value = $0800; # 2k stack
__LOADADDR__: type = weak, value = __STARTUP_RUN__;
__LOADSIZE__: type = weak, value = __ZPSAVE_RUN__ - __STARTUP_RUN__ +
__MOVE_LAST__ - __MOVE_START__;
}
MEMORY {
ZP: define = yes, start = $0080, size = $001A;
HEADER: file = %O, start = $0000, size = $0004;
RAM: file = %O, start = %S, size = __HIMEM__ - __STACKSIZE__ - %S;
MOVE: file = %O, define = yes, start = $0000, size = $FFFF;
LC: define = yes, start = __LCADDR__, size = __LCSIZE__;
}
SEGMENTS {
ZEROPAGE: load = ZP, type = zp;
EXEHDR: load = HEADER, type = ro;
STARTUP: load = RAM, type = ro, define = yes;
LOWCODE: load = RAM, type = ro;
CODE: load = RAM, type = ro;
RODATA: load = RAM, type = ro;
DATA: load = RAM, type = rw;
ZPSAVE: load = RAM, type = bss, define = yes;
BSS: load = RAM, type = bss, define = yes;
INIT: load = MOVE, run = RAM, type = ro, define = yes;
LC: load = MOVE, run = LC, type = ro, optional = yes;
}
FEATURES {
CONDES: segment = INIT,
type = constructor,
label = __CONSTRUCTOR_TABLE__,
count = __CONSTRUCTOR_COUNT__;
CONDES: segment = RODATA,
type = destructor,
label = __DESTRUCTOR_TABLE__,
count = __DESTRUCTOR_COUNT__;
CONDES: segment = RODATA,
type = interruptor,
label = __INTERRUPTOR_TABLE__,
count = __INTERRUPTOR_COUNT__,
import = __CALLIRQ__;
}