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70 lines
1.9 KiB
ArmAsm
70 lines
1.9 KiB
ArmAsm
;
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; Marco van den Heuvel, 2018-04-27
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;
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; unsigned char __fastcall__ set_c65_speed (unsigned char speed);
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;
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;/* Set the speed of the C65 CPU, using SPEED_SLOW will switch to
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; * 1 Mhz mode, SPEED_3X or SPEED_FAST will switch to 3.5 Mhz (fast) mode.
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; *
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; * Note that any value higher or equal to SPEED_3X will switch to fast mode.
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; *
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; * This function will return the actual speed the CPU is at after trying
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; * to set the requested speed, to my knowledge the switching should not fail.
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; *
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; * This function does not check for the presence of a C65/C64DX in C64 mode,
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; * make sure you use 'detect_c65();' before using.
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; */
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; unsigned char get_c65_speed (void);
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;
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;/* Get the speed of the C65 CPU.
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; *
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; * Possible return values:
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; * SPEED_SLOW : 1 Mhz mode
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; * SPEED_3X : 3.5 Mhz mode
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; *
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; * This function does not check for the presence of a C65/C64DX in C64 mode,
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; * make sure you use 'detect_c65();' before using.
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; */
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.export _set_c65_speed
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.export _get_c65_speed
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.include "accelerator.inc"
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_set_c65_speed:
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tay
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jsr activate_new_vic_mode
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cpy #SPEED_3X
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bcs high_speed
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low_speed:
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and #$BF
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store_speed:
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sta C65_VICIII_CTRL_B
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lda C65_VICIII_CTRL_B
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jmp return_c65_speed
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high_speed:
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ora #$40
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bne store_speed
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_get_c65_speed:
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jsr activate_new_vic_mode
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return_c65_speed:
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sta C65_VICIII_KEY
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and #$40
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beq speed_is_slow ; when this branch is taken then register A is already set to SPEED_SLOW
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lda #SPEED_3X
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speed_is_slow:
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ldx #$00
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rts
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activate_new_vic_mode:
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lda #C65_VICIII_UNLOCK_1
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sta C65_VICIII_KEY
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lda #C65_VICIII_UNLOCK_2
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sta C65_VICIII_KEY
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lda C65_VICIII_CTRL_B
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rts
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