mirror of
https://github.com/cc65/cc65.git
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6d498d8187
to emulate these functions on platforms where one or more of these functions are not available (PET, CBM-II). git-svn-id: svn://svn.cc65.org/cc65/trunk@1544 b7a2c559-68d2-44c3-8de9-860c34a00d81
222 lines
5.2 KiB
ArmAsm
222 lines
5.2 KiB
ArmAsm
;
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; Startup code for cc65 (C128 version)
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;
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; This must be the *first* file on the linker command line
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;
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.export _exit
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.export BRKStub, BRKOld, BRKInd
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.import condes, initlib, donelib
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.import initconio, doneconio, zerobss
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.import push0, _main
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.import RESTOR, BSOUT, CLRCH
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.import __IRQFUNC_TABLE__, __IRQFUNC_COUNT__
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.import __RAM_START__, __RAM_SIZE__
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.include "zeropage.inc"
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.include "c128.inc"
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; ------------------------------------------------------------------------
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; Constants
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IRQInd = $2FD ; JMP $0000 - used as indirect IRQ vector
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; ------------------------------------------------------------------------
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; Place the startup code in a special segment to cope with the quirks of
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; c128 banking. Do also create an empty segment named "NMI" to avoid
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; warnings if the rs232 routines are not used.
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.segment "NMI"
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; empty
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.segment "STARTUP"
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; ------------------------------------------------------------------------
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; BASIC header with a SYS call
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.org $1BFF
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.word Head ; Load address
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Head: .word @Next
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.word 1000 ; Line number
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.byte $9E,"7181" ; SYS 7181
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.byte $00 ; End of BASIC line
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@Next: .word 0 ; BASIC end marker
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.reloc
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; ------------------------------------------------------------------------
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; Actual code
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; Close open files
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jsr CLRCH
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; Switch to the second charset
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lda #14
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jsr BSOUT
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; Set the bank for the file name our execution bank
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lda #0
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sta FNAM_BANK
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; Before doing anything else, we have to setup our banking configuration.
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; Otherwise just the lowest 16K are actually RAM. Writing through the ROM
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; to the underlying RAM works, but it is bad style.
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lda MMU_CR ; Get current memory configuration...
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pha ; ...and save it for later
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lda #CC65_MMU_CFG ; Bank0 with kernal ROM
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sta MMU_CR
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; Save the zero page locations we need
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ldx #zpspace-1
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L1: lda sp,x
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sta zpsave,x
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dex
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bpl L1
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; Clear the BSS data
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jsr zerobss
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; Save system stuff and setup the stack
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pla ; Get MMU setting
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sta mmusave
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tsx
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stx spsave ; Save the system stack pointer
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lda #<(__RAM_START__ + __RAM_SIZE__)
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sta sp
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lda #>(__RAM_START__ + __RAM_SIZE__)
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sta sp+1 ; Set argument stack ptr
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; Call module constructors
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jsr initlib
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; Initialize conio stuff
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jsr initconio
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; If we have IRQ functions, chain our stub into the IRQ vector
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lda #<__IRQFUNC_COUNT__
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beq NoIRQ1
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lda IRQVec
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ldx IRQVec+1
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sta IRQInd+1
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stx IRQInd+2
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lda #<IRQStub
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ldx #>IRQStub
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sei
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sta IRQVec
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stx IRQVec+1
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cli
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; Pass an empty command line
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NoIRQ1: jsr push0 ; argc
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jsr push0 ; argv
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ldy #4 ; Argument size
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jsr _main ; call the users code
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; This is also the _exit entry. Reset the IRQ vector if we chained it.
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_exit: lda #<__IRQFUNC_COUNT__
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beq NoIRQ2
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lda IRQInd+1
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ldx IRQInd+2
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sei
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sta IRQVec
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stx IRQVec+1
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cli
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; Run module destructors
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NoIRQ2: jsr donelib
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; Reset the conio stuff
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jsr doneconio
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; Reset the stack
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ldx spsave
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txs
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; Copy back the zero page stuff
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ldx #zpspace-1
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L2: lda zpsave,x
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sta sp,x
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dex
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bpl L2
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; Reset the memory configuration
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lda mmusave
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sta MMU_CR
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; Done, restore kernal vectors in an attempt to cleanup
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jmp RESTOR
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; ------------------------------------------------------------------------
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; The C128 has ROM parallel to the RAM starting from $4000. The startup code
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; above will change this setting so that we have RAM from $0000-$BFFF. This
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; works quite well with the exception of interrupts: The interrupt handler
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; is in ROM, and the ROM switches back to the ROM configuration, which means
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; that parts of our program may not be accessible. Since the crt0 module is
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; the first module in the program, it will always be below $4000 and always
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; in RAM. So we place several short stubs here that switch back our ROM
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; config before calling our user defined handlers. These stubs are only
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; used if any other code uses the interrupt or break vectors. They are dead
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; code otherwise, but since there is no other way to keep them in low memory,
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; they have to go here.
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IRQStub:
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cld ; Just to be sure
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lda MMU_CR ; Get old register value
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pha ; And save on stack
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lda #CC65_MMU_CFG ; Bank 0 with kernal ROM
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sta MMU_CR
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ldy #<(__IRQFUNC_COUNT__*2)
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lda #<__IRQFUNC_TABLE__
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ldx #>__IRQFUNC_TABLE__
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jsr condes ; Call the functions
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pla ; Get old register value
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sta MMU_CR
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jmp IRQInd ; Jump to the save IRQ vector
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BRKStub:
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pla ; Get original MMU_CR value
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sta MMU_CR ; And set it
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jmp BRKInd ; Jump indirect to break
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; ------------------------------------------------------------------------
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; Data
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.data
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zpsave: .res zpspace
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; Old break vector preceeded by a jump opcode
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BRKOld: jmp $0000
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; Indirect vectors preceeded by a jump opcode
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BRKInd: jmp $0000
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.bss
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spsave: .res 1
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mmusave:.res 1
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