1
0
mirror of https://github.com/cc65/cc65.git synced 2024-12-23 19:29:37 +00:00
cc65/libsrc/dbg/dbgisram.s
uz 53dd513176 This commit was generated by cvs2svn to compensate for changes in r2,
which included commits to RCS files with non-trunk default branches.


git-svn-id: svn://svn.cc65.org/cc65/trunk@3 b7a2c559-68d2-44c3-8de9-860c34a00d81
2000-05-28 13:40:48 +00:00

56 lines
792 B
ArmAsm

;
; Ullrich von Bassewitz, 10.08.1998
;
; int DbgIsRAM (unsigned Addr);
;
.export _DbgIsRAM
.import popax, return0, return1
.importzp ptr1
_DbgIsRAM:
sta ptr1 ; Store the address
stx ptr1+1
ldy #0
php ; Save I flag
sei ; Disable interrupts
lda (ptr1),y ; Get old value
pha ; ...and save it
ldx #3
L1: lda TestVal,x
jsr CheckCell
bne L2
dex
bpl L1
; This seems to be RAM
pla
sta (ptr1),y ; Restore old value
plp ; Restore old I flag
jmp return1
; No RAM at this address
L2: pla
sta (ptr1),y ; Restore old value
plp ; Restore old I flag
jmp return0
; Check one memory cell
CheckCell:
sta (ptr1),y
cmp (ptr1),y ; Could we write it?
rts
.rodata
TestVal:
.byte $55, $AA, $33, $CC