mirror of
https://github.com/cc65/cc65.git
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7e2a24176f
git-svn-id: svn://svn.cc65.org/cc65/trunk@4513 b7a2c559-68d2-44c3-8de9-860c34a00d81
192 lines
4.6 KiB
ArmAsm
192 lines
4.6 KiB
ArmAsm
;
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; Startup code for cc65 (C128 version)
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;
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.export _exit
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.export __STARTUP__ : absolute = 1 ; Mark as startup
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.import callirq, initlib, donelib
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.import zerobss
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.import push0, callmain
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.import RESTOR, BSOUT, CLRCH
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.import __INTERRUPTOR_COUNT__
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.import __RAM_START__, __RAM_SIZE__
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.include "zeropage.inc"
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.include "c128.inc"
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; ------------------------------------------------------------------------
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; Constants
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IRQInd = $2FD ; JMP $0000 - used as indirect IRQ vector
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; ------------------------------------------------------------------------
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; BASIC header with a SYS call
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.segment "EXEHDR"
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.word Head ; Load address
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Head: .word @Next
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.word .version ; Line number
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.byte $9E ; SYS token
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.byte <(((Start / 1000) .mod 10) + '0')
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.byte <(((Start / 100) .mod 10) + '0')
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.byte <(((Start / 10) .mod 10) + '0')
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.byte <(((Start / 1) .mod 10) + '0')
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.byte $00 ; End of BASIC line
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@Next: .word 0 ; BASIC end marker
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; ------------------------------------------------------------------------
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; Startup code
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.segment "STARTUP"
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Start:
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; Switch to the second charset
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lda #14
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jsr BSOUT
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; Before doing anything else, we have to setup our banking configuration.
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; Otherwise just the lowest 16K are actually RAM. Writing through the ROM
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; to the underlying RAM works, but it is bad style.
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lda MMU_CR ; Get current memory configuration...
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pha ; ...and save it for later
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lda #MMU_CFG_CC65 ; Bank0 with kernal ROM
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sta MMU_CR
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; Save the zero page locations we need
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ldx #zpspace-1
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L1: lda sp,x
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sta zpsave,x
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dex
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bpl L1
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; Clear the BSS data
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jsr zerobss
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; Save system stuff and setup the stack
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pla ; Get MMU setting
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sta mmusave
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tsx
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stx spsave ; Save the system stack pointer
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lda #<(__RAM_START__ + __RAM_SIZE__)
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sta sp
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lda #>(__RAM_START__ + __RAM_SIZE__)
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sta sp+1 ; Set argument stack ptr
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; If we have IRQ functions, chain our stub into the IRQ vector
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lda #<__INTERRUPTOR_COUNT__
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beq NoIRQ1
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lda IRQVec
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ldx IRQVec+1
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sta IRQInd+1
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stx IRQInd+2
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lda #<IRQStub
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ldx #>IRQStub
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sei
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sta IRQVec
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stx IRQVec+1
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cli
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; Call module constructors
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NoIRQ1: jsr initlib
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; Set the bank for the file name to our execution bank. We must do this,
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; *after* calling constructors, because some of them may depend on the
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; original value of this register.
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lda #0
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sta FNAM_BANK
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; Push arguments and call main()
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jsr callmain
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; Back from main (this is also the _exit entry). Run module destructors
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_exit: jsr donelib
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; Reset the IRQ vector if we chained it.
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pha ; Save the return code on stack
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lda #<__INTERRUPTOR_COUNT__
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beq NoIRQ2
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lda IRQInd+1
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ldx IRQInd+2
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sei
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sta IRQVec
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stx IRQVec+1
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cli
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; Copy back the zero page stuff
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NoIRQ2: ldx #zpspace-1
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L2: lda zpsave,x
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sta sp,x
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dex
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bpl L2
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; Place the program return code into ST
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pla
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sta ST
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; Reset the stack and the memory configuration
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ldx spsave
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txs
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ldx mmusave
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stx MMU_CR
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; Done, restore kernal vectors in an attempt to cleanup
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jmp RESTOR
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; ------------------------------------------------------------------------
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; The C128 has ROM parallel to the RAM starting from $4000. The startup code
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; above will change this setting so that we have RAM from $0000-$BFFF. This
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; works quite well with the exception of interrupts: The interrupt handler
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; is in ROM, and the ROM switches back to the ROM configuration, which means
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; that parts of our program may not be accessible. To solve this, we place
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; the following code into a special segment called "LOWCODE" which will be
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; placed just above the startup code, so it goes into a RAM area that is
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; not banked.
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.segment "LOWCODE"
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IRQStub:
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cld ; Just to be sure
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lda MMU_CR ; Get old register value
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pha ; And save on stack
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lda #MMU_CFG_CC65 ; Bank 0 with kernal ROM
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sta MMU_CR
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jsr callirq ; Call the functions
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pla ; Get old register value
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sta MMU_CR
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jmp IRQInd ; Jump to the saved IRQ vector
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; ------------------------------------------------------------------------
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; Data
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.segment "ZPSAVE"
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zpsave: .res zpspace
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.bss
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spsave: .res 1
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mmusave:.res 1
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