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93a13315de
Cleaned up comments in Atari 8-bit headers. Internal keycodes (POKEY's KBCODE) were already #defined in atari.h, so didn't need a whole new set in _pokey.h.
221 lines
11 KiB
C
221 lines
11 KiB
C
/*****************************************************************************/
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/* */
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/* _pokey.h */
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/* */
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/* Internal include file, do not use directly */
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/* */
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/* POKEY, Pot Keyboard Integrated Circuit, is a digital I/O chip designed */
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/* for the Atari 8-bit family of home computers; it combines functions for */
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/* sampling (ADC) potentiometers (such as game paddles) and scan matrices of */
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/* switches (such as a computer keyboard) as well as sound generation. */
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/* It produces four voices of distinctive square wave sound, either as clear */
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/* tones or modified with a number of distortion settings. - Wikipedia */
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/* "POKEY" article. */
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/* */
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/* */
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/* (C) 2000 Freddy Offenga <taf_offenga@yahoo.com> */
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/* 2019-01-16: Bill Kendrick <nbs@sonic.net>: More defines for registers */
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/* */
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/* */
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/* This software is provided 'as-is', without any expressed or implied */
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/* warranty. In no event will the authors be held liable for any damages */
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/* arising from the use of this software. */
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/* */
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/* Permission is granted to anyone to use this software for any purpose, */
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/* including commercial applications, and to alter it and redistribute it */
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/* freely, subject to the following restrictions: */
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/* */
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/* 1. The origin of this software must not be misrepresented; you must not */
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/* claim that you wrote the original software. If you use this software */
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/* in a product, an acknowledgment in the product documentation would be */
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/* appreciated but is not required. */
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/* 2. Altered source versions must be plainly marked as such, and must not */
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/* be misrepresented as being the original software. */
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/* 3. This notice may not be removed or altered from any source */
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/* distribution. */
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/* */
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/*****************************************************************************/
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#ifndef __POKEY_H
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#define __POKEY_H
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/*****************************************************************************/
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/* Define a structure with the POKEY register offsets for write (W) */
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/*****************************************************************************/
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struct __pokey_write {
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unsigned char audf1; /* audio channel #1 frequency */
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unsigned char audc1; /* audio channel #1 control */
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unsigned char audf2; /* audio channel #2 frequency */
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unsigned char audc2; /* audio channel #2 control */
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unsigned char audf3; /* audio channel #3 frequency */
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unsigned char audc3; /* audio channel #3 control */
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unsigned char audf4; /* audio channel #4 frequency */
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unsigned char audc4; /* audio channel #4 control */
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unsigned char audctl; /* audio control */
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unsigned char stimer; /* start pokey timers */
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unsigned char skrest;
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/* reset serial port status reg.;
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** Reset BITs 5 - 7 of the serial port status register (SKCTL) to "1"
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*/
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unsigned char potgo; /* start paddle scan sequence (see "ALLPOT") */
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unsigned char unuse1; /* unused */
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unsigned char serout; /* serial port data output */
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unsigned char irqen; /* interrupt request enable */
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unsigned char skctl; /* serial port control */
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};
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/*****************************************************************************/
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/* (W) AUDC1-4 register values */
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/*****************************************************************************/
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/* Meaningful values for the distortion bits.
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** The first process is to divide the clock value by the frequency,
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** then mask the output using the polys in the order below;
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** finally, the result is divided by two.
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*/
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#define AUDC_POLYS_5_17 0x00
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#define AUDC_POLYS_5 0x20 /* Same as 0x60 */
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#define AUDC_POLYS_5_4 0x40
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#define AUDC_POLYS_17 0x80
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#define AUDC_POLYS_NONE 0xA0 /* Same as 0xE0 */
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#define AUDC_POLYS_4 0xC0
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/* When set, the volume value in AUDC1-4 bits 0-3 is sent directly to the speaker;
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** it is not modulated with the frequency specified in the AUDF1-4 registers.
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** (See "De Re Atari" Chapter 7: Sound)
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*/
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#define AUDC_VOLUME_ONLY 0x10
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/*****************************************************************************/
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/* (W) AUDCTL register values */
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/*****************************************************************************/
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#define AUDCTL_CLOCKBASE_15HZ 0x01 /* Switch main clock base from 64 KHz to 15 KHz */
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#define AUDCTL_HIGHPASS_CHAN2 0x02 /* Insert high pass filter into channel two, clocked by channel four */
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#define AUDCTL_HIGHPASS_CHAN1 0x04 /* Insert high pass filter into channel one, clocked by channel two */
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#define AUDCTL_JOIN_CHAN34 0x08 /* Join channels four and three (16 bit) */
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#define AUDCTL_JOIN_CHAN12 0x10 /* Join channels two and one (16 bit) */
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#define AUDCTL_CLOCK_CHAN3_179MHZ 0x20 /* Clock channel three with 1.79 MHz */
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#define AUDCTL_CLOCK_CHAN1_179MHZ 0x40 /* Clock channel one with 1.79 MHz */
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#define AUDCTL_9BIT_POLY 0x80 /* Makes the 17 bit poly counter into nine bit poly (see also: RANDOM) */
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/*****************************************************************************/
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/* (W) IRQEN register values */
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/*****************************************************************************/
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#define IRQEN_TIMER_1 0x01 /* The POKEY timer one interrupt is enabled */
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#define IRQEN_TIMER_2 0x02 /* The POKEY timer two interrupt is enabled */
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#define IRQEN_TIMER_4 0x04 /* The POKEY timer four interrupt is enabled */
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#define IRQEN_SERIAL_TRANS_FINISHED 0x08 /* The serial out transmission finished interrupt is enabled */
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#define IRQEN_SERIAL_OUT_DATA_REQUIRED 0x10 /* The serial output data required interrupt is enabled */
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#define IRQEN_SERIAL_IN_DATA_READY 0x20 /* The serial input data ready interrupt is enabled. */
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#define IRQEN_OTHER_KEY 0x40 /* The "other key" interrupt is enabled */
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#define IRQEN_BREAK_KEY 0x80 /* The BREAK key is enabled */
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/*****************************************************************************/
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/* (W) SKCTL register values */
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/*****************************************************************************/
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#define SKCTL_KEYBOARD_DEBOUNCE 0x01 /* Enable keyboard debounce circuits */
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#define SKCTL_KEYBOARD_SCANNING 0x02 /* Enable keyboard scanning circuit */
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/* Fast pot scan
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** The pot scan counter completes its sequence in two TV line times instead of
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** one frame time (228 scan lines). Not as accurate as the normal pot scan
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*/
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#define SKCTL_FAST_POT_SCAN 0x04
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/* POKEY two-tone mode
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** Serial output is transmitted as a two-tone signal rather than a logic true/false.
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*/
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#define SKCTL_TWO_TONE_MODE 0x08
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/* Force break (serial output to zero) */
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#define SKCTL_FORCE_BREAK 0x80
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/* Bits 4, 5, and 6 of SKCTL set Serial Mode Control: */
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/* Trans. & Receive rates set by external clock; Also internal clock phase reset to zero. */
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#define SKCTL_SER_MODE_TX_EXT_RX_EXT 0x00
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/* Trans. rate set by external clock; Receive asynch. (ch. 4) (CH3 and CH4). */
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#define SKCTL_SER_MODE_TX_EXT_RX_ASYNC 0x10
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/* Trans. & Receive rates set by Chan. 4; Chan. 4 output on Bi-Direct. clock line. */
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#define SKCTL_SER_MODE_TX_CH4_RX_CH4_BIDIR 0x20
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/* N.B.: Bit combination 0,1,1 not useful */
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/* Trans. rate set by Chan. 4; Receive rate set by external clock. */
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#define SKCTL_SER_MODE_TX_CH4_RX_EXT 0x40
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/* N.B.: Bit combination 1,0,1 not useful */
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/* Trans. rate set by Chan. 2; Receive rate set by Chan. 4; Chan. 4 out on Bi-Direct. clock line. */
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#define SKCTL_SER_MODE_TX_CH2_RX_CH4_BIDIR 0x60
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/* Trans. rate set by Chan. 2; Receive asynch. (chan 3 & 4); Bi-Direct. clock not used (tri-state condition). */
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#define SKCTL_SER_MODE_TX_CH4_RX_ASYNC 0x70
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/*****************************************************************************/
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/* Define a structure with the POKEY register offsets for read (R) */
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/*****************************************************************************/
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struct __pokey_read {
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unsigned char pot0; /* paddle 0 value */
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unsigned char pot1; /* paddle 1 value */
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unsigned char pot2; /* paddle 2 value */
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unsigned char pot3; /* paddle 3 value */
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unsigned char pot4; /* paddle 4 value */
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unsigned char pot5; /* paddle 5 value */
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unsigned char pot6; /* paddle 6 value */
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unsigned char pot7; /* paddle 7 value */
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unsigned char allpot; /* eight paddle port status (see "POTGO") */
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unsigned char kbcode; /* keyboard code */
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unsigned char random; /* random number generator */
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unsigned char unuse2; /* unused */
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unsigned char unuse3; /* unused */
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unsigned char serin; /* serial port input */
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unsigned char irqst; /* interrupt request status */
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unsigned char skstat; /* serial port status */
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};
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/*****************************************************************************/
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/* (R) SKSTAT register values */
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/*****************************************************************************/
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#define SKSTAT_SERIN_SHIFTREG_BUSY 0x02 /* Serial input shift register busy */
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#define SKSTAT_LASTKEY_PRESSED 0x04 /* the last key is still pressed */
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#define SKSTAT_SHIFTKEY_PRESSED 0x08 /* the [Shift] key is pressed */
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#define SKSTAT_DATA_READ_INGORING_SHIFTREG 0x10 /* Data can be read directly from the serial input port, ignoring the shift register. */
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#define SKSTAT_KEYBOARD_OVERRUN 0x20 /* Keyboard over-run; Reset BITs 7, 6 and 5 (latches) to 1, using SKREST */
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#define SKSTAT_INPUT_OVERRUN 0x40 /* Serial data input over-run. Reset latches as above. */
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#define SKSTAT_INPUT_FRAMEERROR 0x80 /* Serial data input frame error caused by missing or extra bits. Reset latches as above. */
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/* KBCODE, internal keyboard codes for Atari 8-bit computers,
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** are #defined as "KEY_..." in "atari.h".
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** Note some keys are not read via KBCODE:
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** - Reset
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** - Start, Select, and Option; see CONSOL in "gtia.h"
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** - Break
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*/
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/* End of _pokey.h */
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#endif /* #ifndef __POKEY_H */
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