mirror of
https://github.com/cc65/cc65.git
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3a0506ccb3
Adjusted the PCE's document, the start-up code, and the PCE library test makefile. That makefile shows how to post-process the linker's output file.
134 lines
3.9 KiB
ArmAsm
134 lines
3.9 KiB
ArmAsm
;
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; Startup code for cc65 (PCEngine version)
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;
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; by Groepaz/Hitmen <groepaz@gmx.net>
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; based on code by Ullrich von Bassewitz <uz@cc65.org>
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;
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; 2018-02-11, Greg King
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;
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.export _exit
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.export __STARTUP__ : absolute = 1 ; Mark as startup
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.import initlib, donelib
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.import push0, _main
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.import IRQStub
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; Linker-generated
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.import __CARTSIZE__
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.import __DATA_LOAD__, __DATA_RUN__, __DATA_SIZE__
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.import __BSS_RUN__, __BSS_SIZE__
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.import __MAIN_START__, __MAIN_SIZE__, __STACKSIZE__
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.include "pce.inc"
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.include "extzp.inc"
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.importzp sp
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; ------------------------------------------------------------------------
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; Place the startup code in a special segment.
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.segment "STARTUP"
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start:
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; Set up the CPU and System-IRQ
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; Initialize CPU
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sei
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nop
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csh ; Set high speed CPU mode
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nop
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cld
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nop
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; Set up stack and memory mapping
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ldx #$FF ; Stack top ($21FF)
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txs
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; At power-on, most MPRs have random values; so, initiate them.
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lda #$FF
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tam #%00000001 ; $0000-$1FFF = Hardware bank
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lda #$F8
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tam #%00000010 ; $2000-$3FFF = Work RAM
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;lda #$F7
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;tam #%00000100 ; $4000-$47FF = 2K Battery-backed RAM
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;lda #4
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;tam #%00001000 ; $6000-$7FFF
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lda #$01
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ldx #>$8000
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cpx #>__CARTSIZE__
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bcc @L1 ;(blt)
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tam #%00010000 ; $8000-$9FFF = ROM bank 1 (32K block of ROM)
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inc a
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tam #%00100000 ; $A000-$BFFF = ROM bank 2
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inc a
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@L1: tam #%01000000 ; $C000-$DFFF = ROM bank 3 (32K) or 1 (16K)
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;lda #$00 ; (The reset default)
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;tam #%10000000 ; $E000-$FFFF hucard/syscard bank 0
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; Initialize hardware
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stz TIMER_CTRL ; Timer off
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lda #$07
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sta IRQ_MASK ; Interrupts off
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stz IRQ_STATUS ; Acknowledge timer
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; FIXME; i dont know why the heck this one doesnt work when called from a constructor :/
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.import vdc_init
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jsr vdc_init
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; Turn on background and VD interrupt/IRQ1
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lda #$05
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sta IRQ_MASK ; IRQ1=on
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; Copy the .data segment to RAM
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tii __DATA_LOAD__, __DATA_RUN__, __DATA_SIZE__
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; Clear the .bss segment
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stz __BSS_RUN__
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tii __BSS_RUN__, __BSS_RUN__ + 1, __BSS_SIZE__ - 1
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; Set up the stack
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lda #<(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__)
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ldx #>(__MAIN_START__ + __MAIN_SIZE__ + __STACKSIZE__)
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sta sp
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stx sp + 1
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; Call module constructors
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jsr initlib
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cli ; allow IRQ only after constructors have run
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; Pass an empty command line
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jsr push0 ; argc
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jsr push0 ; argv
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ldy #4 ; Argument size
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jsr _main ; Call the users code
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; Call module destructors. This is also the _exit entry.
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_exit:
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jsr donelib ; Run module destructors
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; reset the PCEngine (start over)
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jmp start
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_nmi:
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rti
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.export initmainargs
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initmainargs:
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rts
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; ------------------------------------------------------------------------
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; hardware vectors
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; ------------------------------------------------------------------------
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.segment "VECTORS"
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.word IRQStub ; $fff6 IRQ2 (External IRQ, BRK)
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.word IRQStub ; $fff8 IRQ1 (VDC)
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.word IRQStub ; $fffa Timer
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.word _nmi ; $fffc NMI
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.word start ; $fffe reset
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