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https://github.com/cc65/cc65.git
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409 lines
9.5 KiB
ArmAsm
409 lines
9.5 KiB
ArmAsm
;
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; Atari XL shadow RAM preparation routines
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;
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; Tasks:
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; - move screen memory below load address
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; - copy ROM chargen to its new place
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; - copy shadow RAM contents to their destination
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;
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; Christian Groessler, chris@groessler.org, 2013
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;
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;DEBUG = 1
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.ifdef __ATARIXL__
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.export sramprep
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.import __SRPREP_LOAD__, __SRPREPCHNK_LAST__
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.import __SHADOW_RAM_LOAD__, __SHADOW_RAM_SIZE__, __SHADOW_RAM_RUN__
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.import __SHADOW_RAM2_LOAD__, __SHADOW_RAM2_SIZE__, __SHADOW_RAM2_RUN__
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.import __CHARGEN_START__, __CHARGEN_SIZE__
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.import __STARTADDRESS__ ; needed by xlmemchk.inc
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.include "zeropage.inc"
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.include "atari.inc"
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.include "save_area.inc"
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.macro print_string text
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.local start, cont
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jmp cont
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start: .byte text, ATEOL
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cont: ldx #0 ; channel 0
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lda #<start
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sta ICBAL,x ; address
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lda #>start
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sta ICBAH,x
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lda #<(cont - start)
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sta ICBLL,x ; length
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lda #>(cont - start)
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sta ICBLH,x
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lda #PUTCHR
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sta ICCOM,x
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jsr CIOV_org
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.endmacro
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; ------------------------------------------------------------------------
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; EXE load chunk header
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.segment "SRPREPHDR"
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.word __SRPREP_LOAD__
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.word __SRPREPCHNK_LAST__ - 1
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; ------------------------------------------------------------------------
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; Actual code
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.segment "SRPREP"
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; ***** entry point *****
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sramprep:
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.ifdef DEBUG
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print_string "entering stage #2"
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.endif
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; save values of modified system variables and ports
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lda RAMTOP
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sta RAMTOP_save
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lda MEMTOP
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sta MEMTOP_save
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lda MEMTOP+1
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sta MEMTOP_save+1
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lda APPMHI
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sta APPMHI_save
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lda APPMHI+1
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sta APPMHI_save+1
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lda PORTB
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sta PORTB_save
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; disable BASIC
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lda PORTB
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ora #2
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sta PORTB
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.include "xlmemchk.inc" ; calculate lowest address used and new value for RAMTOP
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ldx lowadr
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stx MEMTOP
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lda lowadr+1
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sta MEMTOP+1
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lda lodadr+1
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sta RAMTOP
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; set APPMHI to MEMLO (+ 1 for sanity)
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lda MEMLO
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clc
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adc #1
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sta APPMHI
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lda MEMLO+1
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adc #0
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sta APPMHI+1
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; issue a GRAPHICS 0 call (copied'n'pasted from TGI drivers) to move screen memory down
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jsr findfreeiocb
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.ifdef DEBUG ; only check in debug version, this shouldn't really happen(tm)
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beq iocbok
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print_string "Internal error, no free IOCB!"
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jsr delay
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jsr delay
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jsr delay
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jsr restore ; restore stuff we've changed
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jmp (DOSVEC) ; abort loading
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iocbok:
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.endif
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; reopen it in Graphics 0
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lda #OPEN
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sta ICCOM,x
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lda #OPNIN | OPNOT
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sta ICAX1,x
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lda #0
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sta ICAX2,x
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lda #<screen_device
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sta ICBAL,x
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lda #>screen_device
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sta ICBAH,x
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lda #<screen_device_length
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sta ICBLL,x
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lda #>screen_device_length
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sta ICBLH,x
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jsr CIOV_org
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bpl scrok
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; shouldn't happen(tm)
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print_string "Internal error, aborting..."
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jsr delay
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jsr delay
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jsr delay
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jsr restore ; restore stuff we've changed
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jmp (DOSVEC) ; abort loading
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scrok: ; now close it again -- we don't need it anymore
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lda #CLOSE
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sta ICCOM,x
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jsr CIOV_org
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; copy chargen to low memory, just after the next possible address beyond our loaded chunk data
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.ifdef DEBUG
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print_string "copy chargen to low memory"
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.endif
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lda #>__SRPREPCHNK_LAST__
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sta ptr3+1
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lda #<__SRPREPCHNK_LAST__
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sta ptr3
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beq cg_addr_ok
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; page align the new chargen address
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inc ptr3+1
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lda #0
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sta ptr3
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cg_addr_ok:
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lda ptr3+1
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and #3
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beq cg_addr_ok2
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; align to next 1K boundary
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lda ptr3+1
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and #$fc
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clc
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adc #4
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sta ptr3+1
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cg_addr_ok2:
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lda #<DCSORG
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sta ptr1
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lda #>DCSORG
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sta ptr1+1
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lda ptr3
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sta ptr2
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lda ptr3+1
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pha ; needed later to set CHBAS/CHBASE
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sta ptr2+1
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lda #>__CHARGEN_SIZE__
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sta tmp2
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lda #<__CHARGEN_SIZE__
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sta tmp1
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jsr memcopy
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.ifdef DEBUG
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print_string "now setting up high memory"
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.endif
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; disable ROM
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sei
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ldx #0
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stx NMIEN ; disable NMI
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lda PORTB
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and #$fe
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tax
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pla ; get temp. chargen address
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sta WSYNC ; wait for horiz. retrace
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stx PORTB ; now ROM is mapped out
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; switch to temporary chargen
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sta CHBASE
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sta CHBAS
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; copy shadow RAM contents to their destination (segment SHADOW_RAM)
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lda #<__SHADOW_RAM_SIZE__
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bne do_copy
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lda #>__SHADOW_RAM_SIZE__
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beq no_copy ; we have no shadow RAM contents
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; ptr1 - src; ptr2 - dest; tmp1, tmp2 - len
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do_copy:lda #<__SHADOW_RAM_LOAD__
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sta ptr1
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lda #>__SHADOW_RAM_LOAD__
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sta ptr1+1
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lda #<__SHADOW_RAM_RUN__
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sta ptr2
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lda #>__SHADOW_RAM_RUN__
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sta ptr2+1
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lda #<__SHADOW_RAM_SIZE__
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sta tmp1
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lda #>__SHADOW_RAM_SIZE__
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sta tmp2
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jsr memcopy
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no_copy:
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; copy shadow RAM #2 contents to their destination (segment SHADOW_RAM2)
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lda #<__SHADOW_RAM2_SIZE__
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bne do_copy2
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lda #>__SHADOW_RAM2_SIZE__
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beq no_copy2 ; we have no shadow RAM #2 contents
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; ptr1 - src; ptr2 - dest; tmp1, tmp2 - len
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do_copy2:
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lda #<__SHADOW_RAM2_LOAD__
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sta ptr1
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lda #>__SHADOW_RAM2_LOAD__
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sta ptr1+1
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lda #<__SHADOW_RAM2_RUN__
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sta ptr2
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lda #>__SHADOW_RAM2_RUN__
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sta ptr2+1
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lda #<__SHADOW_RAM2_SIZE__
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sta tmp1
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lda #>__SHADOW_RAM2_SIZE__
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sta tmp2
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jsr memcopy
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no_copy2:
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; copy chargen to its new (final) location
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lda ptr3
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sta ptr1
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lda ptr3+1
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sta ptr1+1
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lda #<__CHARGEN_START__
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sta ptr2
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lda #>__CHARGEN_START__
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sta ptr2+1
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lda #>__CHARGEN_SIZE__
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sta tmp2
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lda #<__CHARGEN_SIZE__
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sta tmp1
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jsr memcopy
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; re-enable ROM
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lda PORTB
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ora #1
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ldx #>DCSORG
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sta WSYNC ; wait for horiz. retrace
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sta PORTB
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stx CHBASE
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stx CHBAS
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lda #$40
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sta NMIEN ; enable VB again
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cli ; and enable IRQs
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.ifdef DEBUG
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print_string "Stage #2 OK"
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print_string "loading main chunk"
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jsr delay
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.endif
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rts
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.include "findfreeiocb.inc"
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; routine taken from http://www.obelisk.demon.co.uk/6502/algorithms.html
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;
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; copy memory
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; ptr1 - source
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; ptr2 - destination
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; tmp2:tmp1 - len
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.proc memcopy
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ldy #0
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ldx tmp2
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beq last
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pagecp: lda (ptr1),y
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sta (ptr2),y
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iny
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bne pagecp
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inc ptr1+1
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inc ptr2+1
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dex
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bne pagecp
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last: cpy tmp1
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beq done
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lda (ptr1),y
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sta (ptr2),y
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iny
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bne last
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done: rts
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.endproc
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; clean up after a fatal error
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restore:lda RAMTOP_save
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sta RAMTOP
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lda MEMTOP_save
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sta MEMTOP
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lda MEMTOP_save+1
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sta MEMTOP+1
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lda APPMHI_save
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sta APPMHI
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lda APPMHI_save+1
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sta APPMHI+1
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rts
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; short delay
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.proc delay
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lda #10
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@loop: jsr delay1
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clc
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sbc #0
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bne @loop
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rts
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delay1: ldx #0
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ldy #0
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@loop: dey
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bne @loop
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dex
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bne @loop
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rts
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.endproc
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.ifdef DEBUG
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.byte "HERE ****************** HERE ***************>>>>>>"
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sramsize:
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.word __SHADOW_RAM_SIZE__
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.endif ; .ifdef DEBUG
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screen_device: .byte "S:",0
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screen_device_length = * - screen_device
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.ifdef DEBUG
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.byte " ** srprep ** end-->"
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.endif
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; ------------------------------------------------------------------------
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; Provide empty SHADOW_RAM and SHADOW_RAM2 segments in order that the
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; linker is happy if the user program doesn't have these segments.
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.segment "SHADOW_RAM"
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.segment "SHADOW_RAM2"
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; ------------------------------------------------------------------------
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; EXE load chunk "trailer" - sets INITAD
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.segment "SRPREPTRL"
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.word INITAD
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.word INITAD+1
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.word sramprep
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.endif ; .ifdef __ATARIXL__
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